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1. 发明申请

WO2018022163A1 SHIELDED THREE-LAYER PATTERNED GROUND STRUCTURE 审中-公开
标题翻译：屏蔽三层图案化地面结构
公开(公告)号：WO2018022163A1
公开(公告)日：2018-02-01
申请号：PCT/US2017/030735
申请日：2017-05-03
申请人： WESTERN DIGITAL TECHNOLOGIES, INC.
发明人： WALLASH, Albert John
IPC分类号： H05K1/02 , H01P1/20 , H01P1/203 , H01P3/02
CPC分类号： G11B33/1493 , G06F1/182 , H01P1/2039 , H01P3/026 , H05K1/0219 , H05K1/0224 , H05K1/0225 , H05K1/0227 , H05K1/0245 , H05K1/0253 , H05K2201/0715 , H05K2201/09309 , H05K2201/09363 , H05K2201/09618 , H05K2201/09672 , H05K2201/09781 , H05K2201/10242 , H05K2201/2072
摘要： The present disclosure generally relates to a shielded three-layer patterned ground structure in a PCB. The PCB may be disposed in a hard disk drive. Conductive traces in PCBs can have the problem of common mode current flowing through the traces and thus increasing the magnitude of EMI noise. By providing a shielded three-layer patterned ground structure, not only is the cost reduced, but so is the common mode current and the magnitude of EMI noise, all without any negative impact to the differential signal. The PCB (400) comprises a first shield layer (302) comprising a first conductive material; a second shield layer (304) that is spaced from the first shield layer by a first dielectric material, wherein the second shield layer comprises a second conductive material, wherein the second shield layer has a main portion and a first patterned ground structure (314), wherein the first patterned ground structure is spaced from the main portion on all sides by a moat (316) that is filled with a second dielectric material when viewed from a top view; a third shield layer (306) disposed over the second shield layer and spaced from the second shield layer by a third dielectric material, wherein the third shield layer comprises a first portion and a second portion, wherein the first portion and the second portion are each disposed over the moat when viewed from the top view; and a first set of traces (308) disposed between the first portion and the second portion.
摘要翻译：本公开总体上涉及PCB中的屏蔽三层图案化接地结构。 PCB可以布置在硬盘驱动器中。 PCB中的导电迹线会产生共模电流流过迹线的问题，从而增加EMI噪声的大小。通过提供屏蔽的三层图案化接地结构，不仅降低了成本，而且共模电流和EMI噪声的幅度也是如此，所有这些都不会对差分信号产生任何负面影响。 PCB（400）包括：第一屏蔽层（302），其包括第一导电材料; 通过第一介电材料与所述第一屏蔽层隔开的第二屏蔽层（304），其中所述第二屏蔽层包括第二导电材料，其中所述第二屏蔽层具有主要部分和第一图案化接地结构（314）其中当从顶视图观察时，所述第一图案化的接地结构在所有侧上与所述主要部分通过填充有第二电介质材料的沟槽（316）间隔开; 设置在所述第二屏蔽层之上并且通过第三介电材料与所述第二屏蔽层隔开的第三屏蔽层（306），其中所述第三屏蔽层包括第一部分和第二部分，其中所述第一部分和所述第二部分各自当从顶视图看时布置在护城河上; 和设置在第一部分和第二部分之间的第一组迹线（308）。

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