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1. 发明申请

WO2013177855A1 SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING THE SAME 审中-公开
标题翻译：半导体结构及其形成方法
公开(公告)号：WO2013177855A1
公开(公告)日：2013-12-05
申请号：PCT/CN2012/078789
申请日：2012-07-18
申请人： TSINGHUA UNIVERSITY , WANG, Wei , WANG, Jing , GUO, Lei
发明人： WANG, Wei , WANG, Jing , GUO, Lei
IPC分类号： H01L29/04 , H01L21/335
CPC分类号： H01L29/7849 , H01L29/78603 , H01L29/78654 , H01L29/78681 , H01L29/78684
摘要： A semiconductor structure and a method for forming the same are provided. The semiconductor structure comprises: a semiconductor substrate (100); a rare earth oxide layer (200) formed on the semiconductor substrate (100); a channel region (300) formed on the rare earth oxide layer (200); and a source region (400) and a drain region (500) formed at both sides of the channel region (300) respectively, in which a relationship between a lattice constant a of the rare earth oxide layer (200) and a lattice constant b of a semiconductor material of the channel region (300) and/or the source region (400) and the drain region (500) is a = (n ± c)b, where n is an integer, c is a mismatch ratio of lattice constants, and 0
摘要翻译：提供半导体结构及其形成方法。半导体结构包括：半导体衬底（100）; 形成在半导体衬底（100）上的稀土氧化物层（200）; 形成在所述稀土氧化物层（200）上的沟道区（300）。以及分别形成在沟道区（300）的两侧的源区（400）和漏区（500），其中稀土氧化物层（200）的晶格常数a与晶格常数b 沟道区域（300）和/或源极区域（400）和漏极区域（500）的半导体材料是a =（n±c）b，其中n是整数，c是晶格的失配比常数，0

2. 发明申请

WO2013177856A1 SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING THE SAME 审中-公开
标题翻译：半导体结构及其形成方法
公开(公告)号：WO2013177856A1
公开(公告)日：2013-12-05
申请号：PCT/CN2012/078790
申请日：2012-07-18
申请人： TSINGHUA UNIVERSITY , WANG, Wei , WANG, Jing , GUO, Lei
发明人： WANG, Wei , WANG, Jing , GUO, Lei
IPC分类号： H01L21/336 , H01L29/78
CPC分类号： H01L29/78603 , H01L29/7849 , H01L29/78654 , H01L29/78681 , H01L29/78684
摘要： A semiconductor structure and a method for forming the same are provided. The semiconductor structure comprises: a semiconductor substrate (100); a trench (200) formed in the semiconductor substrate (100), in which a rare earth oxide layer (300) is formed in the trench (200); a channel region (400) partly or entirely formed on the rare earth oxide layer (300); and a source region (500) and a drain region (600) formed at both sides of the channel region (400), respectively. A relationship between a lattice constant a of the rare earth oxide layer (300) and a lattice constant b of a semiconductor material of the channel region (400) and/or the source region (500) and the drain region (600) is a = (n ± c)b, where n is an integer, c is a mismatch ratio of lattice constants, and 0
摘要翻译：提供半导体结构及其形成方法。半导体结构包括：半导体衬底（100）; 形成在半导体衬底（100）中的沟槽（200），其中在沟槽（200）中形成稀土氧化物层（300）; 在所述稀土氧化物层（300）上部分或全部形成的沟道区（400）。以及分别形成在沟道区域（400）的两侧的源极区（500）和漏极区（600）。稀土氧化物层（300）的晶格常数a与沟道区域（400）和/或源极区域（500）和漏极区域（600）的半导体材料的晶格常数b之间的关系是 =（n±c）b，其中n是整数，c是晶格常数的失配比，0

3. 发明申请

WO2013174069A1 SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING THE SAME 审中-公开
标题翻译：半导体结构及其形成方法
公开(公告)号：WO2013174069A1
公开(公告)日：2013-11-28
申请号：PCT/CN2012/078728
申请日：2012-07-16
申请人： TSINGHUA UNIVERSITY , WANG, Jing , GUO, Lei , WANG, Wei
发明人： WANG, Jing , GUO, Lei , WANG, Wei
IPC分类号： H01L27/092 , H01L21/8238
CPC分类号： H01L21/823807 , H01L21/823814
摘要： A semiconductor structure and a method for forming the same are provided. The semiconductor structure comprises: a semiconductor substrate (100); a source region and a drain region defined in the semiconductor substrate (100) respectively, and a trench (200, 300) formed in the source region and/or the drain region, in which a rare earth oxide layer (400) is formed in the trench (200, 300); a source (500) and/or a drain (600) formed on the rare earth oxide layer (400); and a channel region (700) formed between the source (500) and the drain (600). A relationship between a lattice constant a of the rare earth oxide layer (400) and a lattice constant b of a semiconductor material of the source (500) and/or the drain (600) and/or the channel region (700) is a = (n ?c)b, where n is an integer, c is a mismatch ratio of lattice constants, and 0
摘要翻译：提供半导体结构及其形成方法。半导体结构包括：半导体衬底（100）; 分别限定在半导体衬底（100）中的源极区和漏极区以及形成在源区和/或漏区中的在其中形成稀土氧化物层（400）的沟槽（200,300）沟槽（200,300）; 在所述稀土氧化物层（400）上形成的源极（500）和/或漏极（600）。以及形成在源极（500）和漏极（600）之间的沟道区域（700）。稀土氧化物层（400）的晶格常数a与源极（500）和/或漏极（600）和/或沟道区域（700）的半导体材料的晶格常数b之间的关系为 =（n≥c）b，其中n是整数，c是晶格常数的失配比，0

4. 发明申请

WO2013135005A1 SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING THE SAME 审中-公开
标题翻译：半导体结构及其形成方法
公开(公告)号：WO2013135005A1
公开(公告)日：2013-09-19
申请号：PCT/CN2012/076240
申请日：2012-05-29
申请人： TSINGHUA UNIVERSITY , WANG, Jing , GUO, Lei , WANG, Wei
发明人： WANG, Jing , GUO, Lei , WANG, Wei
IPC分类号： H01L27/092 , H01L21/762
CPC分类号： H01L21/76283 , H01L29/1054 , H01L29/24
摘要： A semiconductor structure and a method for forming the same are provided. The semiconductor structure comprises: a semiconductor substrate (100); an active region formed in the semiconductor substrate (100), in which the active region comprises: a channel region (200), and a source region (300) and a drain region (400) formed on both sides of the channel region (200) respectively; and a first isolation trench (500) formed in the semiconductor substrate (100) and on both sides of the active region, in which a first rare earth oxide layer (502) is formed in each first isolation trench (500) to produce a stress in the channel region (200) in a channel length direction.
摘要翻译：提供半导体结构及其形成方法。半导体结构包括：半导体衬底（100）; 形成在所述半导体衬底（100）中的有源区，其中所述有源区包括沟道区（200），以及形成在所述沟道区（200）的两侧上的源区（300）和漏区（400））分别; 以及形成在所述半导体衬底（100）中并且在所述有源区域的两侧上的第一隔离沟槽（500），其中在每个第一隔离沟槽（500）中形成有第一稀土氧化物层（502）以产生应力在通道区域（200）中。

5. 发明申请

WO2011147256A1 LOW SCHOTTKY BARRIER SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING THE SAME 审中-公开
标题翻译：低肖特基二极管半导体结构及其形成方法
公开(公告)号：WO2011147256A1
公开(公告)日：2011-12-01
申请号：PCT/CN2011/073904
申请日：2011-05-10
申请人： TSINGHUA UNIVERSITY , WANG, Jing , WANG, Wei , GUO, Lei , XU, Jun
发明人： WANG, Jing , WANG, Wei , GUO, Lei , XU, Jun
IPC分类号： H01L29/78 , H01L29/06 , H01L21/336
CPC分类号： H01L29/66636 , H01L29/0895 , H01L29/1054 , H01L29/41783 , H01L29/517 , H01L29/66477 , H01L29/66643 , H01L29/78 , H01L29/7839
摘要： A low Schottky barrier semiconductor structure is provided. The structure comprises: a substrate (100); a SiGe layer with low Ge content formed on the substrate; a channel layer (900) with high Ge content formed on the SiGe layer; a gate stack (200) formed on the substrate and a sidewall (400) of one or more layers formed on both sides of the gate stack; metal source/drain (300) formed in the channel layer and on the both sides of the gate stack, respectively; and an insulation layer (600) formed between the substrate and the metal source and between the substrate and the metal drain, respectively. A method for forming the low Schottky barrier semiconductor structure is also provided.
摘要翻译：提供了一种低肖特基势垒半导体结构。该结构包括：基底（100）; 在基板上形成具有低Ge含量的SiGe层; 在SiGe层上形成具有高Ge含量的沟道层（900）; 形成在所述基板上的栅极堆叠（200）和形成在所述栅极堆叠的两侧上的一个或多个层的侧壁（400）金属源极/漏极（300）分别形成在沟道层和栅极堆叠的两侧; 以及形成在所述基板和所述金属源之间以及所述基板和所述金属排出口之间的绝缘层（600）。还提供了形成低肖特基势垒半导体结构的方法。

6. 发明申请

WO2012163047A1 SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING THE SAME 审中-公开
标题翻译：半导体结构及其形成方法
公开(公告)号：WO2012163047A1
公开(公告)日：2012-12-06
申请号：PCT/CN2011/082110
申请日：2011-11-11
申请人： TSINGHUA UNIVERSITY , WANG, Jing , GUO, Lei
发明人： WANG, Jing , GUO, Lei
IPC分类号： H01L29/06 , H01L27/088 , H01L21/8234
CPC分类号： H01L21/764 , H01L21/823412 , H01L21/823418 , H01L21/823481
摘要： A semiconductor structure and a method for forming the same are provided. The semiconductor structure comprises: a substrate (1100); a plurality of convex structures (1200) formed on the substrate (1100), in which every two adjacent convex structures (1200) are separated by a cavity; a plurality of floated films (1300), in which each floated film (1300) is formed between the every two adjacent convex structures (1200) and connected with tops of the every two adjacent convex structures (1200), the floated films (1300) are partitioned into a plurality of sets, a channel layer is formed on a convex structure (1200) between the floated films (1300) in each set, a source region and a drain region are formed on two sides of the channel layer respectively, and an isolation portion (1200) is set between two adjacent sets of floated films (1300); and a gate stack (1400) formed on each channel layer.
摘要翻译：提供半导体结构及其形成方法。半导体结构包括：衬底（1100）; 形成在所述基板（1100）上的多个凸起结构（1200），其中每两个相邻凸起结构（1200）由空腔分隔开; 多个浮动膜（1300），其中每个浮动膜（1300）形成在每两个相邻的凸起结构（1200）之间并与每两个相邻凸起结构（1200）的顶部连接，浮动膜（1300）被划分为多组，在每组中的浮动膜（1300）之间的凸形结构（1200）上形成沟道层，在沟道层的两侧分别形成源极区和漏极区，以及隔离部分（1200）设置在两组相邻的漂浮膜（1300）之间; 和形成在每个沟道层上的栅叠层（1400）。

7. 发明申请

WO2012163046A1 SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING THE SAME 审中-公开
标题翻译：半导体结构及其形成方法
公开(公告)号：WO2012163046A1
公开(公告)日：2012-12-06
申请号：PCT/CN2011/082109
申请日：2011-11-11
申请人： TSINGHUA UNIVERSITY , WANG, Jing , GUO, Lei
发明人： WANG, Jing , GUO, Lei
IPC分类号： H01L29/06 , H01L21/02 , H01L21/336
CPC分类号： H01L21/02378 , H01L21/02381 , H01L21/02447 , H01L21/0245 , H01L21/02494 , H01L21/02502 , H01L21/02529 , H01L21/02532 , H01L21/0262 , H01L21/02639 , H01L21/0265 , H01L21/30608 , H01L21/3065 , H01L29/66651 , H01L29/78
摘要： A semiconductor structure and a method for forming the same are provided. The semiconductor structure comprises: a wafer (1100); a plurality of convex structures (1200) formed on the wafer (1100), in which every two adjacent convex structures (1200) are separated by a cavity in a predetermined pattern and arranged in an array, and the cavity between every two adjacent convex structures is less than 50nm in width; and a first semiconductor film (1300) formed on the plurality of convex structures (1200), in which a part of the first semiconductor film (1300) is spaced apart from the wafer (1100).
摘要翻译：提供半导体结构及其形成方法。半导体结构包括：晶片（1100）; 形成在所述晶片（1100）上的多个凸起结构（1200），其中每两个相邻凸起结构（1200）以预定图案以预定图案分隔并排列成阵列，并且每两个相邻凸起结构之间的空腔宽度小于50nm; 以及形成在所述多个凸起结构（1200）上的第一半导体膜（1300），其中所述第一半导体膜（1300）的一部分与所述晶片（1100）间隔开。

8. 发明申请

WO2012119418A1 STRAINED GE-ON-INSULATOR STRUCTURE AND METHOD FOR FORMING THE SAME 审中-公开
标题翻译：应变导电绝缘体结构及其形成方法
公开(公告)号：WO2012119418A1
公开(公告)日：2012-09-13
申请号：PCT/CN2011/078946
申请日：2011-08-25
申请人： TSINGHUA UNIVERSITY , WANG, Jing , XU, Jun , GUO, Lei
发明人： WANG, Jing , XU, Jun , GUO, Lei
IPC分类号： H01L21/336 , H01L21/20
CPC分类号： H01L21/76283 , H01L21/76251 , H01L29/7843 , H01L29/7846 , H01L29/7848 , H01L29/78684
摘要： A strained Ge-on-insulator structure is provided, comprising: a silicon substrate (1100), in which an oxide insulating layer (1200) is formed on a surface of the silicon substrate (1100); a Ge layer (1300) formed on the oxide insulating layer (1200), in which a first passivation layer (1400) is formed between the Ge layer (1300) and the oxide insulating layer (1200); a gate stack (1600, 1700) formed on the Ge layer (1300), a channel region formed below the gate stack (1600, 1700), and a source (1800) and a drain (1800) formed on sides of the channel region; and a plurality of shallow trench isolation structures (1900) extending into the silicon substrate (1100) and filled with an insulating dielectric material to produce a strain in the channel region. Further, a method for forming the strained Ge-on-insulator structure is also provided.
摘要翻译：提供了一种应变绝缘体上的结构，包括：在硅衬底（1100）的表面上形成氧化物绝缘层（1200）的硅衬底（1100）; 形成在氧化物绝缘层（1200）上的Ge层（1300），其中在Ge层（1300）和氧化物绝缘层（1200）之间形成第一钝化层（1400）; 形成在Ge层（1300）上的栅极堆叠（1600,1700），形成在栅极叠层（1600,1700）下方的沟道区域，以及形成在沟道区域侧面上的源极（1800）和漏极（1800） ; 以及多个浅沟槽隔离结构（1900），其延伸到硅衬底（1100）中并且填充有绝缘介电材料以在沟道区域中产生应变。此外，还提供了用于形成应变的绝缘体上Ge的结构的方法。

9. 发明申请

WO2012119417A1 STRAINED GE-ON-INSULATOR STRUCTURE AND METHOD FOR FORMING THE SAME 审中-公开
标题翻译：应变导电绝缘体结构及其形成方法
公开(公告)号：WO2012119417A1
公开(公告)日：2012-09-13
申请号：PCT/CN2011/078944
申请日：2011-08-25
申请人： TSINGHUA UNIVERSITY , WANG, Jing , XU, Jun , GUO, Lei
发明人： WANG, Jing , XU, Jun , GUO, Lei
IPC分类号： H01L29/06 , H01L29/78 , H01L21/762 , H01L21/336
CPC分类号： H01L21/76283 , H01L21/76251 , H01L29/7843 , H01L29/7846 , H01L29/7848 , H01L29/78684
摘要： A strained Ge-on-insulator structure is provided, comprising: a silicon substrate (1100), in which an oxide insulating layer (1200) is formed on a surface of the silicon substrate (1100); a Ge layer (1300) formed on the oxide insulating layer (1200), in which a first passivation layer (1400) is formed between the Ge layer (1300) and the oxide insulating layer (1200); a gate stack (1600, 1700) formed on the Ge layer (1300), a channel region formed below the gate stack (1600, 1700), and a source (1800) and a drain (1800) formed on sides of the channel region; and a Si N stress cap layer (1900) covering the gate stack (1600, 1700) to produce a strain in the channel region. Further, a method for forming the strained Ge-on-insulator structure is also provided.
摘要翻译：提供了一种应变绝缘体上的结构，包括：在硅衬底（1100）的表面上形成氧化物绝缘层（1200）的硅衬底（1100）; 形成在氧化物绝缘层（1200）上的Ge层（1300），其中在Ge层（1300）和氧化物绝缘层（1200）之间形成第一钝化层（1400）; 形成在Ge层（1300）上的栅极堆叠（1600,1700），形成在栅极叠层（1600,1700）下方的沟道区域，以及形成在沟道区域侧面上的源极（1800）和漏极（1800） ; 以及覆盖栅极堆叠（1600,1700）的Si N应力覆盖层（1900），以在沟道区域中产生应变。此外，还提供了用于形成应变的绝缘体上Ge的结构的方法。

10. 发明申请

WO2012163048A1 SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING THE SAME 审中-公开
标题翻译：半导体结构及其形成方法
公开(公告)号：WO2012163048A1
公开(公告)日：2012-12-06
申请号：PCT/CN2011/082111
申请日：2011-11-11
申请人： TSINGHUA UNIVERSITY , WANG, Jing , GUO, Lei
发明人： WANG, Jing , GUO, Lei
IPC分类号： H01L29/06 , H01L27/088 , H01L21/8234
CPC分类号： H01L29/7842 , H01L21/02532 , H01L21/0257 , H01L21/02587 , H01L21/02664 , H01L21/26506 , H01L21/3247 , H01L21/764 , H01L21/823412 , H01L21/823418 , H01L21/823481 , H01L29/0653 , H01L29/0665 , H01L29/0688 , H01L29/1054 , H01L29/151 , H01L29/161 , H01L29/165 , H01L29/66568 , H01L29/78
摘要： A semiconductor structure and a method for forming the same are provided. The semiconductor structure comprises: a substrate (1100); a plurality of convex structures (1200) formed on the substrate (1100), in which every two adjacent convex structures (1200) are separated by a cavity in a predetermined pattern, and the cavity between every two adjacent convex structures (1200) is less than 50nm in width; a plurality of floated films (1300), in which the floated films (1300) are partitioned into a plurality of sets, a channel layer is formed on a convex structure (1200) between the floated films (1300) in each set, a source region and a drain region are formed on two sides of the channel layer respectively, and the cavity between the every two adjacent convex structures (1200) is filled with an insulating material (2000); and a gate stack (1400) formed on each channel layer.
摘要翻译：提供半导体结构及其形成方法。半导体结构包括：衬底（1100）; 形成在所述基板（1100）上的多个凸起结构（1200），其中每两个相邻凸起结构（1200）以预定图案被空腔隔开，并且每两个相邻的凸起结构（1200）之间的空腔较小宽50nm; 多个浮动膜（1300），其中浮动膜（1300）被分成多个组，在每组中的浮动膜（1300）之间的凸形结构（1200）上形成沟道层，源区域和漏极区域分别形成在沟道层的两侧，并且每两个相邻凸起结构（1200）之间的空腔填充有绝缘材料（2000）; 和形成在每个沟道层上的栅叠层（1400）。

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