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1. 发明申请

WO2009036266A2 III-NITRIDE BIDIRECTIONAL SWITCHES 审中-公开
标题翻译： III-NITRIDE双向开关
公开(公告)号：WO2009036266A2
公开(公告)日：2009-03-19
申请号：PCT/US2008/076160
申请日：2008-09-12
申请人： TRANSPHORM INC. , HONEA, James , PARIKH, Primit , WU, Yifeng , BEN-YAACOV, Ilan
发明人： HONEA, James , PARIKH, Primit , WU, Yifeng , BEN-YAACOV, Ilan
IPC分类号： H01L29/78 , H01L29/80
CPC分类号： H01L29/7787 , H01L27/0605 , H01L29/1033 , H01L29/1066 , H01L29/2003 , H01L29/402 , H01L29/42316 , H01L29/7781
摘要： Bidirectional switches are described. The bidirectional switches include first and a second III-N based high electron mobility transistor. In some embodiments, the source of the first transistor is in electrical contact with a source of the second transistor. In some embodiments, the drain of the first transistor is in electrical contact with a drain of the second transistor. In some embodiments, the two transistors share a drift region and the switch is free of a drain contact between the two transistors. Matrix converters can be formed from the bidirectional switches.
摘要翻译：
描述双向开关。双向开关包括第一和第二基于III-N的高电子迁移率晶体管。在一些实施例中，第一晶体管的源极与第二晶体管的源极电接触。在一些实施例中，第一晶体管的漏极与第二晶体管的漏极电接触。在一些实施例中，两个晶体管共享漂移区并且开关在两个晶体管之间没有漏极接触。矩阵转换器可以由双向开关构成。

2. 发明申请

WO2010068554A3 SEMICONDUCTOR HETEROSTRUCTURE DIODES 审中-公开
公开(公告)号：WO2010068554A3
公开(公告)日：2010-06-17
申请号：PCT/US2009/066647
申请日：2009-12-03
申请人： TRANSPHORM INC. , WU, Yifeng , MISHRA, Umesh , PARIKH, Primit , CHU, Rongming , BEN-YAACOV, Ilan , SHEN, Likun
发明人： WU, Yifeng , MISHRA, Umesh , PARIKH, Primit , CHU, Rongming , BEN-YAACOV, Ilan , SHEN, Likun
IPC分类号： H01L29/868
摘要： Planar Schottky diodes for which the semiconductor material includes a heterojunction which induces a 2DEG in at least one of the semiconductor layers. A metal anode contact is on top of the upper semiconductor layer and forms a Schottky contact with that layer. A metal cathode contact is connected to the 2DEG, forming an ohmic contact with the layer containing the 2DEG.

3. 发明申请

WO2011097302A2 SEMICONDUCTOR ELECTRONIC COMPONENTS AND CIRCUITS 审中-公开
标题翻译：半导体电子元器件和电路
公开(公告)号：WO2011097302A2
公开(公告)日：2011-08-11
申请号：PCT/US2011/023485
申请日：2011-02-02
申请人： TRANSPHORM INC. , PARIKH, Primit , HONEA, James , BLAKE JR., Carl, C. , COFFIE, Robert , WU, Yifeng , MISHRA, Umesh
发明人： PARIKH, Primit , HONEA, James , BLAKE JR., Carl, C. , COFFIE, Robert , WU, Yifeng , MISHRA, Umesh
IPC分类号： H01L25/18 , H01L27/04
CPC分类号： H01L27/0883 , H01L21/8258 , H01L23/49562 , H01L23/49575 , H01L23/642 , H01L23/647 , H01L25/165 , H01L25/18 , H01L27/0605 , H01L2224/48137 , H01L2224/48195 , H01L2224/48247 , H01L2224/48257 , H01L2924/1305 , H01L2924/13055 , H01L2924/13062 , H01L2924/13091 , H01L2924/30107 , H03K17/567 , H01L2924/00
摘要： An electronic component includes a high-voltage depletion-mode transistor and a low-voltage enhancement-mode transistor both encased in a single package. A source electrode of the high-voltage depletion-mode transistor is electrically connected to a drain electrode of the low-voltage enhancement-mode transistor, a drain electrode of the high-voltage depletion-mode transistor is electrically connected to a drain lead of the single package, a gate electrode of the low-voltage enhancement-mode transistor is electrically connected to a gate lead of the single package, a gate electrode of the high-voltage depletion-mode transistor is electrically connected to an additional lead of the single package, and a source electrode of the low-voltage enhancement-mode transistor is electrically connected to a conductive structural portion of the single package.
摘要翻译：电子部件包括均封装在单个封装中的高电压耗尽型晶体管和低电压增强型晶体管。高压耗尽型晶体管的源电极电连接到低电压增强型晶体管的漏电极，高电压耗尽型晶体管的漏电极电连接到低电压增强型晶体管的漏极所述低电压增强型晶体管的栅电极电连接到所述单个封装的栅极引线，所述高电压耗尽型晶体管的栅电极电连接到所述单个封装的附加引线并且低电压增强型晶体管的源电极电连接到单个封装的导电结构部分。

4. 发明申请

WO2012106253A1 III-N DEVICE STRUCTURES AND METHODS 审中-公开
标题翻译： III-N装置结构和方法
公开(公告)号：WO2012106253A1
公开(公告)日：2012-08-09
申请号：PCT/US2012/023160
申请日：2012-01-30
申请人： TRANSPHORM INC. , PARIKH, Primit , DORA, Yuvaraj , WU, Yifeng , MISHRA, Umesh , FICHTENBAUM, Nicholas
发明人： PARIKH, Primit , DORA, Yuvaraj , WU, Yifeng , MISHRA, Umesh , FICHTENBAUM, Nicholas
IPC分类号： H01L29/778 , H01L21/335
CPC分类号： H01L23/34 , H01L21/02118 , H01L21/0254 , H01L21/486 , H01L21/76254 , H01L23/3732 , H01L23/3738 , H01L29/0657 , H01L29/1075 , H01L29/1608 , H01L29/2003 , H01L29/30 , H01L29/66431 , H01L29/778 , H01L29/7787 , H01L2924/0002 , H01L2924/00
摘要： A III-N device is described with a III-N layer, an electrode thereon, a passivation layer adjacent the III-N layer and electrode, a thick insulating layer adjacent the passivation layer and electrode, a high thermal conductivity carrier capable of transferring substantial heat away from the III-N device, and a bonding layer between the thick insulating layer and the carrier. The bonding layer attaches the thick insulating layer to the carrier. The thick insulating layer can have a precisely controlled thickness and be thermally conductive.
摘要翻译： III-N器件用III-N层，其上的电极，与III-N层和电极相邻的钝化层，与钝化层和电极相邻的厚绝缘层，能够转移大量的高导热载体远离III-N器件的热量，以及厚绝缘层和载体之间的结合层。接合层将厚绝缘层附着到载体上。厚的绝缘层可以具有精确控制的厚度并且是导热的。

5. 发明申请

WO2012134686A2 ELECTRONIC COMPONENTS WITH REACTIVE FILTERS 审中-公开
标题翻译：具有反应性过滤器的电子元件
公开(公告)号：WO2012134686A2
公开(公告)日：2012-10-04
申请号：PCT/US2012/026810
申请日：2012-02-27
申请人： TRANSPHORM INC. , HONEA, James , WU, Yifeng
发明人： HONEA, James , WU, Yifeng
CPC分类号： H03K17/687 , H02M1/126 , H02M7/5395 , H02P7/29 , H03K17/162 , H03K17/567 , H03K17/6871 , Y10T29/49105
摘要： An electronic component comprising a half bridge adapted for operation with an electrical load having an operating frequency is described. The half bridge comprises a first switch and a second switch each having a switching frequency, the first switch and the second switch each including a first terminal, a second terminal, and a control terminal, wherein the first terminal of the first switch and the second terminal of the second switch are both electrically connected to a node. The electronic component further includes a filter having a 3dB roll-off frequency, the 3dB roll-off frequency being less than the switching frequency of the switches but greater than the operating frequency of the electrical load. The first terminal of the filter is electrically coupled to the node, and the 3dB roll-off frequency of the filter is greater than 5 kHz.
摘要翻译：描述了一种电子部件，其包括适于与具有工作频率的电负载一起工作的半桥。半桥包括第一开关和第二开关，每个具有开关频率，第一开关和第二开关各自包括第一端子，第二端子和控制端子，其中第一开关的第一端子和第二开关第二开关的端子都电连接到节点。电子部件还包括具有3dB滚降频率的滤波器，3dB滚降频率小于开关的开关频率但大于电负载的工作频率。滤波器的第一个端子电耦合到节点，滤波器的3dB滚降频率大于5 kHz。

6. 发明申请

WO2009102732A2 BRIDGE CIRCUITS AND THEIR COMPONENTS 审中-公开
标题翻译：桥接电路及其组件
公开(公告)号：WO2009102732A2
公开(公告)日：2009-08-20
申请号：PCT/US2009/033699
申请日：2009-02-10
申请人： TRANSPHORM INC. , HONEA, James , WU, Yifeng
发明人： HONEA, James , WU, Yifeng
IPC分类号： H02M7/521 , H02M3/335
CPC分类号： H03K17/08142 , H03K17/162 , H03K17/223 , H03K17/567 , H03K17/6871
摘要： A half bridge is described with at least one transistor having a channel that is capable in a first mode of operation of blocking a substantial voltage in at least one direction, in a second mode of operation of conducting substantial current in one direction through the channel and in a third mode of operation of conducting substantial current in an opposite direction through the channel. The half bridge can have two circuits with such a transistor.
摘要翻译：描述了一种半桥，其具有至少一个晶体管，该晶体管具有能够在第一操作模式中阻断至少一个方向上的实质电压的信道，在第二操作模式中实质上实质上在通过通道的一个方向上的电流以及在通过通道的相反方向上传导大量电流的第三操作模式中。半桥可以有两个电路与这样的晶体管。

7. 发明申请

WO2007126541A1 HIGH EFFICIENCY AND/OR HIGH POWER DENSITY WIDE BANDGAP TRANSISTORS 审中-公开
标题翻译：高效率和/或高功率密度宽带束晶体管
公开(公告)号：WO2007126541A1
公开(公告)日：2007-11-08
申请号：PCT/US2007/005651
申请日：2007-03-05
申请人： CREE, INC. , WU, Yifeng , PARIKH, Primit , MISHRA, Umesh , MOORE, Marcia
发明人： WU, Yifeng , PARIKH, Primit , MISHRA, Umesh , MOORE, Marcia
IPC分类号： H01L29/778 , H01L29/40
CPC分类号： H01L29/7787 , H01L29/2003 , H01L29/404 , H01L29/42316
摘要： Field effect transistors having a power density of greater than 40 W/mm when operated at a frequency of at least 4 GHz are provided. The power density of at least 40 W/mm may be provided at a drain voltage of 135 V. Transistors with greater than 60% PAE and a power density of at least 5 W/mm when operated at 10 GHz at drain biases from 28 V to 48 V are also provided.
摘要翻译：提供了以至少4GHz的频率工作时功率密度大于40W / mm的场效应晶体管。在135V的漏极电压下可以提供至少40W / mm的功率密度。当在10GHz下工作时，具有大于60％PAE的功率密度至少为5W / mm的功率密度，漏极偏置为28V 至48 V。

8. 发明申请

WO2006110204A3 THICK SEMI-INSULATING OR INSULATING EPITAXIAL GALLIUM NITRIDE LAYERS AND DEVICES INCORPORATING SAME 审中-公开
公开(公告)号：WO2006110204A3
公开(公告)日：2006-10-19
申请号：PCT/US2006/004353
申请日：2006-02-08
申请人： CREE, INC. , SAXLER, Adam William , WU, Yifeng , PARIKH, Primit , MISHRA, Umesh , SMITH, Richard Peter , SHEPPARD, Scott T.
发明人： SAXLER, Adam William , WU, Yifeng , PARIKH, Primit , MISHRA, Umesh , SMITH, Richard Peter , SHEPPARD, Scott T.
IPC分类号： H01L29/778 , H01L29/417
摘要： Semiconductor device structures and methods of fabricating semiconductor devices structures are provided that include a semi-insulating or insulating GaN epitaxial layer on a conductive semiconductor substrate and/or a conductive layer. The semi-insulating or insulating GaN epitaxial layer has a thickness of at least about 4 µm. GaN semiconductor device structures and methods of fabricating GaN semiconductor device structures are also provided that include an electrically conductive SiC substrate and an insulating or semi-insulating GaN epitaxial layer on the conductive SiC substrate. The GaN epitaxial layer has a thickness of at least about 4 µm. GaN semiconductor device structures and methods of fabricating GaN semiconductor device structures are also provided that include an electrically conductive GaN substrate, an insulating or semi-insulating GaN epitaxial layer on the conductive GaN substrate, a GaN based semiconductor device on the GaN epitaxial layer and a via hole and corresponding via metal in the via hole that extends through layers of the GaN based semiconductor device and the GaN epitaxial layer.

9. 发明申请

WO2005024909A2 FABRICATION OF SINGLE OR MULTIPLE GATE FIELD PLATES 审中-公开
标题翻译：单门或多门闸门板的制造
公开(公告)号：WO2005024909A2
公开(公告)日：2005-03-17
申请号：PCT/US2004/029324
申请日：2004-09-09
申请人： THE REGENTS OF THE UNIVERSITY OF CALIFORNIA , CREE, INC. , CHINI, Alessandro , MISHRA, Umesh, K. , PARIKH, Primit , WU, Yifeng
发明人： CHINI, Alessandro , MISHRA, Umesh, K. , PARIKH, Primit , WU, Yifeng
IPC分类号： H01L
CPC分类号： H01L29/404 , H01L27/0605 , H01L29/2003 , H01L29/205 , H01L29/207 , H01L29/401 , H01L29/402 , H01L29/41766 , H01L29/42312 , H01L29/42316 , H01L29/66462 , H01L29/7787 , H01L29/785
摘要： A process for fabricating single or multiple gate field plates using consecutive steps of dielectric material deposition/growth, dielectric material etch and metal evaporation on the surface of a field effect transistors. This fabrication process permits a tight control on the field plate operation since dielectric material deposition/growth is typically a well controllable process. Moreover, the dielectric material deposited on the device surface does not need to be removed from the device intrinsic regions: this essentially enables the realization of field-plated devices without the need of low-damage dielectric material dry/wet etches. Using multiple gate field plates also reduces gate resistance by multiple connections, thus improving performances of large periphery and/or sub-micron gate devices.
摘要翻译：使用在场效应晶体管的表面上的介电材料沉积/生长，介电材料蚀刻和金属蒸发的连续步骤来制造单栅极或多栅极场板的工艺。该制造工艺允许对场板操作的严格控制，因为电介质材料沉积/生长通常是良好可控的工艺。此外，沉积在器件表面上的电介质材料不需要从器件本征区域去除：这基本上使得能够实现电镀设备，而不需要低损耗介电材料干/湿蚀刻。使用多个栅极场板还通过多个连接降低栅极电阻，从而提高大的周边和/或亚微米栅极器件的性能。

10. 发明申请

WO2008027027A2 ROBUST TRANSISTORS WITH FLUORINE TREATMENT 审中-公开
标题翻译：具有荧光处理的稳定晶体管
公开(公告)号：WO2008027027A2
公开(公告)日：2008-03-06
申请号：PCT/US2006/026405
申请日：2006-07-07
申请人： CREE, INC , WU, Yifeng , MOORE, Marcia , PARIKH, Primit , WISLEDER, Tim
发明人： WU, Yifeng , MOORE, Marcia , PARIKH, Primit , WISLEDER, Tim
CPC分类号： H01L29/7783 , H01L29/2003 , H01L29/207 , H01L29/402 , H01L29/66462
摘要： A semiconductor device, and particularly a high electron mobility transistor (HEMT), having a plurality of epitaxial layers and experiencing an operating (E) field. A negative ion region in the epitaxial layers to counter the operating (E) field. One method for fabricating a semiconductor device comprises providing a substrate and growing epitaxial layers on the substrate. Negative ions are introduced into the epitaxial layers to form a negative ion region to counter operating electric (E) fields in the semiconductor device. Contacts can be deposited on the epitaxial layers, either before or after formation of the negative ion region.
摘要翻译：具有多个外延层并经历操作（E）场的半导体器件，特别是高电子迁移率晶体管（HEMT）。在外延层中的负离子区域以对抗操作（E）场。制造半导体器件的一种方法包括在衬底上提供衬底和生长外延层。将负离子引入外延层中以形成负离子区域以对抗半导体器件中的电（E）场。可以在形成负离子区之前或之后将触点沉积在外延层上。

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