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1. 发明申请

WO2012158993A3 FEEDFORWARD ACTIVE DECOUPLING 审中-公开
标题翻译：主动拆卸
公开(公告)号：WO2012158993A3
公开(公告)日：2013-04-25
申请号：PCT/US2012038486
申请日：2012-05-18
申请人： TEXAS INSTRUMENTS INC , TEXAS INSTRUMENTS JAPAN , GINSBURG BRIAN P , RENTALA VIJAY B , RAMASWAMY SRINATH , HAROUN BAHER , SEOK EUNYOUNG
发明人： GINSBURG BRIAN P , RENTALA VIJAY B , RAMASWAMY SRINATH , HAROUN BAHER , SEOK EUNYOUNG
IPC分类号： H03F3/04 , G05F1/00
CPC分类号： G06F1/26 , H03F1/305 , H03F3/195 , H03F3/72 , H03F2200/294 , H03F2200/453 , H03F2200/456 , H03F2200/459 , H03F2203/7215
摘要： Apparatus and methods are provided to compensate for parasitic inductances and resistance (such as from package bonding wires) that affect current in duty cycle systems, such as low noise amplifiers (LNAs), that have large varying current consumption. A boost circuit supplies current from a supply VBSTDC to compensate for voltage changes due to a package inductance 204 and resistive voltage drops. To accomplish this, a replica circuit (i.e., transistor Q2) is able to source a current from current source 206-1 (which can be a generally constant current source) that is a replica IRPL of the current ICKT sourced by the input circuit (i.e., LNA 108).
摘要翻译：提供装置和方法来补偿影响具有大变化电流消耗的占空比系统（例如低噪声放大器（LNA））中的电流的寄生电感和电阻（例如来自封装接合线）。升压电路从电源VBSTDC提供电流以补偿由于封装电感204和电阻性电压降引起的电压变化。为了实现这一点，复制电路（即，晶体管Q2）能够从电流源206-1（其可以是大体上恒定的电流源）获得电流，该电流源是由输入电路来源的当前ICKT的副本IRPL（即LNA 108）。

2. 发明申请

WO2013016293A2 LOOP ANTENNA 审中-公开
标题翻译： LOOP天线
公开(公告)号：WO2013016293A2
公开(公告)日：2013-01-31
申请号：PCT/US2012047868
申请日：2012-07-23
申请人： TEXAS INSTRUMENTS INC , GINSBURG BRIAN P , HAROUN BAHER , RAMASWAMY SRINATH , TEXAS INSTRUMENTS JAPAN , SEOK EUNYOUNG , RENTALA VIJAY B
发明人： GINSBURG BRIAN P , HAROUN BAHER , RAMASWAMY SRINATH , SEOK EUNYOUNG , RENTALA VIJAY B
IPC分类号： H01Q7/00
CPC分类号： H01Q7/00 , H01Q23/00
摘要： A loop antenna (206) is provided. The apparatus comprises a substrate (302), a first metallization layer (308), and a second metallization layer. The substrate has first and second feed terminals and a ground terminal. The first metallization layer is disposed over the substrate and includes a first window conductive region (408), a first conductive region (404), a second conductive region (406), and a third conductive region (402). The first conductive region (404) is disposed over and is in electrical contact with the first feed terminal (310-1); it is also is substantially circular and located within the first window region (408). The second conductive region (406) is disposed over and is in electrical contact with the second feed terminal (310-2); it is also substantially circular and is located within the first window region (408). The third conductive region (402) is disposed over and is in electrical contact with the ground terminal, and the third conductive region (402) substantially surrounds the first window region (408). The second metallization layer is disposed over and is in electrical contact with the first, second, and third conductive regions (404, 406, 402) of the first metallization layer (308), and the second metallization layer includes a second window region that is at least partially aligned with the first window region.
摘要翻译：提供环形天线（206）。该装置包括基底（302），第一金属化层（308）和第二金属化层。基板具有第一和第二馈电端子和接地端子。第一金属化层设置在衬底上，并且包括第一窗口导电区域（408），第一导电区域（404），第二导电区域（406）和第三导电区域（402）。第一导电区域（404）设置在第一馈电端子（310-1）上并与第一馈电端子电接触; 它也是基本上圆形的并且位于第一窗口区域（408）内。第二导电区域（406）设置在第二馈电端子（310-2）上并与第二馈电端子（310-2）电接触; 它也基本上是圆形的并且位于第一窗口区域（408）内。第三导电区域（402）设置在接地端子之上并与接地端子电接触，并且第三导电区域（402）基本上围绕第一窗口区域（408）。第二金属化层设置在第一金属化层（308）的第一，第二和第三导电区域（404,406,402）之上并与第一金属化层（308）的电接触，并且第二金属化层包括第二金属化层至少部分地与第一窗口区域对准。

3. 发明申请

WO2013016293A3 LOOP ANTENNA 审中-公开
公开(公告)号：WO2013016293A3
公开(公告)日：2013-05-10
申请号：PCT/US2012047868
申请日：2012-07-23
申请人： TEXAS INSTRUMENTS INC , GINSBURG BRIAN P , HAROUN BAHER , RAMASWAMY SRINATH , TEXAS INSTRUMENTS JAPAN , SEOK EUNYOUNG , RENTALA VIJAY B
发明人： GINSBURG BRIAN P , HAROUN BAHER , RAMASWAMY SRINATH , SEOK EUNYOUNG , RENTALA VIJAY B
IPC分类号： H01Q7/00
CPC分类号： H01Q7/00 , H01Q23/00
摘要： A loop antenna (206) is provided. The apparatus comprises a substrate (302), a first metallization layer (308), and a second metallization layer. The substrate has first and second feed terminals and a ground terminal. The first metallization layer is disposed over the substrate and includes a first window conductive region (408), a first conductive region (404), a second conductive region (406), and a third conductive region (402). The first conductive region (404) is disposed over and is in electrical contact with the first feed terminal (310-1); it is also is substantially circular and located within the first window region (408). The second conductive region (406) is disposed over and is in electrical contact with the second feed terminal (310-2); it is also substantially circular and is located within the first window region (408). The third conductive region (402) is disposed over and is in electrical contact with the ground terminal, and the third conductive region (402) substantially surrounds the first window region (408). The second metallization layer is disposed over and is in electrical contact with the first, second, and third conductive regions (404, 406, 402) of the first metallization layer (308), and the second metallization layer includes a second window region that is at least partially aligned with the first window region.
摘要翻译：提供环形天线（206）。该装置包括衬底（302），第一金属化层（308）和第二金属化层。衬底具有第一和第二馈电端子和接地端子。第一金属化层设置在衬底之上并且包括第一窗口导电区域（408），第一导电区域（404），第二导电区域（406）和第三导电区域（402）。第一导电区域（404）设置在第一馈电端子（310-1）之上并与第一馈电端子（310-1）电接触; 它也基本上是圆形的并且位于第一窗口区域（408）内。第二导电区域（406）设置在第二馈电端子（310-2）之上并与其电接触; 它也基本上是圆形的并且位于第一窗口区域（408）内。第三导电区域（402）设置在接地端子上方并且与接地端子电接触，并且第三导电区域（402）基本上围绕第一窗口区域（408）。第二金属化层设置在第一金属化层（308）的第一，第二和第三导电区域（404,406,402）之上并与其电接触，并且第二金属化层包括第二窗口区域至少部分地与第一窗口区域对齐。

4. 发明申请

WO2013016536A3 CROSS-LOOP ANTENNA 审中-公开
标题翻译：交叉环形天线
公开(公告)号：WO2013016536A3
公开(公告)日：2013-03-21
申请号：PCT/US2012048342
申请日：2012-07-26
申请人： TEXAS INSTRUMENTS INC , TEXAS INSTRUMENTS JAPAN , SEOK EUNYOUNG , RAMASWAMY SRINATH , GINSBURG BRIAN P , RENTALA VIJAY B , HAROUN BAHER
发明人： SEOK EUNYOUNG , RAMASWAMY SRINATH , GINSBURG BRIAN P , RENTALA VIJAY B , HAROUN BAHER
IPC分类号： H01Q7/00
CPC分类号： H01L31/08 , H01L2224/73204 , H05K3/3436 , H05K2201/10098
摘要： An antenna is contained within a package (104) that is secured to an integrated circuit (IC 106) (which allows radiation to propagated away for a printed circuit board (PCB) so as to reduce interference), and this antenna includes two loop antennas that are shorted to ground and that "overlap" and includes a "via wall." The IC 106 has a protective overcoat (406) that covers the IC), including metallization layer 404 and IC substrate 402, and stud bumps (302-1) are secured between the IC and antenna package (104). The antenna package (104) can then be secured to the PCB. With the disclosed configuration, circular polarization can be achieved by varying the relative phases of the input signals, and the "via wall" improves efficiency by reducing surface waves.
摘要翻译：天线包含在固定到集成电路（IC 106）（其允许辐射传播离开以用于印刷电路板（PCB）以减少干扰）的封装（104）内，并且该天线包括两个环形天线与地面短路并且“重叠”并包括“通过墙”。 IC106具有覆盖IC的保护覆层（406），包括金属化层404和IC基板402，并且柱形凸块（302-1）固定在IC和天线封装（104）之间。天线封装（104）然后可以固定到PCB。利用所公开的配置，可以通过改变输入信号的相对相位来实现圆偏振，并且“通孔壁”通过减少表面波来提高效率。

5. 发明申请

WO2012162692A2 HIGH IMPEDANCE SURFACE 审中-公开
标题翻译：高阻抗表面
公开(公告)号：WO2012162692A2
公开(公告)日：2012-11-29
申请号：PCT/US2012039801
申请日：2012-05-29
申请人： TEXAS INSTRUMENTS INC , TEXAS INSTRUMENTS JAPAN , MURDOCK JAMES N , SEOK EUNYOUNG , GINSBURG BRIAN P , RENTALA VIJAY B , RAMASWAMY SRINATH , HAROUN BAHER
发明人： MURDOCK JAMES N , SEOK EUNYOUNG , GINSBURG BRIAN P , RENTALA VIJAY B , RAMASWAMY SRINATH , HAROUN BAHER
IPC分类号： H01Q1/24 , H01Q9/04
CPC分类号： H01Q1/52 , H01Q9/0407 , H01Q15/008
摘要： An apparatus for emitting radiation has an antenna formed on a substrate (104) and a high impedance surface (HIS). The HIS has a plurality of multi-layer vertically stacked cells (304) arranged to form an array that substantially surrounds at least a portion of the antenna. Each cell (304) includes a ground plane (106) formed on the substrate (104), a first plate (306) formed over and coupled to the ground plane, and a second plate (310) formed over and coupled through an interconnect (308) to the first plate. Example first and second substrates are parallel and substantially rectangular, with first and second plates of multiple cells arranged to form respective first and second checkered patterns for the array.
摘要翻译：用于发射辐射的装置具有形成在衬底（104）和高阻抗表面（HIS）上的天线。 HIS具有布置成形成基本上围绕天线的至少一部分的阵列的多个多层垂直堆叠单元（304）。每个单元（304）包括形成在基板（104）上的接地平面（106），形成在接地平面上并耦合到接地平面的第一平板（306），以及形成在互连 308）到第一板。示例性的第一和第二基板是平行的并且基本上是矩形的，多个单元的第一和第二板布置成形成用于阵列的相应的第一和第二格子图案。

6. 发明申请

WO2013016293A8 LOOP ANTENNA 审中-公开
公开(公告)号：WO2013016293A8
公开(公告)日：2013-07-18
申请号：PCT/US2012047868
申请日：2012-07-23
申请人： TEXAS INSTRUMENTS INC , TEXAS INSTRUMENTS JAPAN , SEOK EUNYOUNG , GINSBURG BRIAN P , HAROUN BAHER , RAMASWAMY SRINATH , RENTALA VIJAY B
发明人： SEOK EUNYOUNG , GINSBURG BRIAN P , HAROUN BAHER , RAMASWAMY SRINATH , RENTALA VIJAY B
IPC分类号： H01Q7/00
CPC分类号： H01Q7/00 , H01Q23/00
摘要： A loop antenna (206) is provided. The apparatus comprises a substrate (302), a first metallization layer (308), and a second metallization layer. The substrate has first and second feed terminals and a ground terminal. The first metallization layer is disposed over the substrate and includes a first window conductive region (408), a first conductive region (404), a second conductive region (406), and a third conductive region (402). The first conductive region (404) is disposed over and is in electrical contact with the first feed terminal (310-1); it is also is substantially circular and located within the first window region (408). The second conductive region (406) is disposed over and is in electrical contact with the second feed terminal (310-2); it is also substantially circular and is located within the first window region (408). The third conductive region (402) is disposed over and is in electrical contact with the ground terminal, and the third conductive region (402) substantially surrounds the first window region (408). The second metallization layer is disposed over and is in electrical contact with the first, second, and third conductive regions (404, 406, 402) of the first metallization layer (308), and the second metallization layer includes a second window region that is at least partially aligned with the first window region.

7. 发明申请

WO2012166897A3 WIDE BANDWIDTH CLASS C AMPLIFIER WITH COMMON-MODE FEEDBACK 审中-公开
标题翻译：带通用模式反馈的宽带级C放大器
公开(公告)号：WO2012166897A3
公开(公告)日：2013-04-25
申请号：PCT/US2012040178
申请日：2012-05-31
申请人： TEXAS INSTRUMENTS INC , TEXAS INSTRUMENTS JAPAN , GINSBURG BRIAN P , RENTALA VIJAY B , RAMASWAMY SRINATH , HAROUN BAHER , SEOK EUNYOUNG
发明人： GINSBURG BRIAN P , RENTALA VIJAY B , RAMASWAMY SRINATH , HAROUN BAHER , SEOK EUNYOUNG
IPC分类号： H03F3/45
CPC分类号： H03F3/45179 , H03F3/45645 , H03F2200/462 , H03F2203/45306 , H03F2203/45418 , H03F2203/45424 , H03F2203/45431 , H03F2203/45442 , H03F2203/45446 , H03F2203/45696 , H03F2203/45702
摘要： In a class C amplifier (100), a common-mode current is applied to a common-gate amplifier (100) and the common-mode current is sensed. In response to the sensed common-mode current, a control voltage is generated. A first feedback current (FBI) generated in response to the control voltage is applied to a differential ground of the common-gate amplifier (110) if the common- mode current is less than a predetermined threshold. Additionally, a second feedback current (FB2) generated in response to the control voltage is applied to input terminals (IN) of the common-gate amplifier (110) if the common-mode current is greater than the predetermined threshold.
摘要翻译：在C类放大器（100）中，共模电流被施加到共门放大器（100），并感测到共模电流。响应感测的共模电流，产生控制电压。如果共模电流小于预定阈值，则响应于控制电压产生的第一反馈电流（FBI）被施加到共栅放大器（110）的差分接地。另外，如果共模电流大于预定阈值，则响应于控制电压产生的第二反馈电流（FB2）被施加到共门放大器（110）的输入端（IN）。

8. 发明申请

WO2008028096A3 COMMON MODE TRANSLATION IN SIGMA-DELTA ANALOG-TO-DIGITAL CONVERTERS 审中-公开
标题翻译： SIGMA-DELTA模拟 - 数字转换器中的通用模式转换
公开(公告)号：WO2008028096A3
公开(公告)日：2008-06-12
申请号：PCT/US2007077323
申请日：2007-08-31
申请人： TEXAS INSTRUMENTS INC , FAYED AYMAN A , BYRD RUSSELL , HAROUN BAHER
发明人： FAYED AYMAN A , BYRD RUSSELL , HAROUN BAHER
IPC分类号： H03M1/00
CPC分类号： H03M3/488
摘要： System and method (400) for common mode translation in continuous-time sigma- delta analog-to-digital converters (100). An embodiment comprises a loop filter having an RC network (105) coupled to a differential signal input, a Gm-C/Quantizer/DAC circuit (GQD) coupled to the loop filter, a common-mode level adjust circuit coupled to signal inputs of the GQD (110), and a tuning circuit coupled to the GQD and the common-mode level adjust circuit. The GQD evaluates an input signal provided by the RC network, computes a difference between a filtered input signal and the feedback quantization signal to generate an error signal, measures the error signal, and compensates for the error signal with sigma-delta noise-shaping. The common-mode level adjust circuit alters a common-mode level of a differential input signal to be substantially equal to a desired common-mode level and the tuning circuit provides a compensation voltage to the common-mode level adjust circuit based on a difference between the common-mode levels.
摘要翻译：用于连续时间西格玛 - 德尔塔模数转换器（100）中的共模转换的系统和方法（400）。一个实施例包括具有耦合到差分信号输入的RC网络（105），耦合到环路滤波器的Gm-C /量化器/ DAC电路（GQD）的环路滤波器，耦合到信号输入的共模电平调整电路 GQD（110）以及耦合到GQD和共模电平调整电路的调谐电路。 GQD评估由RC网络提供的输入信号，计算经滤波的输入信号与反馈量化信号之间的差异以生成误差信号，测量误差信号并利用Σ-Δ噪声整形补偿误差信号。共模电平调节电路将差分输入信号的共模电平改变为基本上等于期望的共模电平，并且调谐电路基于两者之间的差异向共模电平调节电路提供补偿电压共模电平。

9. 发明申请

WO2014153391A3 DIELECTRIC WAVEGUIDE AND METHOD OF MANUFACTURE 审中-公开
标题翻译：电介质波导及其制造方法
公开(公告)号：WO2014153391A3
公开(公告)日：2015-03-26
申请号：PCT/US2014031184
申请日：2014-03-19
申请人： TEXAS INSTRUMENTS INC , TEXAS INSTRUMENTS JAPAN
发明人： HERBSOMMER JUAN ALEJANDRO , SEOK EUNYOUNG , HAROUN BAHER
IPC分类号： H01P11/00
CPC分类号： H01P3/16 , G02B6/4416 , H01L2223/6677 , H01L2224/16227 , H01L2224/73204 , H01L2924/15192 , H01L2924/15311 , H01P3/121 , H01P3/165 , H01P5/00 , H01P5/087 , H01P5/107 , H01P5/184 , H01P11/001 , H01P11/002 , H01Q1/50 , H01Q19/108 , H01Q19/30 , H04B1/40 , Y10T29/49016 , Y10T29/49826
摘要： A dielectric waveguide may be manufactured by forming a set of parallel channels in a planar sheet that has a lower dielectric constant value. The set of channels is then filled with a material having a higher dielectric constant value. The planar sheet is sliced into a plurality of strips that each contain one or more of the channels. An electronic device has a multilayer substrate that has an interface surface configured for interfacing to a dielectric waveguide. A conductive layer on the substrate is etched to form a dipole antenna disposed adjacent the interface surface to provide coupling to the dielectric waveguide. A reflector structure is formed in the substrate adjacent the dipole antenna opposite from the interface surface.
摘要翻译：可以通过在具有较低介电常数值的平面片中形成一组平行通道来制造电介质波导。然后用具有较高介电常数值的材料填充该组通道。平面片被切成多个条，每条都包含一个或多个通道。电子设备具有多层基板，该多层基板具有被配置为与电介质波导连接的界面。蚀刻衬底上的导电层以形成邻近界面表面设置的偶极天线，以提供与介质波导的耦合。反射器结构形成在与界面表面相对的偶极子天线附近的衬底中。

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