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1. 发明申请

WO2013080931A1 SEMICONDUCTOR DISPLAY DEVICE 审中-公开
标题翻译：半导体显示设备
公开(公告)号：WO2013080931A1
公开(公告)日：2013-06-06
申请号：PCT/JP2012/080528
申请日：2012-11-20
申请人： SEMICONDUCTOR ENERGY LABORATORY CO., LTD. , NISHIJIMA, Tatsuji , YONEDA, Seiichi , OHMARU, Takuro , KOYAMA, Jun
发明人： NISHIJIMA, Tatsuji , YONEDA, Seiichi , OHMARU, Takuro , KOYAMA, Jun
IPC分类号： G09G3/20 , G02F1/1368 , G09G3/36 , H01L21/8242 , H01L27/105 , H01L27/108 , H01L29/786
CPC分类号： G09G3/3648 , G02F2001/136295 , G09G3/3614 , G09G3/3677 , G09G5/393 , G09G5/395 , G09G2300/0842 , G09G2310/0264 , G09G2330/021 , G09G2330/022 , G09G2360/121 , H01L27/1052 , H01L27/1225 , H01L29/24 , H01L29/7869 , H01L33/16
摘要： In the case where a still image is displayed on a pixel portion having a pixel, for example, a driver circuit for controlling writing of an image signal having image data to the pixel portion stops by stopping supply of power supply voltage to the driver circuit, and writing of an image signal to the pixel portion is stopped. After the driver circuit stops, supply of power supply voltage to a panel controller for controlling the operation of the driver circuit and an image memory for storing the image data is stopped, and supply of power supply voltage to a CPU for collectively controlling the operation of the panel controller, the image memory, and a power supply controller for controlling supply of power supply voltage to a variety of circuits in a semiconductor display device is stopped.
摘要翻译：在静止图像显示在具有像素的像素部分的情况下，例如通过停止对驱动电路的电源电压的供给来停止将具有图像数据的图像信号写入到像素部分的驱动电路，并且停止向像素部分写入图像信号。在驱动器电路停止之后，停止向用于控制驱动器电路的操作的面板控制器的电源电压供给和用于存储图像数据的图像存储器，并且向CPU提供电源电压以集中地控制停止面板控制器，图像存储器和用于控制对半导体显示装置中的各种电路的电源电压供给的电源控制器。

2. 发明申请

WO2012157593A1 PROGRAMMABLE LOGIC DEVICE 审中-公开
标题翻译：可编程逻辑器件
公开(公告)号：WO2012157593A1
公开(公告)日：2012-11-22
申请号：PCT/JP2012/062246
申请日：2012-05-08
申请人： SEMICONDUCTOR ENERGY LABORATORY CO., LTD. , YONEDA, Seiichi , NISHIJIMA, Tatsuji
发明人： YONEDA, Seiichi , NISHIJIMA, Tatsuji
IPC分类号： H03K19/177
CPC分类号： H03K19/0013 , H01L27/1225 , H01L27/124 , H01L29/7869 , H03K19/0008 , H03K19/17736 , H03K19/17744
摘要： An object is to provide a programmable logic device having logic blocks connected to each other by a programmable switch, where the programmable switch is characterized by an oxide semiconductor transistor incorporated therein. The extremely low off-state current of the oxide semiconductor transistor provides a function as a non-volatile memory due to its high ability to hold a potential of a gate electrode of a transistor which is connected to the oxide semiconductor transistor. The ability of the oxide semiconductor transistor to function as a non-volatile memory allows the configuration data for controlling the connection of the logic blocks to be maintained even in the absence of a power supply potential. Hence, the rewriting process of the configuration data at starting of the device can be omitted, which contributes to the reduction in power consumption of the device.
摘要翻译：目的是提供一种具有通过可编程开关彼此连接的逻辑块的可编程逻辑器件，其中可编程开关的特征在于结合在其中的氧化物半导体晶体管。氧化物半导体晶体管的非常低的截止电流由于其保持与氧化物半导体晶体管连接的晶体管的栅极的电位的高能力而提供作为非易失性存储器的功能。氧化物半导体晶体管用作非易失性存储器的能力允许用于控制逻辑块的连接的配置数据即使在没有电源电位的情况下也被维持。因此，可以省略在设备启动时的配置数据的重写处理，这有助于降低设备的功耗。

3. 发明申请

WO2012157532A1 PROGRAMMABLE LOGIC DEVICE 审中-公开
标题翻译：可编程逻辑器件
公开(公告)号：WO2012157532A1
公开(公告)日：2012-11-22
申请号：PCT/JP2012/062072
申请日：2012-05-02
申请人： SEMICONDUCTOR ENERGY LABORATORY CO., LTD. , NISHIJIMA, Tatsuji , YONEDA, Seiichi
发明人： NISHIJIMA, Tatsuji , YONEDA, Seiichi
IPC分类号： H03K19/173
CPC分类号： H03K19/1776 , H01L27/0688 , H01L27/11803 , H01L27/1225 , H03K19/17736 , H03K19/17764 , H03K19/17772
摘要： An object is to provide a programmable logic device which can hold configuration data even when a power supply potential is not supplied, has short start-up time of a logic block after the power is supplied, and can operate with low power. A transistor in a memory portion of a programmable switch includes a material which allows a sufficient reduction in off-state current of the transistor, such as an oxide semiconductor material which is a wide bandgap semiconductor. When the semiconductor material which allows a sufficient reduction in off-state current of the transistor is used, configuration data can be held even when a power supply potential is not supplied.
摘要翻译：本发明的目的是提供一种可编程逻辑器件，即使在未提供电源电位时也能够保持配置数据，在供电之后具有逻辑块的启动时间短并且可以以低功率工作。可编程开关的存储器部分中的晶体管包括允许充分降低诸如作为宽带隙半导体的氧化物半导体材料的晶体管的截止电流的材料。当使用允许晶体管的截止电流充分降低的半导体材料时，即使不提供电源电位，也可以保持配置数据。

4. 发明申请

WO2012157533A1 SEMICONDUCTOR DEVICE 审中-公开
标题翻译：半导体器件
公开(公告)号：WO2012157533A1
公开(公告)日：2012-11-22
申请号：PCT/JP2012/062073
申请日：2012-05-02
申请人： SEMICONDUCTOR ENERGY LABORATORY CO., LTD. , YONEDA, Seiichi
发明人： YONEDA, Seiichi
IPC分类号： H03K3/356 , H01L21/822 , H01L21/8234 , H01L21/8238 , H01L27/04 , H01L27/06 , H01L27/08 , H01L27/088 , H01L27/092 , H01L29/786 , H03K3/037
CPC分类号： H03K19/00315 , H03K19/0963
摘要： A semiconductor device in which an input terminal is electrically connected to a first terminal of a first transmission gate; a second terminal of the first transmission gate is electrically connected to a first terminal of a first inverter and a second terminal of a functional circuit; a second terminal of the first inverter and a first terminal of the functional circuit are electrically connected to a first terminal of a second transmission gate; a second terminal of the second transmission gate is electrically connected to a first terminal of a second inverter and a second terminal of a clocked inverter; a second terminal of the second inverter and a first terminal of the clocked inverter are electrically connected to an output terminal; and the functional circuit includes a data holding portion between a transistor with small off-state current and a capacitor.
摘要翻译：一种半导体器件，其中输入端子电连接到第一传输门的第一端子; 第一传输门的第二端子电连接到第一反相器的第一端子和功能电路的第二端子; 第一反相器的第二端子和功能电路的第一端子电连接到第二传输门的第一端子; 第二传输门的第二端子电连接到第二反相器的第一端子和时钟反相器的第二端子; 第二反相器的第二端子和时钟反相器的第一端子电连接到输出端子; 并且功能电路包括在具有小截止电流的晶体管和电容器之间的数据保持部分。

5. 发明申请

WO2018116049A1 DATA CONVERSION CIRCUIT AND DISPLAY DEVICE 审中-公开
公开(公告)号：WO2018116049A1
公开(公告)日：2018-06-28
申请号：PCT/IB2017/057769
申请日：2017-12-11
申请人： SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
发明人： OKAMOTO, Yuki , YONEDA, Seiichi
IPC分类号： G09G3/20 , G09G3/3225 , G09G3/36
摘要： Image processing in accordance with the shape of a display device is performed at high speed with low power consumption, without the use of a large frame memory or a high-throughput GPU. Used is a data conversion circuit including: a latch circuit that takes in data from input data in synchronization with a writing clock signal and stores the data as writing data; a memory circuit that stores the writing data and outputs the writing data to an external circuit as readout data in synchronization with a readout clock signal; and a clock selection control circuit. The writing clock signal is one of a plurality of clock signals with different frequencies and is output in accordance with control by the clock selection control circuit.

6. 发明申请

WO2016055894A1 SEMICONDUCTOR DEVICE AND ELECTRONIC DEVICE 审中-公开
标题翻译：半导体器件和电子器件
公开(公告)号：WO2016055894A1
公开(公告)日：2016-04-14
申请号：PCT/IB2015/057372
申请日：2015-09-25
申请人： SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
发明人： YONEDA, Seiichi
IPC分类号： G11C11/405 , H01L21/8242 , H01L27/108 , H01L29/786
CPC分类号： H01L27/124 , H01L27/1225 , H01L27/1255 , H01L29/78648
摘要： To provide a novel semiconductor device or a semiconductor device capable of operating at high speed. The semiconductor device includes a plurality of circuits each having a function of storing data and a wiring EL. The plurality of circuits each include a first transistor, a second transistor, and a capacitor. One of a source and a drain of the first transistor is electrically connected to a gate of the second transistor and the capacitor. The first transistor includes an oxide semiconductor in a channel formation region. The wiring EL has a function of a back-gate of the first transistor. A potential for selecting the plurality of circuits is supplied to the wiring EL. Thus, data stored in the plurality of circuits is erased.
摘要翻译：提供能够高速运转的新颖的半导体器件或半导体器件。半导体器件包括具有存储数据的功能的多个电路和布线EL。多个电路各自包括第一晶体管，第二晶体管和电容器。第一晶体管的源极和漏极之一电连接到第二晶体管的栅极和电容器。第一晶体管包括沟道形成区中的氧化物半导体。布线EL具有第一晶体管的背栅的功能。选择多个电路的电位被提供给布线EL。因此，存储在多个电路中的数据被擦除。

7. 发明申请

WO2017115208A1 DEVICE, TELEVISION SYSTEM, AND ELECTRONIC DEVICE 审中-公开
标题翻译：设备，电视系统和电子设备
公开(公告)号：WO2017115208A1
公开(公告)日：2017-07-06
申请号：PCT/IB2016/057756
申请日：2016-12-19
申请人： SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
发明人： YONEDA, Seiichi
IPC分类号： G09G3/36 , G02F1/1368 , G09G3/20 , G09G3/3233 , H04N5/66
CPC分类号： G09G3/2096 , G09G3/20 , G09G3/32 , G09G3/3648 , G09G2300/026 , G09G2300/0408 , G09G2300/0426 , G09G2310/04 , G09G2320/103 , G09G2330/022 , H04N5/44 , H04N5/63 , H04N19/10 , H04N19/423 , H04N19/44 , H04N19/513 , H04N19/65
摘要： To provide a novel device, a device with low power consumption, or a versatile device, the device includes a decoder, a driver circuit, and a display portion. The driver circuit includes a plurality of circuits. The display portion includes a plurality of display panels. The decoder has a function of generating a signal corresponding to an image displayed on the display portion. The decoder has a function of determining the necessity of rewriting an image of each of the display panels by detecting a change in the image of each of the display panels. The circuit has a function of outputting a signal to a display panel for which that image rewriting is determined to be necessary. The circuit has a function of stopping output of a signal to a display panel for which image rewriting is determined to be unnecessary.
摘要翻译：为了提供新颖的设备，具有低功耗的设备或通用设备，该设备包括解码器，驱动器电路和显示部分。该驱动器电路包括多个电路。显示部分包括多个显示面板。解码器具有生成与在显示部分上显示的图像对应的信号的功能。解码器具有通过检测每个显示面板的图像的变化来确定重写每个显示面板的图像的必要性的功能。该电路具有将信号输出到确定为必须进行图像重写的显示面板的功能。该电路具有停止输出信号到确定图像重写被认为是不必要的显示面板的功能。

8. 发明申请

WO2016170442A1 IMAGING DEVICE, METHOD FOR DRIVING IMAGING DEVICE, AND ELECTRONIC DEVICE 审中-公开
标题翻译：成像装置，用于驱动成像装置的方法和电子装置
公开(公告)号：WO2016170442A1
公开(公告)日：2016-10-27
申请号：PCT/IB2016/052032
申请日：2016-04-11
申请人： SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
发明人： YONEDA, Seiichi
IPC分类号： H04N5/365 , H01L21/8234 , H01L21/8238 , H01L27/088 , H01L27/092 , H01L27/146 , H01L29/786 , H04N5/369 , H04N5/374 , H04N5/3745
CPC分类号： H01L29/24 , H01L27/1225 , H01L27/1255 , H01L27/14609 , H01L27/14612 , H01L27/14636 , H01L27/14665 , H01L27/14692 , H01L29/66969 , H01L29/7869 , H01L2224/48091 , H04N5/3651 , H04N5/3745 , H04N5/37457 , H01L2924/00014
摘要： An imaging device capable of obtaining high-quality imaging data is provided. The imaging device includes a photoelectric conversion element, a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, a sixth transistor, and a first capacitor. Variation in the threshold voltage of amplifier transistors can be compensated. Furthermore, the imaging device can have a difference detecting function for holding differential data between imaging data for an initial frame and imaging data for a current frame and outputting a signal corresponding to the differential data.
摘要翻译：提供能够获得高质量成像数据的成像装置。成像装置包括光电转换元件，第一晶体管，第二晶体管，第三晶体管，第四晶体管，第五晶体管，第六晶体管和第一电容器。可以补偿放大器晶体管的阈值电压的变化。此外，成像装置可以具有差分检测功能，用于在初始帧的成像数据和当前帧的成像数据之间保持差分数据，并输出对应于差分数据的信号。

9. 发明申请

WO2018087630A1 SEMICONDUCTOR DEVICE, ELECTRONIC COMPONENT, AND ELECTRONIC DEVICE 审中-公开
标题翻译：半导体器件，电子元件和电子器件
公开(公告)号：WO2018087630A1
公开(公告)日：2018-05-17
申请号：PCT/IB2017/056802
申请日：2017-11-02
申请人： SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
发明人： IKEDA, Takayuki , YONEDA, Seiichi
IPC分类号： G11C11/56 , G11C11/405
摘要： A highly reliable semiconductor device is provided. A memory cell includes a first transistor and a second transistor. One of a source and a drain of the first transistor is electrically connected to a gate of the second transistor. The first transistor is configured to hold charge corresponding to first data retained in the memory cell when turned off. The data writing circuit is configured to write the first data and correction data to the memory cell. The data reading circuit is configured to read a first voltage value corresponding to the first data, read a second voltage value corresponding to the correction data written to the memory cell, convert a voltage value that is equivalent to a difference between the first voltage value and the second voltage value into corrected first data, and output the corrected first data to the data writing circuit.
摘要翻译：提供了一种高度可靠的半导体器件。存储器单元包括第一晶体管和第二晶体管。第一晶体管的源极和漏极中的一个电连接到第二晶体管的栅极。第一晶体管被配置为当关闭时保持与存储器单元中保留的第一数据相对应的电荷。数据写入电路被配置为将第一数据和校正数据写入存储器单元。数据读取电路被配置为读取与第一数据相对应的第一电压值，读取与写入到存储单元的校正数据相对应的第二电压值，将等于第一电压值和第二电压值之间的差的电压值将第二电压值转换为校正的第一数据，并将校正后的第一数据输出到数据写入电路。

10. 发明申请

WO2015030150A1 STORAGE CIRCUIT AND SEMICONDUCTOR DEVICE 审中-公开
标题翻译：存储电路和半导体器件
公开(公告)号：WO2015030150A1
公开(公告)日：2015-03-05
申请号：PCT/JP2014/072665
申请日：2014-08-22
申请人： SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
发明人： MAEHASHI, Yukio , YONEDA, Seiichi , UESUGI, Wataru
IPC分类号： H03K3/356 , H03K3/037 , H03K3/3562
CPC分类号： H03K3/012 , H03K3/356 , H03K3/356104
摘要： The storage circuit includes first and second logic circuits, first and second transistors whose channel formation regions include an oxide semiconductor, and a capacitor. The first and second transistors are connected to each other in series, and the capacitor is connected to a connection node of the first and second transistors. The first transistor functions as a switch that controls connection between an output terminal of the first logic circuit and the capacitor. The second transistor functions as a switch that controls connection between the capacitor and an input terminal of the second logic circuit. Clock signals whose phases are inverted from each other are input to gates of the first and second transistors. Since the storage circuit has a small number of transistors and a small number of transistors controlled by the clock signals, the storage circuit is a low-power circuit.
摘要翻译：存储电路包括第一和第二逻辑电路，其沟道形成区域包括氧化物半导体的第一和第二晶体管以及电容器。第一和第二晶体管串联连接，电容器连接到第一和第二晶体管的连接节点。第一晶体管用作控制第一逻辑电路的输出端子和电容器之间的连接的开关。第二晶体管用作控制电容器和第二逻辑电路的输入端之间的连接的开关。其相位相互反相的时钟信号被输入到第一和第二晶体管的栅极。由于存储电路具有少量晶体管和由时钟信号控制的少量晶体管，所以存储电路是低功率电路。

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