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1. 发明申请

WO2004095691A1 RADIO FREQUENCY LIMITER CIRCUIT 审中-公开
标题翻译：无线电频率限制电路
公开(公告)号：WO2004095691A1
公开(公告)日：2004-11-04
申请号：PCT/US2004/010999
申请日：2004-04-09
申请人： RAYTHEON COMPANY , ADLERSTEIN, Michael, G. , TREMBLAY, John, C.
发明人： ADLERSTEIN, Michael, G. , TREMBLAY, John, C.
IPC分类号： H03F3/60
CPC分类号： H03G11/04 , H03F1/523 , H03F3/601 , H03F2200/211 , H03F2200/258
摘要： A limiter circuit (10) includes a rectification circuit (14) coupled to an input of the limiter circuit to produce a voltage having a predetermined average level. The level is a function of an input signal (RFIN) fed to the input (16) of the limiter circuit (10). A voltage divider circuit (20) is coupled to the rectification circuit (14) for producing an output voltage having a level proportional to the input signal (RAN). An enhancement mode field effect transistor (Z1) has a gate electrode fed by the output voltage produced by the voltage divider circuit (20). The transistor has drain and source electrodes coupled to an output of the limiter circuit and a reference potential, respectively. A transmission line (22) is coupled between the input (16) of the limiter (10) and the output (18) of the limiter circuit (10). The transmission line (22) has an electrical length nl/4, where l is the nominal operating wavelength of the limiter circuit and n is an odd integer.

2. 发明申请

WO2005045381A1 AN INTEGRATED THERMAL SENSOR FOR MICROWAVE TRANSISTORS 审中-公开
标题翻译：用于微波晶体管的集成热传感器
公开(公告)号：WO2005045381A1
公开(公告)日：2005-05-19
申请号：PCT/US2004/036264
申请日：2004-11-01
申请人： RAYTHEON COMPANY , ADLERSTEIN, Michael, G.
发明人： ADLERSTEIN, Michael, G.
IPC分类号： G01K7/01
CPC分类号： G01K7/01 , H01L23/34 , H01L2924/0002 , H01L2924/00
摘要： A circuit for determining temperature of an active semiconductor device disposed on a semiconductor substrate and a Wheatstone bridge circuit. The bridge has in each of four branches thereof a thermal sensitive device, one pair of such thermal sensitive devices being in thermal contact with an electrode of the active device. Another pair of such thermal sensitive devices is in thermal contact with the substrate. A tuning circuit is coupled to an output of the transistor, such tuning circuit having a tunable element controlled by a control signal fed to such tunable element. A processor is responsive to a voltage produced at an output of the Wheatstone bridge circuit and a signal representative of power fed to the transistor. The output provided by the Wheatstone bridge provides a measure of a temperature difference between the temperature of the transistor and ambient temperature.
摘要翻译：用于确定设置在半导体衬底上的有源半导体器件的温度的电路和惠斯通电桥电路。该桥在其四个分支中的每一个中具有热敏器件，一对这样的热敏器件与有源器件的电极热接触。另一对这样的热敏器件与衬底热接触。调谐电路耦合到晶体管的输出，这种调谐电路具有通过馈送到这种可调谐元件的控制信号控制的可调元件。处理器响应于在惠斯通电桥电路的输出处产生的电压和表示馈送到晶体管的功率的信号。惠斯通电桥提供的输出提供了晶体管温度与环境温度之间温差的测量。

3. 发明申请

WO2013052204A1 DISTRIBUTED POWER CONDITIONING WITH DC-DC CONVERTERS IMPLEMENTED IN HETEROGENEOUS INTEGRATED CIRCUIT 审中-公开
标题翻译：在异质集成电路中实现的DC-DC转换器的分布式功率调节
公开(公告)号：WO2013052204A1
公开(公告)日：2013-04-11
申请号：PCT/US2012/051003
申请日：2012-08-15
申请人： RAYTHEON COMPANY , SAUNDERS, Jeffrey, H. , ADLERSTEIN, Michael, G.
发明人： SAUNDERS, Jeffrey, H. , ADLERSTEIN, Michael, G.
IPC分类号： H02M7/00
CPC分类号： H02M7/003 , Y02B70/1483
摘要： A flat panel active electronically scanned array (AESA) (1) includes heterogeneous integrated circuit DC-DC voltage converters (3) periodically placed on array elements (2). A heterogeneous integrated circuit (100, 400, 500, 600) includes a voltage converter (101 ) configured to receive an input voltage (Vi), and to convert the input voltage to an output voltage (Vo) that is different from the input voltage, the voltage converter (101) comprising an analog and/or digital PWM circuit (104). The heterogeneous integrated circuit (100, 400, 500, 600) also includes a feedback circuit (103) configured to receive the output voltage (Vo), and to generate a control signal used to vary a pulse width of a PWM signal generated by the analog and/or digital PWM circuit (104). The digital PWM circuit (104) is implemented in a heterogeneous integrated circuit (100, 400, 500, 600) fabricated on a common substrate (606) using CMOS and GaN fabrication processes.
摘要翻译：平板有源电子扫描阵列（AESA）（1）包括周期性地放置在阵列元件（2）上的异质集成电路DC-DC电压转换器（3）。异质集成电路（100,400,500,600）包括被配置为接收输入电压（Vi）的电压转换器（101），并且将输入电压转换成不同于输入电压的输出电压（Vo），所述电压转换器（101）包括模拟和/或数字PWM电路（104）。异质集成电路（100,400,500,600）还包括被配置为接收输出电压（Vo）的反馈电路（103），并且产生用于改变由所述输出电压（Vo）产生的PWM信号的脉冲宽度的控制信号模拟和/或数字PWM电路（104）。数字PWM电路（104）在使用CMOS和GaN制造工艺制造在公共衬底（606）上的异质集成电路（100,400,500,600）中实现。

4. 发明申请

WO2007008308A1 MMIC HAVING BACK-SIDE MULTI-LAYER SIGNAL ROUTING 审中-公开
标题翻译： MMIC具有背面的多层信号路由
公开(公告)号：WO2007008308A1
公开(公告)日：2007-01-18
申请号：PCT/US2006/021335
申请日：2006-06-01
申请人： RAYTHEON COMPANY , MCCARROLL, Christopher, P. , POZGAY, Jerome, H. , LARDIZABAL, Steven, M. , KAZIOR, Thomas, E. , ADLERSTEIN, Michael, G.
发明人： MCCARROLL, Christopher, P. , POZGAY, Jerome, H. , LARDIZABAL, Steven, M. , KAZIOR, Thomas, E. , ADLERSTEIN, Michael, G.
IPC分类号： H01L23/48 , H01L23/66 , H01L23/522
CPC分类号： H01L21/6835 , H01L23/481 , H01L23/66 , H01L2221/6834 , H01L2221/6835 , H01L2924/0002 , H01L2924/19041 , H01L2924/00
摘要： A method includes providing a single crystal wafer having MMIC chips. Each chip has an active device in a first surface portion of a semiconductor substrate provided by the wafer and an electrical interconnect having a first portion disposed on a second surface of the semiconductor substrate. The semiconductor substrate structure has a via therethrough, a second portion of the electrical interconnect passing though the via and being electrically connected to the active device. A multilayer interconnect structure is formed on the wafer providing a signal routing section on the second surface portion of a corresponding one of the chips. Each section has dielectric layers and an electrically conductors, such electrical conductor being electrically coupled to the active device to route an electrical signal to such active device. Each chip and the corresponding signal routing section are separated from the wafer.
摘要翻译：一种方法包括提供具有MMIC芯片的单晶晶片。每个芯片在由晶片提供的半导体衬底的第一表面部分中具有有源器件，以及具有设置在半导体衬底的第二表面上的第一部分的电互连。半导体衬底结构具有穿过其中的通孔，电互连的第二部分通过通孔并电连接到有源器件。在晶片上形成多层互连结构，在对应的一个芯片的第二表面部分上提供信号路由部分。每个部分具有电介质层和电导体，这种电导体电耦合到有源器件以将电信号路由到这种有源器件。每个芯片和相应的信号路由部分与晶片分离。

5. 发明申请

WO2008157215A1 METHOD FOR PACKAGING SEMICONDUCTORS AT A WAFER LEVEL 审中-公开
标题翻译：在半导体层上封装半导体的方法
公开(公告)号：WO2008157215A1
公开(公告)日：2008-12-24
申请号：PCT/US2008/066678
申请日：2008-06-12
申请人： RAYTHEON COMPANY , HALLOCK, Robert, B. , ZHANG, Yiwen , ADLERSTEIN, Michael, G. , KAZIOR, Thomas, E. , TRULLI, Susan, C.
发明人： HALLOCK, Robert, B. , ZHANG, Yiwen , ADLERSTEIN, Michael, G. , KAZIOR, Thomas, E. , TRULLI, Susan, C.
IPC分类号： H01L23/10
CPC分类号： H01L23/3114 , H01L2224/82039 , H01L2224/94 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01015 , H01L2924/01023 , H01L2924/01033 , H01L2924/01047 , H01L2924/01079 , H01L2924/01322 , H01L2924/014 , H01L2924/10329 , H01L2924/12042 , H01L2924/1306 , H01L2924/1423 , H01L2924/1461 , H01L2924/16195 , H01L2924/16235 , H01L2924/30105 , H01L2924/00 , H01L2224/03
摘要： A method for packaging a plurality of semiconductor devices formed in a surface portion of a semiconductor wafer. The method includes: lithographically forming in a material disposed on the surface portion of the semiconductor wafer device-exposing openings to exposed the devices and electrical contacts pads openings to expose electrical contact pads for devices; mounting a rigid dielectric layer over the formed material, such rigid material being suspended over the device exposing openings in the material and over the electrical contacts pads openings in the material; and forming electrical contact pad openings in portions of the rigid dielectric layer disposed over electrical contact pads of the devices with other portions of the rigid dielectric layer remaining suspended over the device exposing openings in the material.
摘要翻译：一种用于封装形成在半导体晶片的表面部分中的多个半导体器件的方法。该方法包括：在设置在半导体晶片装置的表面部分上的材料中光刻形成曝光开口以暴露该装置和电触点焊盘开口以露出用于装置的电接触垫; 将刚性介质层安装在所形成的材料上方，这种刚性材料悬挂在设备上，暴露材料中的开口和材料中的电触点焊盘开口; 以及在所述刚性介电层的设置在所述器件的电接触焊盘上的部分中形成电接触焊盘开口，其中所述刚性介电层的其它部分保持悬挂在所述器件上露出所述材料中的开口。

6. 发明申请

WO2008157214A1 MICROWAVE INTEGRATED CIRCUIT PACKAGE AND METHOD FOR FORMING SUCH PACKAGE 审中-公开
标题翻译：微波集成电路封装和形成这种封装的方法
公开(公告)号：WO2008157214A1
公开(公告)日：2008-12-24
申请号：PCT/US2008/066677
申请日：2008-06-12
申请人： RAYTHEON COMPANY , COLOMB, Francois, Y. , ADLERSTEIN, Michael, G.
发明人： COLOMB, Francois, Y. , ADLERSTEIN, Michael, G.
IPC分类号： H01L23/552 , H01L23/66
CPC分类号： H01L23/552 , H01L23/66 , H01L2924/0002 , H01L2924/1617 , H01L2924/16195 , H01L2924/16235 , H01L2924/00
摘要： A method for packaging a semiconductor device. The method includes: providing a dielectric layer over the semiconductor device; determining patterns and placement of material on the dielectric layer to provide a predetermined magnetic or electric effect for the device, such effects being provided on the device from such patterned and placed material solely by electrical or magnetic waves coupled between such material and the device; and forming the material in the determined patterns and placement to provide the predetermined effects.
摘要翻译：一种用于封装半导体器件的方法。该方法包括：在半导体器件上提供介电层; 确定材料在电介质层上的图案和放置以为器件提供预定的磁或电效应，这种效果仅通过耦合在这种材料和器件之间的电或磁波从这种图案化和放置的材料提供在器件上; 并以确定的图案和放置形成材料以提供预定的效果。

7. 发明申请

WO2008013606A2 TUNED MMIC PROBE PADS 审中-公开
标题翻译：调谐MMIC探头垫
公开(公告)号：WO2008013606A2
公开(公告)日：2008-01-31
申请号：PCT/US2007/013474
申请日：2007-06-07
申请人： RAYTHEON COMPANY , ADLERSTEIN, Michael, G.
发明人： ADLERSTEIN, Michael, G.
IPC分类号： G01R31/28
CPC分类号： G01R31/2822 , G01R31/2884
摘要： A microwave integrated circuit chip having microwave transmission line coupled to an input of microwave circuitry when the microwave circuitry has capacitive input impedance. The chip includes a via passing from the first surface of a substrate, through the substrate, to the ground plane. A test probe ground pad is disposed on the first surface of the substrate and spaced from a portion of the via disposed on the first surface of the substrate. An electrical conductor is disposed on the first surface of the substrate extending from the portion of the via disposed on the first surface of the substrate via to the test probe ground pad, such electrical conductor providing an inductive impedance selected to provide a resonance with the capacitive input impedance of the microwave circuitry.
摘要翻译：微波集成电路芯片，当微波电路具有电容性输入阻抗时，具有耦合到微波电路的输入的微波传输线。芯片包括从衬底的第一表面通过衬底到达接地平面的通孔。测试探针接地焊盘设置在衬底的第一表面上并且与设置在衬底的第一表面上的通孔的一部分间隔开。电导体设置在衬底的第一表面上，从设置在衬底的第一表面上的通孔的部分延伸到测试探针接地焊盘，该电导体提供感应阻抗，以提供与电容微波电路的输入阻抗。

8. 发明申请

WO2007145802A1 TRANSMIT/RECEIVE MODULE HAVING BI-DIRECTIONAL FREQUENCY CONVERSION SECTION 审中-公开
标题翻译：具有双向频率转换部分的发送/接收模块
公开(公告)号：WO2007145802A1
公开(公告)日：2007-12-21
申请号：PCT/US2007/012586
申请日：2007-05-24
申请人： RAYTHEON COMPANY , ADLERSTEIN, Michael, G. , KAPER, Valery, S.
发明人： ADLERSTEIN, Michael, G. , KAPER, Valery, S.
IPC分类号： H04B1/40
CPC分类号： H04B1/403
摘要： A transmit/receive module having a frequency conversion circuit. The circuit includes a mixer having a pair of ports and a third port coupled to a local oscillator signal source. A transmit path transmits energy from the module and a receive path receives for the module. Both the receive path and the transmit path pass through the pair of ports of the mixer.
摘要翻译：具有频率转换电路的发送/接收模块。该电路包括具有一对端口和耦合到本地振荡器信号源的第三端口的混频器。发射路径从模块传输能量，接收路径接收模块。接收路径和发送路径均通过混频器的一对端口。

9. 发明申请

WO2007064451A1 PHASED ARRAY RADAR SYSTEMS AND SUBASSEMBLIES THEREOF 审中-公开
标题翻译：相位阵列雷达系统及其分类
公开(公告)号：WO2007064451A1
公开(公告)日：2007-06-07
申请号：PCT/US2006/043485
申请日：2006-11-08
申请人： RAYTHEON COMPANY , ADLERSTEIN, Michael, G. , KAPER, Valery, S.
发明人： ADLERSTEIN, Michael, G. , KAPER, Valery, S.
IPC分类号： H03L7/24 , H01Q3/42 , G01S7/03
CPC分类号： H03L7/24 , G01S7/032 , G01S2013/0254 , H01Q3/30 , H01Q3/42
摘要： A phase shifter (92, 17a..., 16n) includes a coupler (34)having a pair of output terminals for providing a pair of signals having a frequency f and having a relative phase shift difference of mp/2 radians, where m is an integer, and a switch (36) is included having a pair of inputs, each one of the pair of inputs being coupled to a corresponding one of output terminals of the coupler (34) . The switch (36) has an output, one of the inputs of the switch being coupled to the output of the switch selectively in accordance with a first control signal (39) fed to the switch. An oscillator (38) is included having a tunable resonant circuit (41) coupled to the output of the switch (36) , the frequency of the resonant circuit (41) being detuned from the nominal resonant frequency to shift the nominal resonant frequency relative to the harmonic of the signal at the output of the switch.
摘要翻译：移相器（92,17a ...，16n）包括具有一对输出端子的耦合器（34），用于提供具有频率f并具有mp / 2弧度的相对相位差的一对信号，其中m 是整数，并且包括具有一对输入的开关（36），所述一对输入中的每一个耦合到耦合器（34）的对应的一个输出端子。开关（36）具有输出，开关的一个输入根据馈送到开关的第一控制信号（39）选择性地耦合到开关的输出端。包括具有耦合到开关（36）的输出的可调谐谐振电路（41）的振荡器（38），谐振电路（41）的频率与标称谐振频率失谐，以使标称谐振频率相对于交换机输出端的信号谐波。

10. 发明申请

WO2006083577A1 MONOLITHIC INTEGRATED CIRCUIT HAVING THREE FIELD EFFECT TRANSISTORS 审中-公开
标题翻译：具有三个场效应晶体管的单片集成电路
公开(公告)号：WO2006083577A1
公开(公告)日：2006-08-10
申请号：PCT/US2006/002040
申请日：2006-01-20
申请人： RAYTHEON COMPANY , HWANG, Kiuchul , ADLERSTEIN, Michael, G.
发明人： HWANG, Kiuchul , ADLERSTEIN, Michael, G.
IPC分类号： H01L27/06 , H01L27/088 , H01L27/095
CPC分类号： H01L21/8252 , H01L27/0605 , H01L29/7783
摘要： A semiconductor structure having: a III-V substrate structure; an enhancement mode transistor device disposed in a first region of the structure; a depletion mode transistor device disposed in a laterally displaced second region of the structure; and a RF/microwave/milli-meter wave transistor device formed in a laterally displaced third region thereof.
摘要翻译：一种半导体结构，具有：III-V基板结构; 设置在该结构的第一区域中的增强型晶体管器件; 设置在所述结构的横向移位的第二区域中的耗尽型晶体管器件; 以及形成在其横向移位的第三区域中的RF /微波/毫米波晶体管器件。

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