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1. 发明申请

WO2012006465A1 METHODS AND SYSTEMS FOR CMOS IMPLEMENTATION OF NEURON SYNAPSE 审中-公开
标题翻译：神经元SYNPSPS的CMOS实现方法与系统
公开(公告)号：WO2012006465A1
公开(公告)日：2012-01-12
申请号：PCT/US2011/043251
申请日：2011-07-07
申请人： QUALCOMM Incorporated , APARIN, Vladimir , LEVIN, Jeffrey, A.
发明人： APARIN, Vladimir , LEVIN, Jeffrey, A.
IPC分类号： G06N3/063
CPC分类号： G06N3/0635 , G06N3/049 , G11C11/54
摘要： Certain embodiments of the present disclosure support techniques for power efficient implementation of neuron synapses with positive and/or negative synaptic weights.
摘要翻译：本发明的某些实施例支持用正和/或负的突触权重进行神经元突触功率有效实现的技术。

2. 发明申请

WO2012006592A1 METHODS AND SYSTEMS FOR NEURAL PROCESSOR TRAINING BY ENCOURAGEMENT OF CORRECT OUTPUT 审中-公开
标题翻译：通过对正确输出进行神经处理器训练的方法和系统
公开(公告)号：WO2012006592A1
公开(公告)日：2012-01-12
申请号：PCT/US2011/043456
申请日：2011-07-08
申请人： QUALCOMM Incorporated , APARIN, Vladimir , LEVIN, Jeffrey A.
发明人： APARIN, Vladimir , LEVIN, Jeffrey A.
IPC分类号： G06N3/063
CPC分类号： G06N3/063 , G06N3/049
摘要： Certain embodiments of the present disclosure support implementation of a neural processor with synaptic weights, wherein training of the synapse weights is based on encouraging a specific output neuron to generate a spike. The implemented neural processor can be applied for classification of images and other patterns.
摘要翻译：本公开的某些实施例支持具有突触权重的神经处理器的实现，其中突触权重的训练基于鼓励特定输出神经元以产生尖峰。实施的神经处理器可以应用于图像和其他图案的分类。

3. 发明申请

WO2012006469A1 METHODS AND SYSTEMS FOR THREE-MEMRISTOR SYNAPSE WITH STDP AND DOPAMINE SIGNALING 审中-公开
标题翻译：具有STDP和DOPAMINE信号的三重仪器共振的方法和系统
公开(公告)号：WO2012006469A1
公开(公告)日：2012-01-12
申请号：PCT/US2011/043256
申请日：2011-07-07
申请人： QUALCOMM Incorporated , TANG, Yi , LEVIN, Jeffrey A. , APARIN, Vladimir , RANGAN, Venkat
发明人： TANG, Yi , LEVIN, Jeffrey A. , APARIN, Vladimir , RANGAN, Venkat
IPC分类号： G06N3/063
CPC分类号： G06N3/0635 , G06N3/049
摘要： The present disclosure proposes implementation of a three-memristor synapse where an adjustment of synaptic strength is based on Spike-Timing-Dependent Plasticity (STDP) with dopamine signaling.
摘要翻译：本公开提出了三忆阻突触的实施，其中突触强度的调整基于具有多巴胺信号传导的尖峰时间依赖性可塑性（STDP）。

4. 发明申请

WO2012006470A1 COMMUNICATION AND SYNAPSE TRAINING METHOD AND HARDWARE FOR BIOLOGICALLY INSPIRED NETWORKS 审中-公开
标题翻译：通信和仿真培训方法和生物信息网络的硬件
公开(公告)号：WO2012006470A1
公开(公告)日：2012-01-12
申请号：PCT/US2011/043257
申请日：2011-07-07
申请人： QUALCOMM Incorporated , APARIN, Vladimir , TANG, Yi
发明人： APARIN, Vladimir , TANG, Yi
IPC分类号： G06N3/063
CPC分类号： G06N3/0635 , G06N3/02 , G06N3/06 , G06N3/08 , G06N99/005
摘要： Certain embodiments of the present disclosure support techniques for training of synapses in biologically inspired networks. Only one device based on a memristor can be used as a synaptic connection between a pair of neurons. The training of synaptic weights can be achieved with a low current consumption. A proposed synapse training circuit may be shared by a plurality of incoming/outgoing connections, while only one digitally implemented pulse-width modulation (PWM) generator can be utilized per neuron circuit for generating synapse-training pulses. Only up to three phases of a slow clock can be used for both the neuron-to-neuron communications and synapse training. Some special control signals can be also generated for setting up synapse training events. By means of these signals, the synapse training circuit can be in a high-impedance state outside the training events, thus the synaptic resistance (i.e., the synaptic weight) is not affected outside the training process.
摘要翻译：本公开的某些实施例支持在生物启发网络中训练突触的技术。只有一个基于忆阻器的设备可以用作一对神经元之间的突触连接。突触体重的训练可以用低电流消耗来实现。所提出的突触训练电路可以由多个输入/输出连接共享，而每个神经元电路只能使用一个数字实现的脉宽调制（PWM）发生器来产生突触训练脉冲。只有三个阶段的慢时钟可用于神经元到神经元通信和突触训练。还可以生成一些特殊控制信号来设置突触训练事件。通过这些信号，突触训练电路可以处于训练事件之外的高阻抗状态，因此突触电阻（即突触重量）在训练过程之外不受影响。

5. 发明申请

WO2010151894A1 FEEDBACK SYSTEM WITH IMPROVED STABILITY 审中-公开
标题翻译：反馈系统具有改进的稳定性
公开(公告)号：WO2010151894A1
公开(公告)日：2010-12-29
申请号：PCT/US2010/040252
申请日：2010-06-28
申请人： QUALCOMM Incorporated , APARIN, Vladimir , BALLANTYNE, Gary, John
发明人： APARIN, Vladimir , BALLANTYNE, Gary, John
IPC分类号： H04B1/04
CPC分类号： H04B1/0475
摘要： Techniques for improving stability of a feedback system are described. In an exemplary design, the feedback system includes a forward path and a feedback path. The forward path receives an input signal and a rotated feedback signal and provides an output signal having a phase shift. The feedback path receives the output signal, generates a feedback signal, and rotates the feedback signal to obtain the rotated feedback signal having at least part of the phase shift removed. In another exemplary design, the feedback system includes a forward path and a feedback loop. The forward path receives a combined signal and provides an output signal having a phase shift. The feedback loop generates an error signal based on an input signal and the output signal, generates the combined signal based on the error signal and the input signal, and performs phase rotation to remove at least part of the phase shift.
摘要翻译：描述了提高反馈系统稳定性的技术。在示例性设计中，反馈系统包括前向路径和反馈路径。正向路径接收输入信号和旋转的反馈信号，并提供具有相移的输出信号。反馈路径接收输出信号，产生反馈信号，并且使反馈信号旋转以获得具有至少部分移相消除的旋转的反馈信号。在另一示例性设计中，反馈系统包括前向路径和反馈回路。前向路径接收组合信号并提供具有相移的输出信号。反馈回路基于输入信号和输出信号产生误差信号，基于误差信号和输入信号产生组合信号，并执行相位旋转以去除至少部分相移。

6. 发明申请

WO2010151569A1 TRANSMITTER ARCHITECTURES 审中-公开
标题翻译：发射机架构
公开(公告)号：WO2010151569A1
公开(公告)日：2010-12-29
申请号：PCT/US2010/039612
申请日：2010-06-23
申请人： QUALCOMM INCORPORATED , APARIN, Vladimir
发明人： APARIN, Vladimir
IPC分类号： H04B1/04
CPC分类号： H04B1/0475
摘要： Techniques for generating a transmit (TX) signal with improved characteristics in the presence of interference such as noise and distortion. In one aspect, the TX output signal is used to generate a reconstructed signal having the characteristics of the interference, and the reconstructed signal is subtracted from the baseband TX signal. The reconstructed signal may be generated by high-pass filtering the TX output signal at baseband. Alternatively, the reconstructed signal may be generated from a reference signal Ref derived from the baseband TX signal.
摘要翻译：用于在存在诸如噪声和失真的干扰的情况下产生具有改进特性的发射（TX）信号的技术。一方面，TX输出信号用于产生具有干扰特性的重构信号，并且从基带TX信号中减去重构信号。重构的信号可以通过在基带处对TX输出信号进行高通滤波来产生。或者，可以从从基带TX信号导出的参考信号Ref生成重构信号。

7. 发明申请

WO2009111346A1 DYNAMIC REFERENCE FREQUENCY FOR FRACTIONAL-N PHASE-LOCKED LOOP 审中-公开
标题翻译：分段N相锁定环路的动态参考频率
公开(公告)号：WO2009111346A1
公开(公告)日：2009-09-11
申请号：PCT/US2009/035577
申请日：2009-02-27
申请人： QUALCOMM Incorporated , CICCARELLI, Steven C. , BOSSU, Frederic , APARIN, Vladimir , WANG, Kevin H.
发明人： CICCARELLI, Steven C. , BOSSU, Frederic , APARIN, Vladimir , WANG, Kevin H.
IPC分类号： H03L7/197 , H04B15/06
CPC分类号： H03L7/1974
摘要： Within a receiver, the frequency of a comparison reference clock signal supplied to a fractional-N Phase-Locked Loop (PLL) is dynamically changed such that undesirable reciprocal mixing of reference spurs with known jammers (for example, transmit leakage) is minimized. As the transmit channel changes within a band, and as the transmit leakage frequency changes, a circuit changes the frequency of the comparison reference clock signal such that reference spurs generated by the PLL are moved in frequency so that they do not reciprocally mix with transmitter leakage in undesirable ways. In a second aspect, the PLL is operable either as an integer-N PLL or a fractional-N PLL. In low total receive power situations, the PLL operates as an integer-N PLL to reduce receiver susceptibility to fractional-N spurs. In a third aspect, jammer detect information is used to determine the comparison reference clock signal frequency.
摘要翻译：在接收机内，提供给分数N锁相环（PLL）的比较参考时钟信号的频率被动态地改变，使得具有已知干扰的参考杂波（例如，传输泄漏）的不期望的相互混合被最小化。当发射信道在频带内变化时，并且随着发射泄漏频率的变化，电路改变比较参考时钟信号的频率，使得PLL产生的参考杂波频率移动，使得它们不与发射机泄漏相互混合以不良的方式。在第二方面，PLL可以作为整数N个PLL或分数N PLL来操作。在低总接收功率情况下，PLL作为整数N PLL进行操作，以减少接收机对分数N个杂散的敏感性。在第三方面，使用干扰检测信息来确定比较参考时钟信号频率。

8. 发明申请

WO2012177913A1 METHOD AND APPARATUS FOR A LOCAL COMPETITIVE LEARNING RULE THAT LEADS TO SPARSE CONNECTIVITY 审中-公开
标题翻译：针对当地竞争性学习的方法和设备引导疏漏的连接性
公开(公告)号：WO2012177913A1
公开(公告)日：2012-12-27
申请号：PCT/US2012/043594
申请日：2012-06-21
申请人： QUALCOMM INCORPORATED , APARIN, Vladimir
发明人： APARIN, Vladimir
IPC分类号： G06N3/08
CPC分类号： G06N3/08 , G05B13/024 , G05B13/027 , G06N3/06 , G06N3/088
摘要： Certain aspects of the present disclosure support a local competitive learning rule applied in a computational network that leads to sparse connectivity among processing units of the network. The present disclosure provides a modification to the Oja learning rule, modifying the constraint on the sum of squared weights in the Oja rule. This constraining can be intrinsic and local as opposed to the commonly used multiplicative and subtractive normalizations, which are explicit and require the knowledge of all input weights of a processing unit to update each one of them individually. The presented rule provides convergence to a weight vector that is sparser (i.e., has more zero elements) than the weight vector learned by the original Oja rule. Such sparse connectivity can lead to a higher selectivity of processing units to specific features, and it may require less memory to store the network configuration and less energy to operate it.
摘要翻译：本公开的某些方面支持在计算网络中应用的本地竞争性学习规则，其导致网络的处理单元之间的稀疏连接。本公开提供了对Oja学习规则的修改，修改了Oja规则中的平方权重之和的约束。这种约束可以是内在的和局部的，而不是通常使用的乘法和减法规范化，它们是显式的，并且需要知道处理单元的所有输入权重以分别更新它们中的每一个。所呈现的规则提供了与由原始Oja规则学习的权重向量相比更加稀疏（即，具有更多零个元素）的权重向量的收敛。这种稀疏连接可以导致处理单元对特定特征的更高选择性，并且可能需要更少的存储器来存储网络配置和较少的能量来操作它。

9. 发明申请

WO2012162663A1 METHOD AND APPARATUS FOR UNSUPERVISED TRAINING OF INPUT SYNAPSES OF PRIMARY VISUAL CORTEX SIMPLE CELLS AND OTHER NEURAL CIRCUITS 审中-公开
标题翻译：主要视觉CORTEX简单细胞和其他神经电路输入信号的不间断训练的方法和装置
公开(公告)号：WO2012162663A1
公开(公告)日：2012-11-29
申请号：PCT/US2012/039704
申请日：2012-05-25
申请人： QUALCOMM Incorporated , APARIN, Vladimir
发明人： APARIN, Vladimir
IPC分类号： G06N3/063
CPC分类号： G06N3/063
摘要： Certain aspects of the present disclosure present a technique for unsupervised training of input synapses of primary visual cortex (V1) simple cells and other neural circuits. The proposed unsupervised training method utilizes simple neuron models for both Retinal Ganglion Cell (RGC) and V1 layers. The model simply adds the weighted inputs of each cell, wherein the inputs can have positive or negative values. The resulting weighted sums of inputs represent activations that can also be positive or negative. In an aspect of the present disclosure, the weights of each V1 cell can be adjusted depending on a sign of corresponding RGC output and a sign of activation of that V1 cell in the direction of increasing the absolute value of the activation. The RGC-to-V1 weights can be positive and negative for modeling ON and OFF RGCs, respectively.
摘要翻译：本公开的某些方面提供了用于无监督训练初级视皮层（V1）简单细胞和其他神经电路的输入突触的技术。提出的无监督训练方法使用简单的神经元模型用于视网膜神经节细胞（RGC）和V1层。该模型简单地添加每个单元的加权输入，其中输入可以具有正值或负值。所得的加权输入总和代表也可以是正或负的激活。在本公开的一方面，可以根据对应的RGC输出的符号和在增加激活的绝对值的方向激活该V1小区的符号来调整每个V1小区的权重。 RGC-to-V1权重可以分别为ON和OFF RGC的正负值。

10. 发明申请

WO2012109650A1 FRONT-END RF FILTERS WITH EMBEDDED IMPEDANCE TRANSFORMATION 审中-公开
标题翻译：具有嵌入式阻抗变换的前端射频滤波器
公开(公告)号：WO2012109650A1
公开(公告)日：2012-08-16
申请号：PCT/US2012/024870
申请日：2012-02-13
申请人： QUALCOMM Incorporated , APARIN, Vladimir
发明人： APARIN, Vladimir
IPC分类号： H04B1/04 , H04B1/18
CPC分类号： H04B1/0458 , H04B1/005 , H04B1/18
摘要： Front-end radio frequency (RF) filters with embedded impedance transformation are disclosed. In an exemplary design, an apparatus includes an active circuit and an RF filter. The active circuit receives an input signal and provides an output signal. The RF filter is operatively coupled to an antenna and the active circuit and performs filtering for the input signal or output signal. The RF filter is impedance matched to the active circuit and includes a non-LC filter. In an exemplary design, the active circuit includes a low noise amplifier (LNA), and the RF filter includes a receive (RX) filter having an output impedance that is matched to an input impedance of the LNA. In another exemplary design, the active circuit includes a power amplifier, and the RF filter includes a transmit (TX) filter having an input impedance that is matched to an output impedance of the power amplifier.
摘要翻译：公开了具有嵌入式阻抗变换的前端射频（RF）滤波器。在示例性设计中，装置包括有源电路和RF滤波器。有源电路接收输入信号并提供输出信号。 RF滤波器可操作地耦合到天线和有源电路，并且对输入信号或输出信号执行滤波。 RF滤波器与有源电路阻抗匹配，并包括非LC滤波器。在示例性设计中，有源电路包括低噪声放大器（LNA），并且RF滤波器包括具有与LNA的输入阻抗匹配的输出阻抗的接收（RX）滤波器。在另一示例性设计中，有源电路包括功率放大器，并且RF滤波器包括具有与功率放大器的输出阻抗匹配的输入阻抗的发射（TX）滤波器。

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