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1. 发明申请

WO2009140656A2 HIGH-SPEED LOW-POWER LATCHES 审中-公开
标题翻译：高速低功率锁存器
公开(公告)号：WO2009140656A2
公开(公告)日：2009-11-19
申请号：PCT/US2009/044242
申请日：2009-05-15
申请人： QUALCOMM INCORPORATED , ZHANG, Kun , MUTHALI, Harish
发明人： ZHANG, Kun , MUTHALI, Harish
IPC分类号： H03K3/356 , H03K5/156
CPC分类号： H03K3/356139 , H03K3/017 , H03K3/356121 , H03K3/35625 , H03K5/00006 , H03K5/1565
摘要： [A high-speed low-power latch includes three sets of transistors. A first set of transistors selects a tracking mode or a holding mode for the latch based on a clock signal having non-rail-to-rail or rail-to-rail voltage swing. A second set of transistors captures a data value based on an input signal and provides an output signal during the tracking mode. A third set of transistors stores the data value and provides the output signal during the holding mode. The input and output signals have rail-to-rail voltage swing. In another aspect, a signal generator includes at least one latch and a control circuit. The latch(es) receive a clock signal and generate an output signal. The control circuit senses a duty cycle of a feedback signal derived from the output signal and generates a control signal to adjust operation of the latch(es) to obtain 50% duty cycle for the feedback signal.
摘要翻译： [高速低功耗锁存器包括三组晶体管。第一组晶体管基于具有非轨至轨或轨至轨电压摆幅的时钟信号选择用于锁存器的跟踪模式或保持模式。第二组晶体管基于输入信号捕获数据值，并在跟踪模式期间提供输出信号。第三组晶体管存储数据值，并在保持模式期间提供输出信号。输入和输出信号具有轨到轨电压摆幅。在另一方面，信号发生器包括至少一个锁存器和控制电路。锁存器接收时钟信号并产生输出信号。控制电路感测从输出信号导出的反馈信号的占空比，并产生控制信号以调整锁存器的操作，以获得反馈信号的50％占空比。

2. 发明申请

WO2008112789A2 ACTIVE CIRCUITS WITH ISOLATION SWITCHES 审中-公开
标题翻译：带有隔离开关的有源电路
公开(公告)号：WO2008112789A2
公开(公告)日：2008-09-18
申请号：PCT/US2008/056696
申请日：2008-03-12
申请人： QUALCOMM INCORPORATED , KIM, Tae Wook , BARNETT, Kenneth Charles , MUTHALI, Harish
发明人： KIM, Tae Wook , BARNETT, Kenneth Charles , MUTHALI, Harish
IPC分类号： H03F3/72 , H03F3/68
CPC分类号： H03F3/72 , H03F1/342 , H03F3/211 , H03F3/45475 , H03F3/68 , H03F2203/21142 , H03F2203/45731
摘要： Active circuits with isolation switches are described. In one design, an apparatus includes first and second amplifiers coupled in parallel. Each amplifier receives an input signal and provides an output signal. Each amplifier has a switch that isolates the amplifier when the amplifier is turned off. The first and second amplifiers may be high and low gain amplifiers or two low noise amplifiers (LNAs). The first and second amplifiers may be for different communication systems, different frequency bands, and/or different gain ranges. In general, any number of amplifiers may be coupled in parallel, and each amplifier may have a switch to isolate that amplifier when turned off. A switch for an amplifier may be a shunt switch coupled between an internal node of the amplifier and ground. The shunt switch may be closed when the amplifier is turned off and may be opened when the amplifier is turned on.
摘要翻译：描述了具有隔离开关的有源电路。在一种设计中，装置包括并联耦合的第一和第二放大器。每个放大器接收一个输入信号并提供一个输出信号。每个放大器都有一个开关，用于在放大器关闭时隔离放大器。第一和第二放大器可以是高和低增益放大器或两个低噪声放大器（LNA）。第一和第二放大器可以用于不同的通信系统，不同的频带和/或不同的增益范围。通常，任何数量的放大器可以并联耦合，并且每个放大器在关闭时可以具有开关以隔离该放大器。放大器的开关可以是耦合在放大器的内部节点与地之间的分路开关。当放大器关闭时，分流开关可能会闭合，放大器开启时可能会打开分流开关。

3. 发明申请

WO2008115907A1 LINEAR TRANSCONDUCTOR FOR RF COMMUNICATIONS 审中-公开
标题翻译：用于射频通信的线性TRANSCONDUCTOR
公开(公告)号：WO2008115907A1
公开(公告)日：2008-09-25
申请号：PCT/US2008/057319
申请日：2008-03-18
申请人： QUALCOMM Incorporated , MUTHALI, Harish , BARNETT, Kenneth, Charles
发明人： MUTHALI, Harish , BARNETT, Kenneth, Charles
IPC分类号： H03F1/32 , H03F3/45
CPC分类号： H03F3/45188 , H03F1/32 , H03F1/3211 , H03F3/45 , H03F3/45659 , H03F2200/357 , H03F2203/45068 , H03F2203/45318 , H03F2203/45352
摘要： The present patent application comprises a linear transconductor having at least one input and at least one output, comprising a differential amplifier having a plurality of transistors and a plurality of inputs, wherein a difference of input signals is amplified, a cascode circuit having a plurality of transistors, wherein the transistors are operably connected to the differential amplifier, wherein reverse isolation between an input and an output of the linear transconductor is improved by decoupling the input and the output of the linear transconductor by mounting at least one transistor of the plurality of transistors of the cascode circuit as a common-gate stacked on the at least one transistor of the differential amplifier, an active load having a plurality of transistors operably connected between the cascode circuit and supply voltage, and an auxiliary device operably connected to the connection between the active load, the cascode device and ground.
摘要翻译：本专利申请包括具有至少一个输入和至少一个输出的线性跨导体，包括具有多个晶体管和多个输入的差分放大器，其中输入信号的差异被放大，具有多个输入信号的共源共栅电路晶体管，其中晶体管可操作地连接到差分放大器，其中线性跨导器的输入和输出之间的反向隔离通过将多个晶体管中的至少一个晶体管安装到线性跨导器的输入和输出而被改善作为堆叠在差分放大器的至少一个晶体管上的公共栅极的共源共栅电路，具有可操作地连接在共源共栅电路和电源电压之间的多个晶体管的有源负载和可操作地连接到所述串联电路之间的连接的辅助装置有源负载，共源共栅器件和地。

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