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1. 发明申请

WO2018194816A1 SYSTEM AND METHOD FOR INTELLIGENT DATA/FRAME COMPRESSION IN A SYSTEM ON A CHIP 审中-公开
公开(公告)号：WO2018194816A1
公开(公告)日：2018-10-25
申请号：PCT/US2018/025240
申请日：2018-03-29
申请人： QUALCOMM INCORPORATED
发明人： GADELRAB, Serag , CHIU, Chinchuan , KHAN, Moinul , ERNEWEIN, Kyle , LONGO, Tom , BOOTH, Simon , VARIA, Meghal , ALEKSIC, Milivoje , LAI, King-Chung
IPC分类号： H04N19/85
摘要： An exemplary method for intelligent compression defines a threshold value for a key performance indicator. Based on the key performance indicator value, data blocks generated by a producer component may be scaled down to reduce power and/or bandwidth consumption when being compressed according to a lossless compression module. The compressed data blocks are then stored in a memory component along with metadata that signals the scaling factor used prior to compression. Consumer components later retrieving the compressed data blocks from the memory component may decompress the data blocks and upscale, if required, based on the scaling factor signaled by the metadata.

2. 发明申请

WO2016160182A1 COMMAND-DRIVEN TRANSLATION PRE-FETCH FOR MEMORY MANAGEMENT UNITS 审中-公开
标题翻译：用于内存管理单元的命令驱动翻译预备电路
公开(公告)号：WO2016160182A1
公开(公告)日：2016-10-06
申请号：PCT/US2016/019314
申请日：2016-02-24
申请人： QUALCOMM INCORPORATED
发明人： PODAIMA, Jason, Edward , RYCHLIK, Bohuslav , WIERCIENSKI, Paul, Christopher, John , ERNEWEIN, Kyle, John , MOREIRA, Carlos, Javier , VARIA, Meghal , GADELRAB, Serag
IPC分类号： G06F12/08 , G06F12/10
CPC分类号： G06F12/0862 , G06F12/0875 , G06F12/10 , G06F12/1027 , G06F2212/1021 , G06F2212/452 , G06F2212/602 , G06F2212/6028 , G06F2212/654 , G06F2212/684
摘要： Methods and systems for pre-fetching address translations in a memory management unit (MMU) of a device are disclosed. In an embodiment, the MMU receives a pre-fetch command from an upstream component of the device, the pre-fetch command including an address of an instruction, pre-fetches a translation of the instruction from a translation table in a memory of the device, and stores the translation of the instruction in a translation cache associated with the MMU.
摘要翻译：公开了用于在设备的存储器管理单元（MMU）中预取地址转换的方法和系统。在一个实施例中，MMU从设备的上游部件接收预取命令，预取命令包括指令的地址，从设备的存储器中的转换表预取指令的转换并将指令的转换存储在与MMU相关联的转换高速缓存中。

3. 发明申请

WO2016069284A1 SYSTEM AND METHOD FOR MANAGING SAFE DOWNTIME OF SHARED RESOURCES WITHIN A PCD 审中-公开
标题翻译：用于管理PCD中共享资源的安全停止的系统和方法
公开(公告)号：WO2016069284A1
公开(公告)日：2016-05-06
申请号：PCT/US2015/055830
申请日：2015-10-15
申请人： QUALCOMM INCORPORATED
发明人： DUROIU, Cristian , GADELRAB, Serag , CHAMARTY, Vinod , SINHA, Pooja , CHAPARRO, John, Daniel , VOOTUKURU, Anil , CUPPU, Vinodh, Ramesh , LEE, Joseph, Schweiray , MITTER, Vinay , CHOW, Paul , LIU, Ruolong , KUAN, Johnny, Jone, Wai , DROP, Michael
IPC分类号： G06F9/50
CPC分类号： H04L47/783 , G06F9/50 , G06F9/5016 , G06F9/505 , H04L47/72
摘要： A method and system for managing safe downtime of shared resources within a portable computing device are described. The method may include determining a tolerance for a downtime period for an unacceptable deadline miss element of the portable computing device. Next, the determined tolerance for the downtime period may be transmitted to quality-of-service ("QoS") controller. The QoS controller may determine if the tolerance for the downtime period needs to be adjusted. The QoS controller may receive a downtime request from one or more shared resources of the portable computing device. The QoS controller may determine if the downtime request needs to be adjusted. Next, the QoS controller may select a downtime request for execution and then identify which one or more unacceptable deadline miss elements of the portable computing device that are impacted by the selected downtime request.
摘要翻译：描述了用于管理便携式计算设备内的共享资源的安全停机的方法和系统。该方法可以包括确定便携式计算设备的不可接受的最后期限缺失元件的停机时间的容差。接下来，所确定的停机时间的容限可以发送到服务质量（“QoS”）控制器。 QoS控制器可以确定是否需要调整停机时间的公差。 QoS控制器可以从便携式计算设备的一个或多个共享资源接收停机请求。 QoS控制器可以确定是否需要调整停机请求。接下来，QoS控制器可以选择用于执行的停机请求，然后识别受所选择的停机时间请求影响的便携式计算设备中哪一个或多个不可接受的最后期限未决元件。

4. 发明申请

WO2016064657A1 SYSTEM AND METHOD FOR DYNAMIC BANDWIDTH THROTTLING BASED ON DANGER SIGNALS MONITORED FROM ONE MORE ELEMENTS UTILIZING SHARED RESOURCES 审中-公开
标题翻译：基于使用共享资源的更多元素监测的危险信号的动态带宽图像的系统和方法
公开(公告)号：WO2016064657A1
公开(公告)日：2016-04-28
申请号：PCT/US2015/055829
申请日：2015-10-15
申请人： QUALCOMM INCORPORATED
发明人： GADELRAB, Serag , DUROIU, Cristian , CHAMARTY, Vinod , SINHA, Pooja , CHAPARRO, John Daniel , VOOTUKURU, Anil , CUPPU, Vinodh Ramesh , LEE, Joseph Schweiray , MITTER, Vinay , CHOW, Paul , LIU, Ruolong , KUAN, Johnny Jone Wai
IPC分类号： G06F11/07
CPC分类号： G06F11/0781 , G06F1/08 , G06F11/0742 , G06F11/0793 , G06F13/4022
摘要： A method and system for adjusting bandwidth within a portable computing device based on danger signals monitored from one on more elements of the portable computing device are disclosed. A danger level of an unacceptable deadline miss ("UDM") element of the portable computing device may be determined with a danger level sensor within the UDM element. Next, a quality of service ("QoS") controller may adjust a magnitude for one or more danger levels received based on the UDM element type that generated the danger level and based on a potential fault condition type associated with the particular danger level. The danger levels received from one UDM element may be mapped to at least one of another UDM element and a non-UDM element. A quality of service policy for each UDM element and non-UDM element may be mapped in accordance with the danger levels.
摘要翻译：公开了一种用于基于从便携式计算设备的更多元件监控的危险信号来调整便携式计算设备内的带宽的方法和系统。可以使用UDM元件内的危险水平传感器来确定便携式计算设备的不可接受的期限错误（“UDM”）元件的危险等级。接下来，服务质量（“QoS”）控制器可以基于生成危险等级的UDM元素类型并且基于与特定危险等级相关联的潜在故障条件类型来调整接收到的一个或多个危险等级的大小。从一个UDM元件接收到的危险等级可被映射到另一UDM元件和非UDM元件中的至少一个。可以根据危险等级映射每个UDM元素和非UDM元素的服务质量策略。

5. 发明申请

WO2014092876A1 SYSTEM AND METHOD FOR MANAGING PERFORMANCE OF A COMPUTING DEVICE HAVING DISSIMILAR MEMORY TYPES 审中-公开
标题翻译：用于管理具有DISSIMILAR存储器类型的计算设备的性能的系统和方法
公开(公告)号：WO2014092876A1
公开(公告)日：2014-06-19
申请号：PCT/US2013/067843
申请日：2013-10-31
申请人： QUALCOMM INCORPORATED
发明人： CHUN, Dexter, T. , GADELRAB, Serag , MOLLOY, Stephen , ZENG, Thomas
IPC分类号： G06F13/16 , G06F12/06
CPC分类号： G06F12/0607 , G06F13/1647 , G06F13/1694
摘要： Systems and methods are provided for managing performance of a computing device having dissimilar memory types. An exemplary embodiment comprises a method for interleaving dissimilar memory devices. The method involves determining an interleave bandwidth ratio comprising a ratio of bandwidths for two or more dissimilar memory devices. The dissimilar memory devices are interleaved according to the interleave bandwidth ratio. Memory address requests are distributed from one or more processing units to the dissimilar memory devices according to the interleave bandwidth ratio.
摘要翻译：提供了用于管理具有不同存储器类型的计算设备的性能的系统和方法。示例性实施例包括用于交错不同存储器件的方法。该方法涉及确定包括两个或多个不同存储器件的带宽比的交织带宽比。不同的存储器件根据交织带宽比进行交织。存储器地址请求根据交织带宽比从一个或多个处理单元分配到不同的存储器设备。

6. 发明申请

WO2011084754A1 TEMPORAL AND SPATIAL VIDEO BLOCK REORDERING IN A DECODER TO IMPROVE CACHE HITS 审中-公开
标题翻译：解码器中的时间和空间视频块重新改变高速缓存
公开(公告)号：WO2011084754A1
公开(公告)日：2011-07-14
申请号：PCT/US2010/061368
申请日：2010-12-20
申请人： QUALCOMM Incorporated , ANDRIJANIC, Vladan , GADELRAB, Serag
发明人： ANDRIJANIC, Vladan , GADELRAB, Serag
IPC分类号： H04N7/26 , H04N7/36
CPC分类号： H04N19/433 , H04N19/102 , H04N19/137 , H04N19/176 , H04N19/44 , H04N19/51
摘要： This disclosure describes techniques in which the decoding order of video blocks is modified relative to the display order of video blocks. The decoding order may be modified temporally such that video blocks of different video frames (or other coded units) are decoded in an alternating manner. In this case, the decoding order of video blocks may alternate between video blocks of two or more different frames. Furthermore, the decoding order may also be modified spatially within a given video block such that the video blocks are decoded in an order that does not correspond to the raster scan order of the video blocks. The techniques may improve the use of memory by improving the likelihood of cache hits, thereby reducing the number of memory loads from an external memory to an internal cache associated with the decoder.
摘要翻译：本公开描述了相对于视频块的显示顺序修改视频块的解码顺序的技术。可以在时间上修改解码顺序，使得以交替方式解码不同视频帧（或其他经编码单位）的视频块。在这种情况下，视频块的解码顺序可以在两个或更多个不同帧的视频块之间交替。此外，解码顺序也可以在给定视频块内的空间上被修改，使得以不符合视频块的光栅扫描顺序的顺序对视频块进行解码。这些技术可以通过改进高速缓存命中的可能性来改善存储器的使用，从而减少从外部存储器到与解码器相关联的内部高速缓存的存储器负载的数量。

7. 发明申请

WO2017048463A1 SYSTEM AND METHOD FOR CONTROLLING MEMORY FREQUENCY USING FEED-FORWARD COMPRESSION STATISTICS 审中-公开
标题翻译：使用前馈压缩统计控制存储器频率的系统和方法
公开(公告)号：WO2017048463A1
公开(公告)日：2017-03-23
申请号：PCT/US2016/048031
申请日：2016-08-22
申请人： QUALCOMM INCORPORATED
发明人： GADELRAB, Serag , KOTTILINGAL, Sudeep Ravi , VARIA, Meghal , SINHA, Pooja , PATEL, Ujwal , LIU, Ruolong , CHU, Jeffrey , GHOLAMIAN, Sina , CHUNG, Hyukjune , STRASSER, David , NAGARAJ, Raghavendra , DEMERS, Eric
IPC分类号： G06F1/32
CPC分类号： G06F3/0656 , G06F1/324 , G06F1/3275 , G06F1/3296 , G06F3/0613 , G06F3/0661 , G06F3/0683 , G06F13/1673 , Y02D10/126 , Y02D10/13 , Y02D10/14 , Y02D10/172
摘要： Systems, methods, and computer programs are disclosed for controlling memory frequency. One method comprises a first memory client generating a compressed data buffer and compression statistics related to the compressed data buffer. The compressed data buffer and the compression statistics are stored in a memory device. Based on the stored compression statistics, a frequency or voltage setting of the memory device is adjusted for enabling a second memory client to read the compressed data buffer.
摘要翻译：公开了用于控制存储器频率的系统，方法和计算机程序。一种方法包括产生压缩数据缓冲器的第一存储器客户端和与压缩数据缓冲器有关的压缩统计。压缩数据缓冲器和压缩统计信息存储在存储器件中。基于存储的压缩统计，调整存储器件的频率或电压设置，以使第二存储器客户端能够读取压缩数据缓冲器。

8. 发明申请

WO2017014914A1 ADDRESS TRANSLATION AND DATA PRE-FETCH IN A CACHE MEMORY SYSTEM 审中-公开
标题翻译：地址转换和数据缓存在缓存存储器系统中
公开(公告)号：WO2017014914A1
公开(公告)日：2017-01-26
申请号：PCT/US2016/039456
申请日：2016-06-26
申请人： QUALCOMM INCORPORATED
发明人： ZGHAL, Tarek , ARTIERI, Alain Dominique , PODAIMA, Jason Edward , VARIA, Meghal , GADELRAB, Serag
IPC分类号： G06F12/0862
CPC分类号： G06F3/0611 , G06F3/0656 , G06F3/0673 , G06F12/0862 , G06F2212/1021 , G06F2212/602 , G06F2212/6026 , G06F2212/6028 , G06F2212/654
摘要： Systems, methods, and computer program products are disclosed for reducing latency in a system that includes one or more processing devices, a system memory, and a cache memory. A pre-fetch command that identifies requested data is received from a requestor device. The requested data is pre-fetched from the system memory into the cache memory in response to the pre-fetch command. The data pre-fetch may be preceded by a pre-fetch of an address translation. A data access request corresponding to the pre-fetch command is then received, and in response to the data access request the data is provided from the cache memory to the requestor device.
摘要翻译：公开了系统，方法和计算机程序产品，用于减少包括一个或多个处理设备，系统存储器和高速缓冲存储器的系统中的延迟。从请求器设备接收到识别所请求数据的预取命令。响应于预取命令，将所请求的数据从系统存储器预取入高速缓冲存储器。之前的数据预取可以预先获取地址转换。然后接收与预取命令相对应的数据访问请求，并且响应于数据访问请求，从缓存存储器向请求器设备提供数据。

9. 发明申请

WO2012054754A1 ARBITRATING BUS TRANSACTIONS ON A COMMUNICATIONS BUS BASED ON BUS DEVICE HEALTH INFORMATION AND RELATED POWER MANAGEMENT 审中-公开
标题翻译：根据总线设备健康信息和相关电源管理对通信总线进行总线交易
公开(公告)号：WO2012054754A1
公开(公告)日：2012-04-26
申请号：PCT/US2011/057142
申请日：2011-10-20
申请人： QUALCOMM INCORPORATED , DUROIU, Cristian , GANASAN, Jaya Prakash Subramaniam , CHAMARTY, Vinod , SCHAFFER, Mark Michael , STUBBS, Joshua H. , GIBSON, Robert N. , TIRI, Kris , KHAN, Moinul H. , RYCHLIK, Bohuslav , GADELRAB, Serag , BOOTH, Simon
发明人： DUROIU, Cristian , GANASAN, Jaya Prakash Subramaniam , CHAMARTY, Vinod , SCHAFFER, Mark Michael , STUBBS, Joshua H. , GIBSON, Robert N. , TIRI, Kris , KHAN, Moinul H. , RYCHLIK, Bohuslav , GADELRAB, Serag , BOOTH, Simon
IPC分类号： G06F13/362
CPC分类号： G06F13/362 , Y02D10/14
摘要： Devices, systems, methods, and computer-readable mediums for arbitrating bus transactions on a communications bus based on health information are disclosed. Health information of master devices can be used to adjust priorities of bus transactions from master devices to meet quality of service requirements of the master devices. In one embodiment, a bus interconnect is provided and configured to communicate bus transactions from any of a plurality of master devices to slave device(s) coupled the bus interconnect. The bus interconnect is further configured to map health information for each of the plurality of master devices into virtual priority space. The bus interconnect is further configured to translate the virtual priority space into a physical priority level for each of the plurality of master devices. The bus interconnect is further configured to arbitrate bus transactions for the plurality of master devices based on physical priority level for the plurality of master devices.
摘要翻译：公开了用于基于健康信息在通信总线上仲裁总线事务的设备，系统，方法和计算机可读介质。主设备的健康信息可用于调整主设备总线事务的优先级，以满足主设备的服务质量要求。在一个实施例中，总线互连被提供和配置为将总线事务从多个主设备中的任一个传送到耦合总线互连的从设备。总线互连还被配置为将多个主设备中的每一个的健康信息映射到虚拟优先级空间中。总线互连还被配置为将虚拟优先级空间转换为多个主设备中的每一个的物理优先级。总线互连还被配置为基于多个主设备的物理优先级来仲裁多个主设备的总线事务。

10. 发明申请

WO2018194815A2 SYSTEM AND METHOD FOR INTELLIGENT DATA/FRAME COMPRESSION IN A SYSTEM ON A CHIP 审中-公开
公开(公告)号：WO2018194815A2
公开(公告)日：2018-10-25
申请号：PCT/US2018/025233
申请日：2018-03-29
申请人： QUALCOMM INCORPORATED
发明人： GADELRAB, Serag , CHIU, Chinchuan , KHAN, Moinul , ERNEWEIN, Kyle , LONGO, Tom , BOOTH, Simon , VARIA, Meghal , ALEKSIC, Milivoje
IPC分类号： H04N19/176 , H04N19/172 , H04N19/146 , H04N19/152 , H04N19/103 , H04N19/117 , H04N19/156
摘要： An exemplary method for intelligent compression defines a threshold value for a temperature reading generated by a temperature sensor. Data blocks received into the compression module are compressed according to either a first mode or a second mode, the selection of which is determined based on a comparison of the active level for the temperature reading to the defined threshold value. The first compression mode may be associated with a lossless compression algorithm while the second compression mode is associated with a lossy compression algorithm. Or, both the first compression mode and the second compression mode may be associated with a lossless compression algorithm, however, for the first compression mode the received data blocks are produced at a default high quality level setting while for the second compression mode the received data blocks are produced at a reduced quality level setting.

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