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1. 发明申请

WO2013005945A2 METHOD FOR MANUFACTURING SUBSTRATE FOR SURFACE-ENHANCED RAMAN SCATTERING SPECTROSCOPY AND SUBSTRATE MANUFACTURED USING THE METHOD 审中-公开
标题翻译：用于制造表面增强拉曼散射光谱的基板的方法和使用该方法制造的基板
公开(公告)号：WO2013005945A2
公开(公告)日：2013-01-10
申请号：PCT/KR2012005124
申请日：2012-06-28
申请人： POSTECH ACAD IND FOUND , LEE JONG LAM , SON JUN HO , LEE IL HWAN
发明人： LEE JONG LAM , SON JUN HO , LEE IL HWAN
CPC分类号： G01N21/658 , B82Y40/00
摘要： The present invention relates to a substrate for surface-enhanced Raman scattering spectroscopy and a manufacturing method thereof. The manufacturing method for a substrate for surface-enhanced Raman scattering spectroscopy, according to the present invention, comprises: a nano-pattern formation step for plasma-treating the surface of a polymer substrate and then forming a nano-pattern on the surface thereof; and a metal film formation step for forming a metal film on the nano-pattern of the polymer substrate. Thus, the present invention can provide a substrate for surface-enhanced Raman scattering spectroscopy and a manufacturing method thereof, which exhibit high reproducibility as well as low manufacturing costs, and effectively induce hot spots, thereby improving the detection sensitivity of the substance.
摘要翻译：本发明涉及用于表面增强拉曼散射光谱的基板及其制造方法。根据本发明的用于表面增强拉曼散射光谱的基板的制造方法包括：纳米图案形成步骤，用于等离子体处理聚合物基材的表面，然后在其表面上形成纳米图案; 以及用于在聚合物基板的纳米图案上形成金属膜的金属膜形成步骤。因此，本发明可以提供一种表面增强拉曼散射光谱用基板及其制造方法，其再现性高，制造成本低，有效地诱发热点，提高物质的检测灵敏度。

2. 发明申请

WO2012091325A3 METHOD FOR MANUFACTURING LIGHT-EMITTING DIODE USING NANO-STRUCTURES AND LIGHT-EMITTING DIODE MANUFACTURED THEREBY 审中-公开
标题翻译：使用纳米结构制造发光二极管及其制造的发光二极管的方法
公开(公告)号：WO2012091325A3
公开(公告)日：2012-08-23
申请号：PCT/KR2011009625
申请日：2011-12-14
申请人： POSTECH ACAD IND FOUND , LEE JONG LAM , KIM JONG UK , SON JUN HO
发明人： LEE JONG LAM , KIM JONG UK , SON JUN HO
IPC分类号： H01L33/22
CPC分类号： H01L33/22
摘要： The present invention relates to a method for manufacturing a light-emitting diode having improved light extraction efficiency through dry-etching that utilizes nano-structures, and to a light-emitting diode having excellent light extraction efficiency manufactured through the method. The present invention relates to a method for manufacturing a vertical-type light-emitting diode, which has an active layer and a second semiconductor layer formed on a first semiconductor layer consecutively, the method comprising: (a) a step for coating nano-structures having a sphere shape on the second semiconductor layer; (b) a step for forming a concavo-convex portion on the second semiconductor layer by dry-etching the second semiconductor layer using the nano-structures as a mask; and (c) a step for micro-patterning so that sub-concavo-convex portions are formed on each of the concavo-convex surfaces that make up the concavo-convex portion by wet-etching the concavo-convex portion.
摘要翻译：本发明涉及通过利用纳米结构的干法蚀刻来提高光提取效率的发光二极管的制造方法以及通过该方法制造的具有优异的光提取效率的发光二极管。本发明涉及一种用于制造垂直型发光二极管的方法，所述垂直型发光二极管具有连续形成在第一半导体层上的有源层和第二半导体层，所述方法包括：（a）将纳米结构在所述第二半导体层上具有球形; （b）通过使用纳米结构作为掩模干蚀刻第二半导体层，在第二半导体层上形成凹凸部的步骤; （c）通过对凹凸部进行湿式蚀刻，在构成凹凸部的各凹凸面上形成副凹凸部的微构图工序。

3. 发明申请

WO2012099436A3 METHOD FOR MANUFACTURING A LIGHT-EMITTING DIODE, AND LIGHT-EMITTING DIODE MANUFACTURED THEREBY 审中-公开
标题翻译：制造发光二极管的方法和制造的发光二极管
公开(公告)号：WO2012099436A3
公开(公告)日：2012-09-20
申请号：PCT/KR2012000549
申请日：2012-01-20
申请人： POSTECH ACAD IND FOUND , LEE JONG LAM , KIM JONG UK , SON JUN HO , SONG YANG HEE , KIM BUEM JOON , YOO CHUL JONG
发明人： LEE JONG LAM , KIM JONG UK , SON JUN HO , SONG YANG HEE , KIM BUEM JOON , YOO CHUL JONG
IPC分类号： H01L33/22
CPC分类号： H01L33/22 , H01L2933/0091
摘要： The present invention relates to a method for manufacturing a light-emitting diode, in which the tilt angle of a convex-concave portion formed in a semiconductor layer are adjusted through the variation of a dry-etching condition using the difference between etching speeds (etching rates) of a nanostructure and a semiconductor layer during dry etching, to thereby improve light extraction efficiency. The present invention also relates to a light-emitting diode manufactured by the method. The present invention is a method for manufacturing a light-emitting diode in which an active layer and a second semiconductor layer are sequentially formed on a first semiconductor layer, wherein the method comprises: a step of coating a nanostructure onto the second semiconductor layer; and a step of dry-etching the nanostructure together with the second semiconductor layer using the nanostructure as a mask, to thus form a convex-concave portion in the second semiconductor layer. The nanostructure uses a material which enables easier dry-etching than the material of the second semiconductor layer, and a dry-etching condition is set in consideration of the difference in the etching rate between the second semiconductor layer and the nanostructure, so as to adjust the tilt angle of the side surface of the convex-concave portion formed in the second semiconductor layer.
摘要翻译：本发明涉及一种用于制造发光二极管的方法，其中通过使用蚀刻速度差（蚀刻速率）之间的干蚀刻条件的变化来调节形成在半导体层中的凸凹部分的倾斜角度速率）的干燥蚀刻中的纳米结构和半导体层，从而提高光提取效率。本发明还涉及通过该方法制造的发光二极管。本发明是一种制造发光二极管的方法，其中有源层和第二半导体层依次形成在第一半导体层上，其中该方法包括：将纳米结构涂覆在第二半导体层上的步骤; 以及使用纳米结构作为掩模将纳米结构与第二半导体层一起干蚀刻的步骤，从而在第二半导体层中形成凸凹部。纳米结构使用能够比第二半导体层的材料更容易干蚀刻的材料，并且考虑到第二半导体层和纳米结构之间的蚀刻速率的差异来设定干法蚀刻条件，以便调整形成在第二半导体层中的凸凹部的侧面的倾斜角度。

4. 发明申请

WO2013012195A2 METHOD FOR MANUFACTURING SUBSTRATE AND METHOD OR MANUFACTURING ELECTRONIC DEVICE USING SAME 审中-公开
标题翻译：制造衬底的方法和使用该方法或制造电子器件的方法
公开(公告)号：WO2013012195A2
公开(公告)日：2013-01-24
申请号：PCT/KR2012005466
申请日：2012-07-10
申请人： POSTECH ACAD IND FOUND , LEE JONG LAM , YOO CHUL JONG , KIM KI SOO , SON JUN HO
发明人： LEE JONG LAM , YOO CHUL JONG , KIM KI SOO , SON JUN HO
IPC分类号： H01L21/027
CPC分类号： H01L21/32139
摘要： The present invention relates to a method for significantly reduce manufacturing cost of an electronic device by selectively forming a nano-dimple on a metal layer that is patterned at a low cost. The method, according to the present invention comprises the steps of: (a) forming the metal layer on a substrate; (b) forming a mask layer, which is provided with a predetermined pattern, on the metal layer; (c) forming a metal oxide having self-alignment nano-holes on the metal layer, which is exposed, by submerging the substrate in an acid solution and applying a voltage; and (d) forming the nano-dimple on the metal layer by removing the metal oxide by means of etching.
摘要翻译：本发明涉及一种通过在以低成本图案化的金属层上选择性地形成纳米凹坑来显着降低电子器件的制造成本的方法。根据本发明的方法包括以下步骤：（a）在衬底上形成金属层; （b）在所述金属层上形成具有预定图案的掩模层; （c）通过将所述衬底浸没在酸溶液中并施加电压，在暴露的所述金属层上形成具有自对准纳米孔的金属氧化物; （d）通过蚀刻除去金属氧化物，在金属层上形成纳米凹坑。

5. 发明申请

WO2011028076A3 SEMICONDUCTOR LIGHT-EMITTING ELEMENT AND A PRODUCTION METHOD THEREFOR 审中-公开
标题翻译：半导体发光元件及其制造方法
公开(公告)号：WO2011028076A3
公开(公告)日：2011-05-26
申请号：PCT/KR2010006056
申请日：2010-09-07
申请人： SEOUL OPTO DEVICE CO LTD , POSTECH ACAD IND FOUND , LEE JONG LAM , SONG YANG HEE , SON JUN HO , KIM BUEM JOON
发明人： LEE JONG LAM , SONG YANG HEE , SON JUN HO , KIM BUEM JOON
IPC分类号： H01L33/36 , H01L33/38 , H01L33/40
CPC分类号： H01L33/40 , H01L33/0095 , H01L33/32 , H01L33/387
摘要： Provided is: a semiconductor light-emitting element comprising a semiconductor layer having a light-emitting structure; and an ohmic electrode incorporating a nanodot layer, a contact layer, a diffusion-preventing layer and a capping layer on the semiconductor layer, wherein the nanodot layer is formed on the N-polar surface of the semiconductor layer and is formed from a substance comprising at least one of Ag, Al and Au. Also provided is a production method therefor. In the ohmic electrode which has the multi-layer structure comprising the nanodot layer/contact layer/diffusion-preventing layer/capping layer in the semiconductor light-emitting element of this type, the nanodot layer constitutes the N-polar surface of a nitride semiconductor and improves the charge-injection characteristics such that outstanding ohmic characteristics can be obtained, while the contact layer acts as a diffusion barrier layer and inhibits deterioration due to the heat generated in a nitrogen-atmosphere heat treatment and in high-temperature and high-current injection conditions and hence the thermal stability is outstanding.
摘要翻译：提供：半导体发光元件，包括具有发光结构的半导体层; 以及在所述半导体层上结合有纳米点层，接触层，防扩散层和覆盖层的欧姆电极，其中所述纳米点层形成在所述半导体层的N-极性表面上并且由包含 Ag，Al和Au中的至少一种。还提供了其制造方法。在这种类型的半导体发光元件中，在具有纳米点层/接触层/扩散防止层/盖层的多层结构的欧姆电极中，纳米点层构成氮化物半导体的N极表面并改善了电荷注入特性，使得可以获得优异的欧姆特性，而接触层用作扩散阻挡层并且抑制由于在氮气氛热处理中产生的热量以及在高温和高电流注射条件，因此热稳定性非常好。

6. 发明申请

WO2013012194A3 METHOD FOR MANUFACTURING SUBSTRATE FOR LIGHT EMITTING DIODE, SUBSTRATE FOR LIGHT EMITTING DIODE MANUFACTURED THEREBY, AND METHOD FOR MANUFACTURING LIGHT EMITTING DIODE PROVIDED WITH SUBSTRATE FOR LIGHT EMITTING DIODE 审中-公开
标题翻译：制造用于发光二极管的基板的方法，由其制造的发光二极管的基板以及用于制造发光二极管的方法以及用于发光二极管的基板
公开(公告)号：WO2013012194A3
公开(公告)日：2013-03-14
申请号：PCT/KR2012005465
申请日：2012-07-10
申请人： POSTECH ACAD IND FOUND , LEE JONG LAM , LEE HWAN KEON , SON JUN HO , SONG YANG HEE , KIM BUEM JOON
发明人： LEE JONG LAM , LEE HWAN KEON , SON JUN HO , SONG YANG HEE , KIM BUEM JOON
IPC分类号： H01L33/20 , H01L33/22
CPC分类号： H01L33/007 , H01L33/22 , H01L33/32
摘要： The present invention relates to a method for manufacturing a substrate for a light emitting diode, a substrate for a light emitting diode manufactured thereby, and a method for manufacturing a light emitting diode provided with the substrate for a light emitting diode. The method for manufacturing a substrate for a light emitting diode, according to the present invention, comprises the steps of: coating the upper surface of a predetermined substrate member with a nanostructure, which comprises a material that is easier for dry etching than the substrate member; forming an upper surface uneven portion on the upper surface of the substrate member by dry etching the nanostructure and the substrate member, using the nanostructure as a mask; coating the lower surface of the substrate member with the nanostructure; and forming a lower surface uneven portion on the lower surface of the substrate member by dry etching the nanostructure and the substrate member, using the nanostructure as the mask. The present invention makes it possible to manufacture the substrate for a light emitting diode, which is provided with the uneven portion that is easily formed by coating the nanostructure and using same as the mask for dry etching, instead of using photolithography patterning, which has a high manufacturing cost and is complicated, and thus to reduce manufacturing time and cost of the substrate for a light emitting diode.
摘要翻译：发光二极管用基板的制造方法，由此制造的发光二极管用基板以及具备该发光二极管用基板的发光二极管的制造方法技术领域本发明涉及一种发光二极管用基板的制造方法，根据本发明的制造用于发光二极管的基板的方法包括以下步骤：用预定基板构件的上表面涂覆纳米结构，该纳米结构包括比基板构件更容易干蚀刻的材料 ; 使用纳米结构作为掩模，通过干蚀刻纳米结构和衬底部件在衬底部件的上表面上形成上表面不平坦部分; 用纳米结构涂覆衬底构件的下表面; 以及使用纳米结构作为掩模，通过干蚀刻纳米结构和基底构件在基底构件的下表面上形成下表面不平坦部分。本发明使得可以制造用于发光二极管的衬底，该衬底设置有通过涂覆纳米结构并将其用作干法刻蚀用掩模而容易地形成的不平坦部分，而不是使用光刻图案化，其具有制造成本高且复杂，并且因此减少用于发光二极管的衬底的制造时间和成本。

7. 发明申请

WO2012091271A3 METHOD FOR MANUFACTURING NANO-IMPRINT MOULD, METHOD FOR MANUFACTURING LIGHT-EMITTING DIODE USING THE NANO IMPRINT MOULD MANUFACTURED THEREBY, AND LIGHT-EMITTING DIODE MANUFACTURED THEREBY 审中-公开
标题翻译：制造纳米印模的方法，使用其制造的纳米印花模制造发光二极管的方法和制造的发光二极管
公开(公告)号：WO2012091271A3
公开(公告)日：2012-08-23
申请号：PCT/KR2011008158
申请日：2011-10-28
申请人： POSTECH ACAD IND FOUND , LEE JONG LAM , SON JUN HO , SONG YANG HEE
发明人： LEE JONG LAM , SON JUN HO , SONG YANG HEE
IPC分类号： B29C33/38 , B29C59/02 , G03F7/00
CPC分类号： H01L33/52 , B82Y10/00 , B82Y40/00 , G03F7/0002 , G03F7/0017 , H01L21/02019 , H01L21/30617 , H01L29/0665 , H01L33/005 , H01L33/0075
摘要： The present invention relates to a method for manufacturing a nano-imprint mould, a light-emitting diode using same, and a method for manufacturing same. The method for manufacturing a light-emitting diode of the present invention comprises: a step for forming on a temporary substrate an n-type nitride semiconductor layer, a light-emitting layer, and a p-type nitride semiconductor layer; a step for forming on the p-type nitride semiconductor layer a p-type electrode; a step for forming a conductive substrate on the p-type electrode; a step for exposing the n-type nitride semiconductor layer by removing the temporary substrate; a step for forming a nano-imprint resist layer on the n-type nitride semiconductor; a step for transferring a nano-pattern on the nano-imprint resist layer by pressurizing a nano-imprint mould on the nano-imprint resist layer; a step for isolating the nano-imprint mould from the nano-imprint resist layer having formed the nano-pattern; and a step for forming an n-type electrode by etching a part of the nano-imprint resist layer having formed the nano-pattern. The present invention enables a method for manufacturing a nano-imprint mould that can efficiently and economically form a nano-pattern for enhancing the light extraction efficiency of a light-emitting diode, a method for manufacturing a light-emitting diode, and a light-emitting diode using the nano-imprint mould.
摘要翻译：本发明涉及一种纳米压印模具的制造方法，使用该方法的发光二极管及其制造方法。本发明的发光二极管的制造方法包括：在临时衬底上形成n型氮化物半导体层，发光层和p型氮化物半导体层的步骤; 在p型氮化物半导体层上形成p型电极的工序; 在p型电极上形成导电性基板的工序; 通过去除所述临时衬底来暴露所述n型氮化物半导体层的步骤; 在n型氮化物半导体上形成纳米压印抗蚀剂层的步骤; 通过在纳米压印抗蚀剂层上加压纳米压印模具将纳米图案转印到纳米压印抗蚀剂层上的步骤; 从形成纳米图案的纳米压印抗蚀剂层分离纳米压印模具的步骤; 以及通过蚀刻形成纳米图案的纳米压印抗蚀剂层的一部分来形成n型电极的步骤。本发明使得能够有效且经济地形成用于提高发光二极管的光提取效率的纳米图案的纳米压印模具的制造方法，发光二极管的制造方法和发光二极管的制造方法，使用纳米压印模具的发光二极管。

8. 发明申请

WO2012005459A3 LIGHT-EMITTING DEVICE HAVING AN MGO PYRAMID STRUCTURE AND MANUFACTURING METHOD FOR SAME 审中-公开
标题翻译：具有MGO金字塔结构的发光器件及其制造方法
公开(公告)号：WO2012005459A3
公开(公告)日：2012-05-03
申请号：PCT/KR2011004592
申请日：2011-06-23
申请人： SEOUL OPTO DEVICE CO LTD , POSTECH ACAD IND FOUND , LEE JONG LAM , SON JUN HO , YU HAK KI
发明人： LEE JONG LAM , SON JUN HO , YU HAK KI
IPC分类号： H01L33/28 , H01L33/22
CPC分类号： H01L33/58 , H01L33/007 , H01L33/02 , H01L33/22 , H01L33/32 , H01L33/42 , H01L2933/0058
摘要： The present invention relates to a light-emitting device having a gallium nitride-based group III-V compound semiconductor and a manufacturing method for same. The light-emitting device having a gallium nitride-based group III-V compound semiconductor comprises: a substrate; a p-type ohmic electrode layer formed on the substrate; a p-type gallium nitride-based group III-V compound semiconductor layer formed on the p-type ohmic electrode layer; an n-type gallium nitride-based group III-V compound semiconductor layer formed on the p-type gallium nitride-based group III-V compound semiconductor layer; an n-type ohmic electrode layer formed on the n-type gallium nitride-based group III-V compound semiconductor layer; and first and second refractive index control layers which have refractive indices less than those of the n-type gallium nitride-based group III-V compound semiconductor layer and the n-type ohmic electrode layer, and the pyramid structure is formed on the surface of the second refractive index control layer. According to one embodiment of the present invention, the first and second refractive index control layers can be included in the upper portion of the light-emitting device having a gallium nitride-based group III-V compound semiconductor, and the pyramid structure can be formed in the second refractive index control layer, thereby increasing the surface light outputted by one and half times more than that of typical light-emitting diodes.
摘要翻译：本发明涉及具有氮化镓系III-V族化合物半导体的发光装置及其制造方法。具有氮化镓基III-V族化合物半导体的发光器件包括：衬底; 形成在基板上的p型欧姆电极层; 在p型欧姆电极层上形成的p型氮化镓系III-V族化合物半导体层，形成在所述p型氮化镓系III-V族化合物半导体层上的n型氮化镓系III-V族化合物半导体层，在n型氮化镓系III-V族化合物半导体层上形成的n型欧姆电极层，以及折射率小于n型氮化镓系III-V族化合物半导体层和n型欧姆电极层的折射率的第一和第二折射率控制层，并且金字塔结构形成在第二折射率控制层。根据本发明的一个实施例，第一和第二折射率控制层可以被包括在具有氮化镓基III-V族化合物半导体的发光器件的上部，并且可以形成金字塔结构在第二折射率控制层中，由此使输出的表面光增加比典型发光二极管的多1.5倍。

9. 发明申请

WO2011065745A3 LIGHT-EMITTING DIODE PACKAGE 审中-公开
标题翻译：发光二极管封装
公开(公告)号：WO2011065745A3
公开(公告)日：2011-09-15
申请号：PCT/KR2010008353
申请日：2010-11-24
申请人： SEOUL OPTO DEVICE CO LTD , POSTECH ACAD IND FOUND , LEE JONG LAM , SON JUN HO
发明人： LEE JONG LAM , SON JUN HO
IPC分类号： H01L33/48
CPC分类号： H01L33/486 , H01L33/02 , H01L2224/48091 , H01L2224/73265 , H01L2924/00014
摘要： Disclosed is a light-emitting diode package, comprising high-output and high-efficiency light-emitting diodes in which the efficiency droop phenomenon, which occurs in response to the injection of high current, is prevented to achieve improved light emission efficiency. The light-emitting diode package is configured such that the surface of a base on which the light-emitting diodes are to be attached is curved by means of a device or a specific structure, and the light-emitting diodes are die-bonded to the curved surface so as to enable the light-emitting diodes to be bent by the curvature of the curved surface. Here, stresses are applied to the light-emitting diodes, thus causing changes in a band structure of a quantum well layer. In the thus-produced light-emitting diode package, efficiency droop, which occurs in response to the injection of high current, is reduced to achieve the high output and high efficiency of the package.
摘要翻译：公开了一种发光二极管封装，其包括高输出和高效率的发光二极管，其中响应于高电流的注入而出现的效率下垂现象被阻止以实现改进的发光效率。发光二极管封装被构造成使得其上要附接发光二极管的基座的表面借助于装置或特定结构弯曲，并且发光二极管被芯片接合到弯曲的表面，以使得发光二极管能够通过曲面的弯曲而弯曲。这里，应力被施加到发光二极管，从而引起量子阱层的能带结构的变化。在这样制造的发光二极管封装中，响应于注入高电流而出现的效率下降被减小以实现封装的高输出和高效率。

10. 发明申请

WO2012046991A3 PATTERNING METHOD OF SEMICONDUCTOR AND SEMICONDUCTOR DEVICE THAT CONTAINS PATTERN FORMED BY PATTERNING METHOD 审中-公开
标题翻译：通过图形化方法形成图形的半导体器件和半导体器件的绘图方法
公开(公告)号：WO2012046991A3
公开(公告)日：2012-06-07
申请号：PCT/KR2011007309
申请日：2011-10-04
申请人： POSTECH ACAD IND FOUND , LEE JONG LAM , SONG YANG HEE
发明人： LEE JONG LAM , SONG YANG HEE
IPC分类号： H01L21/027
CPC分类号： H01L21/3086 , B82Y10/00 , B82Y40/00 , G03F7/0002
摘要： The present invention relates to a patterning method of a semiconductor and a semiconductor device that contains a pattern formed by the patterning method. According to the present invention, the patterning method of the semiconductor comprises the steps of: forming a dry etching protective film on a semiconductor; forming a nano-imprint resist film on said dry etching protective film; forming a pattern on said nano-imprint resist film by using a nano-imprint stamper; forming a pattern on said dry etching protective film by using the pattern, which is formed on said nano-imprint resist film; and forming a pattern on said semiconductor by using the pattern, which is formed on said dry etching protective film. According to the present invention, the invention provides a patterning method of a semiconductor and a semiconductor device that contains a pattern formed by the patterning method, wherein patterns can be formed on a large-scale semiconductor without restrictions on depth.
摘要翻译：本发明涉及包含通过图案化方法形成的图案的半导体和半导体器件的图案化方法。根据本发明，半导体的图案化方法包括以下步骤：在半导体上形成干蚀刻保护膜; 在所述干蚀刻保护膜上形成纳米压印抗蚀剂膜; 通过使用纳米压印压模在所述纳米压印抗蚀剂膜上形成图案; 通过使用形成在所述纳米压印抗蚀剂膜上的图案在所述干蚀刻保护膜上形成图案; 以及通过使用形成在所述干蚀刻保护膜上的图案在所述半导体上形成图案。根据本发明，本发明提供一种包含由图案化方法形成的图案的半导体和半导体器件的图案化方法，其中可以在大规模半导体上形成图案，而不受深度限制。

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