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1. 发明申请

WO2017040322A1 MULTI-TIME PROGRAMMABLE NON-VOLATILE MEMORY CELL 审中-公开
标题翻译：多次可编程非易失性存储器单元
公开(公告)号：WO2017040322A1
公开(公告)日：2017-03-09
申请号：PCT/US2016/049082
申请日：2016-08-26
申请人： LATTICE SEMICONDUCTOR CORPORATION
发明人： OMID-ZOHOOR, Farrokh Kia , BUI, Nguyen, Duc , LY, Binh
IPC分类号： G11C17/16 , G11C17/18
CPC分类号： G11C17/16 , G11C17/18 , H01L27/11206 , H01L27/11582 , H01L28/00
摘要： A non-volatile programmable bitcell has a read enable device with a source coupled with a bitline, an anti-fuse device with a gate coupled with a first write line, a drain coupled with a supply voltage and a source coupled with a drain of the read enable device. The bitcell has a fuse device coupled between a second write line and the drain of the read enable device. A magnitude of current flowing in the bitline, when the read enable device is enabled for reading, is dependent both on (1 ) a voltage level applied to the first write line and anti-fuse device state and on (2) a voltage level applied to the second write line and fuse device state. Usages include in a memory array, such as for FPGA configuration memory. The bitcell can be used as a multi-time programmable element, or to store multiple bit values.
摘要翻译：非易失性可编程位单元具有读取使能器件，其源极与位线耦合，反熔丝器件具有与第一写入线耦合的栅极，与电源电压耦合的漏极和与漏极耦合的源极读使能装置。位单元具有耦合在第二写入线和读取使能器件的漏极之间的熔丝器件。当读取使能器件使能读取时，在位线中流动的电流的大小取决于（1）施加到第一写入线路的电压电平和反熔丝器件状态，并且（2）施加的电压电平到第二个写入线和熔丝器件状态。用途包括在存储器阵列中，例如用于FPGA配置存储器。位单元可以用作多时间可编程元件，或用于存储多个位值。

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