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1. 发明申请

WO2014051875A1 CMOS AND SI NANOPHOTONICS STRESS ENGINEERED MULTI-LAYERS 审中-公开
标题翻译： CMOS和SI NANOPHOTONICS应力工程多层
公开(公告)号：WO2014051875A1
公开(公告)日：2014-04-03
申请号：PCT/US2013/055243
申请日：2013-08-16
申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION
发明人： ASSEFA, Solomon , BARWICZ, Tymon , KAMLAPURKAR, Swetha , KHATER, Marwan, H , SHANK, Steven , VIASOV, Yurii, A.
IPC分类号： H01L33/00 , H01L31/113 , H01L21/00
CPC分类号： H01L31/1136 , H01L27/1443
摘要： A method of forming an integrated photonic semiconductor structure (100) having a photonic device (102) and a CMOS (104) device may include depositing a first silicon nitride layer (152) having a first stress property over the photonic device, depositing an oxide layer (154) having a stress property over the deposited first silicon nitride layer (152), and depositing a second silicon nitride layer (156) having a second stress property over the oxide layer (154). The deposited first silicon nitride layer (152), the oxide layer (154), and the second silicon nitride layer 156 encapsulate the photonic device (102).
摘要翻译：形成具有光子器件（102）和CMOS（104）器件的集成光子半导体结构（100）的方法可以包括在光子器件上沉积具有第一应力特性的第一氮化硅层（152），沉积氧化物层（154）在沉积的第一氮化硅层（152）上具有应力特性，以及在氧化物层（154）上沉积具有第二应力特性的第二氮化硅层（156）。沉积的第一氮化硅层（152），氧化物层（154）和第二氮化硅层156封装光子器件（102）。

2. 发明申请

WO2017195047A1 PREDICTING PERSONALIZED CANCER METASTASIS ROUTES, BIOLOGICAL MEDIATORS OF METASTASIS AND METASTASIS BLOCKING THERAPIES 审中-公开
标题翻译：预测个体化癌症转移途径，转移性生物介质及转移性阻断治疗
公开(公告)号：WO2017195047A1
公开(公告)日：2017-11-16
申请号：PCT/IB2017/050869
申请日：2017-02-16
申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION , IBM UNITED KINGDOM LIMITED , IBM (CHINA) INVESTMENT COMPANY LIMITED
发明人： SIWO, Geoffrey, Henry , ASSEFA, Solomon , STOLOVITZKY, Gustavo, Alejandro
IPC分类号： G06F19/00
CPC分类号： G16H50/20 , G06F19/324 , G16B20/00 , G16B40/00
摘要： Predicting the metastasis of cancer in a patient from one tissue to another is disclosed. A computer-implemented method for predicting metastasis may comprise receiving an indication of at least one disrupted gene of the cancer, traversing data representing a gene-to-gene or protein-to-protein interaction network specific for a type of the cancer type from a position of the received gene in the network to a position of at least one gene involved in metastasis for a tissue type, organ or body part, determining at least one shortest path in the network between the received gene and the at least one gene involved in metastasis for the tissue type, organ or body part, generating a prediction of metastasis to the tissue type based on the at least one determined path, and generating an output display indicating a likelihood of spread of cancer to the tissue type, organ or body part.
摘要翻译：公开了预测患者中癌症从一个组织到另一个组织的转移。用于预测转移的计算机实现的方法可以包括接收至少一种癌症破坏基因的指示，遍历表示从癌症类型的癌症类型特异性的基因对基因或蛋白质对蛋白质相互作用网络的数据将接收到的基因在网络中的位置定位于参与组织类型，器官或身体部位的转移的至少一个基因的位置，确定所接收的基因与参与的至少一种基因之间的网络中的至少一条最短路径对于组织类型，器官或身体部位的转移，基于至少一个确定的路径产生对组织类型的转移的预测，并且生成指示癌症扩散到组织类型，器官或身体部位的可能性的输出显示

3. 发明申请

WO2011003871A1 A TEMPERATURE CONTROL DEVICE FOR OPTOELECTRONIC DEVICES 审中-公开
标题翻译：一种用于光电器件的温度控制装置
公开(公告)号：WO2011003871A1
公开(公告)日：2011-01-13
申请号：PCT/EP2010/059571
申请日：2010-07-05
申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION , KIM, Young-Hee , VLASOV, Yurii , GREEN, William, Michael , ASSEFA, Solomon , VAN CAMPENHOUT, Joris
发明人： KIM, Young-Hee , VLASOV, Yurii , GREEN, William, Michael , ASSEFA, Solomon , VAN CAMPENHOUT, Joris
IPC分类号： H01L31/105 , H01L31/18 , H01L35/30 , H01L23/38 , G02B6/42 , G02F1/01 , G02F1/025
CPC分类号： H01L35/34 , G02B6/12004 , G02B6/1347 , G02B2006/12069 , G02F1/0147 , G02F1/025
摘要： Current may be passed through an n-doped semiconductor region, a recessed metal semiconductor alloy portion, and a p-doped semiconductor region so that the diffusion of majority charge carriers in the doped semiconductor regions transfers heat from or into the semiconductor waveguide through Peltier-Seebeck effect. Further, a temperature control device may be configured to include a metal semiconductor alloy region located in proximity to an optoelectronic device, a first semiconductor region having a p-type doping, and a second semiconductor region having an n-type doping. The temperature of the optoelectronic device may thus be controlled to stabilize the performance of the optoelectronic device.
摘要翻译：电流可以通过n掺杂半导体区域，凹陷金属半导体合金部分和p掺杂半导体区域，使得掺杂半导体区域中的多数电荷载流子的扩散通过Peltier- 塞贝克效应。此外，温度控制装置可以被配置为包括位于光电子器件附近的金属半导体合金区域，具有p型掺杂的第一半导体区域和具有n型掺杂的第二半导体区域。因此可以控制光电子器件的温度以稳定光电器件的性能。

4. 发明申请

WO2014113440A1 BURIED WAVEGUIDE PHOTODETECTOR 审中-公开
公开(公告)号：WO2014113440A1
公开(公告)日：2014-07-24
申请号：PCT/US2014/011629
申请日：2014-01-15
申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION
发明人： ASSEFA, Solomon , GREEN, William, M. , SHANK, Steven, M. , VKASIV, Yurll, A.
IPC分类号： G02B6/12 , G02B6/13 , G02B6/136 , H01L31/0745
CPC分类号： G02B6/12004 , G02B6/131 , G02B6/132 , G02B6/136 , G02B6/4257 , G02B6/4291 , G02B2006/12085 , G02B2006/121 , G02B2006/12123 , H01L21/8238 , H01L27/1461 , H01L27/1463 , H01L27/14643 , H01L27/14689 , H01L31/02327 , H01L31/028 , H01L31/0745 , H01L31/165 , H01L31/1808 , H01L31/1812 , Y02E10/547
摘要： A method of forming an integrated photonic semiconductor structure having a photodetector and a CMOS device may include forming the CMOS device on a first silicon-on-insulator region, forming a silicon optical waveguide on a second silicon- on-insulator region, and forming a shallow trench isolation (STI) region surrounding the silicon optical waveguide such that the shallow trench isolation electrically isolating the first and second silicon-on-insulator region. Within a first region of the STI region, a first germanium material is deposited adjacent a first side wall of the semiconductor optical waveguide. Within a second region of the STI region, a second germanium material is deposited adjacent a second side wall of the semiconductor optical waveguide, whereby the second side wall opposes the first side wall. The first and second germanium material form an active region that evanescently receives propagating optical signals from the first and second side wall of the semiconductor optical waveguide.
摘要翻译：形成具有光电检测器和CMOS器件的集成光子半导体结构的方法可以包括在第一绝缘体上硅区域上形成CMOS器件，在第二绝缘体上硅区域上形成硅光波导，并形成浅沟槽隔离（STI）区域，使得浅沟槽隔离电隔离第一和第二绝缘体上硅区域。在STI区域的第一区域内，第一锗材料沉积在半导体光波导的第一侧壁附近。在STI区域的第二区域内，与半导体光波导的第二侧壁相邻地沉积第二锗材料，由此第二侧壁与第一侧壁相对。第一和第二锗材料形成有源区，其从半导体光波导的第一和第二侧壁瞬时接收传播的光信号。

5. 发明申请

WO2012000849A3 GERMANIUM PHOTODETECTOR 审中-公开
公开(公告)号：WO2012000849A3
公开(公告)日：2012-01-05
申请号：PCT/EP2011/060377
申请日：2011-06-21
申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION , IBM UNITED KINGDOM LIMITED , PARK, Jin-Hong , ASSEFA, Solomon , KIM, Jee, Hwan , VLASOV, Yurii
发明人： PARK, Jin-Hong , ASSEFA, Solomon , KIM, Jee, Hwan , VLASOV, Yurii
IPC分类号： H01L31/102 , H01L31/18
摘要： A method for forming a photodetector device includes forming an insulator layer on a substrate, forming a germanium (Ge) layer on the insulator layer and a portion of the substrate, forming a second insulator layer on the Ge layer, implanting n-type ions in the Ge layer, patterning the n-type Ge layer, forming a capping insulator layer on the second insulator layer and a portion of the first insulator layer, heating the device to crystallize the Ge layer resulting in an single crystalline n-type Ge layer, and forming electrodes electrically connected to the single crystalline n-type Ge layer.

6. 发明申请

WO2014107504A1 SILICON PHOTONICS PHOTODETECTOR INTEGRATION 审中-公开
标题翻译：硅光电照相机整合
公开(公告)号：WO2014107504A1
公开(公告)日：2014-07-10
申请号：PCT/US2014/010064
申请日：2014-01-02
申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION
发明人： ASSEFA, Solomon , KHATER, Marwan, H. , KIEWRA, Edward, W. , SHANK, Steven, M.
IPC分类号： H01L21/00 , H01S5/026
CPC分类号： H01L33/52 , G06F17/5068 , H01L27/14
摘要： A method of forming an integrated photonic semiconductor structure having a photonic device and adjacent CMOS devices may include depositing a first silicon nitride layer over the adjacent CMOS devices and depositing an oxide layer over the first silicon nitride layer, wherein the oxide layer conformally covers the first silicon nitride layer and the underlying adjacent CMOS devices to form a substantially planarized surface over the adjacent CMOS devices. A second silicon nitride layer is then deposited over the oxide layer and a region corresponding to forming the photonic device. A germanium layer is deposited over the oxide layer and the region corresponding to forming the photonic device. The germanium layer deposited over the adjacent CMOS devices is etched to form a germanium active layer within the photonic region, whereby the oxide layer and the second silicon nitride layer protect the adjacent CMOS devices during the etching of the germanium.
摘要翻译：形成具有光子器件和相邻CMOS器件的集成光子半导体结构的方法可以包括在相邻的CMOS器件上沉积第一氮化硅层并在第一氮化硅层上沉积氧化物层，其中氧化物层保形地覆盖第一氮化硅层和下面的相邻CMOS器件，以在相邻的CMOS器件上形成基本平坦化的表面。然后在氧化物层上沉积第二氮化硅层和对应于形成光子器件的区域。在氧化物层和对应于形成光子器件的区域上沉积锗层。蚀刻沉积在相邻CMOS器件上的锗层，以在光子区域内形成锗有源层，由此在蚀刻锗期间，氧化物层和第二氮化硅层保护相邻的CMOS器件。

7. 发明申请

WO2010052089A1 DIGITAL OPTICAL SWITCH 审中-公开
标题翻译：数字光开关
公开(公告)号：WO2010052089A1
公开(公告)日：2010-05-14
申请号：PCT/EP2009/063107
申请日：2009-10-08
申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION , VAN CAMPENHOUT, Joris , VLASOV, Yurii , ASSEFA, Solomon , KIM, Young-Hee , GREEN, William, Michael
发明人： VAN CAMPENHOUT, Joris , VLASOV, Yurii , ASSEFA, Solomon , KIM, Young-Hee , GREEN, William, Michael
IPC分类号： G02F1/225 , G02F1/313
CPC分类号： G02F1/3136 , G02F1/2257 , G02F2001/0151 , G02F2001/311
摘要： An optical switch includes a plurality of optical interferometric structures (10,20,30,90) serially connected between at least one optical input node (101) and two optical output nodes (199, 299). A primary waveguide (100) directly connects an optical input node (101) and a first optical output node (199). A complementary waveguide (200), which is directly connected to a second optical output node (299), is evanescently coupled with the primary waveguide (100) in a pair of optically coupled sections (18,28,38,98) provided in each optical interferometric structure. Each optical interferometric structure also includes a pair of decoupled sections (12,22,32,92), which includes a primary decoupled section (112,122,132,192) embedding a portion of the primary waveguide (100) and a complementary decoupled section (212,222,232,292) which includes a portion of the complementary waveguide (200). The complementary decoupled section is embedded in a phase tuning structure (13,23,33,93) that allows modulation of the phase of the optical signal passing through. The phase tuning structure can be a PIN diode or a heater. The optical switch provides less insertion loss, less crosstalk, and wider bandwidth than prior art optical switches.
摘要翻译：光开关包括串联连接在至少一个光输入节点（101）和两个光输出节点（199,299）之间的多个光干涉结构（10,20,30,90）。初级波导（100）直接连接光输入节点（101）和第一光输出节点（199）。直接连接到第二光输出节点（299）的互补波导（200）与主波导（100）瞬时耦合在一对光耦合部分（18,28,38,98）中，每对光耦合部分光学干涉结构。每个光学干涉测量结构还包括一对解耦部分（12,22,32,92），其包括嵌入主波导（100）的一部分的初级去耦部分（112,122,132,192）和互补解耦部分（212,222,232,292），其包括互补波导（200）的一部分。互补解耦部分嵌入在允许调制通过的光信号的相位的相位调谐结构（13,23,33,93）中。相位调谐结构可以是PIN二极管或加热器。与现有技术的光开关相比，光开关提供较少的插入损耗，较少的串扰和更宽的带宽。

8. 发明申请

WO2009117228A2 MAGNETICALLY DE-COUPLING MAGNETIC MEMORY CELLS AND BIT/WORD LINES FOR REDUCING BIT SELECTION ERRORS 审中-公开
标题翻译：用于减少位选择错误的磁性去耦合磁存储器单元和位/字线
公开(公告)号：WO2009117228A2
公开(公告)日：2009-09-24
申请号：PCT/US2009/035285
申请日：2009-02-26
申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION , ASSEFA, Solomon , KANAKASABAPATHY, Sivananda, K. , NOWAK, Janusz, Jozef , TROUILLOUD, Philip, L.
发明人： ASSEFA, Solomon , KANAKASABAPATHY, Sivananda, K. , NOWAK, Janusz, Jozef , TROUILLOUD, Philip, L.
IPC分类号： G11C11/16 , H01L21/4763
CPC分类号： H01L27/228 , G11C11/1659 , H01L43/08 , H01L2924/0002 , H01L2924/00
摘要： Techniques for shielding magnetic memory cells from magnetic fields are presented. In accordance with aspects of the invention, a magnetic storage element is formed with at least one conductive segment electrically coupled to the magnetic storage element. At least a portion of the conductive segment is surrounded with a magnetic liner. The magnetic liner is operative to divert at least a portion of a magnetic field created by a current passing through the conductive segment away from the magnetic storage element.
摘要翻译：介绍了用于屏蔽磁存储单元免受磁场影响的技术。根据本发明的方面，磁存储元件形成有至少一个导电段，其电耦合到磁存储元件。导电部分的至少一部分被磁性衬垫包围。磁性衬垫可操作以将由通过导电段的电流产生的磁场的至少一部分转移离开磁存储元件。

9. 发明申请

WO2009023739A1 METHOD AND APPARATUS FOR FABRICATING SUB-LITHOGRAPHY DATA TRACKS FOR USE IN MAGNETIC SHIFT REGISTER MEMORY DEVICES 审中-公开
标题翻译：用于制作用于磁移位置存储器件的次数据轨迹的方法和装置
公开(公告)号：WO2009023739A1
公开(公告)日：2009-02-19
申请号：PCT/US2008/073066
申请日：2008-08-13
申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION , ASSEFA, Solomon , GAIDIS, Michael C. , JOSEPH, Eric A. , PARKIN, Stuart Stephen Papworth , TYBERG, Christy S.
发明人： ASSEFA, Solomon , GAIDIS, Michael C. , JOSEPH, Eric A. , PARKIN, Stuart Stephen Papworth , TYBERG, Christy S.
IPC分类号： B44C1/22
CPC分类号： H01L27/222 , B82Y10/00 , G11C11/161 , G11C11/1673 , G11C11/1675 , G11C19/0808 , H01L21/76816 , H01L43/08
摘要： In one embodiment, the invention is a method and apparatus for fabricating sub-lithography data tracks for use in magnetic shift register memory devices. One embodiment of a memory device includes a first stack of dielectric material formed of a first dielectric material, a second stack of dielectric material surrounding the first stack of dielectric material and formed of at least a second dielectric material, and at least one data track for storing information, positioned between the first stack of dielectric material and the second stack of dielectric material, the data track having a high aspect ratio and a substantially rectangular cross section.
摘要翻译：在一个实施例中，本发明是用于制造用于磁移位寄存器存储器件的子光刻数据磁道的方法和装置。存储器件的一个实施例包括由第一电介质材料形成的介电材料的第一叠层，围绕第一电介质材料堆叠并由至少第二电介质材料形成的第二电介质材料叠层，以及至少一个用于存储位于所述第一电介质材料堆叠和所述第二电介质材料堆之间的信息，所述数据轨道具有高纵横比和基本上矩形的横截面。

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