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    • 1. 发明申请
    • SYSTEMS AND METHODS TO INCREASE UNIAXIAL COMPRESSIVE STRESS IN TRI-GATE TRANSISTORS
    • 用于增加三栅极晶体管中的单轴压缩应力的系统和方法
    • WO2009079159A2
    • 2009-06-25
    • PCT/US2008084344
    • 2008-11-21
    • INTEL CORPRAKSHIT TITASHGILES MARTIN DGHANI TAHIRMURTHY ANANDCEA STEPHEN M
    • RAKSHIT TITASHGILES MARTIN DGHANI TAHIRMURTHY ANANDCEA STEPHEN M
    • H01L21/336H01L29/78
    • H01L21/823437H01L21/26506H01L29/66795H01L29/7848H01L29/785
    • A transistor structure that increases uniaxial compressive stress on the channel region of a tri-gate transistor comprises at least two semiconductor bodies formed on a substrate, each semiconductor body having a pair of laterally opposite sidewalls and a top surface, a common source region formed on one end of the semiconductor bodies, wherein the common source region is coupled to all of the at least two semiconductor bodies, a common drain region formed on another end of the semiconductor bodies, wherein the common drain region is coupled to all of the at least two semiconductor bodies, and a common gate electrode formed over the at least two semiconductor bodies, wherein the common gate electrode provides a gate electrode for each of the at least two semiconductor bodies and wherein the common gate electrode has a pair of laterally opposite sidewalls that are substantially perpendicular to the sidewalls of the semiconductor bodies.
    • 一种增加三栅极晶体管的沟道区上的单轴压缩应力的晶体管结构包括至少两个形成在衬底上的半导体本体,每个半导体本体具有一对横向相对的侧壁和顶表面,形成在其上的公共源极区 半导体本体的一端,其中公共源极区域耦合到所有至少两个半导体本体;公共漏极区域,形成在半导体本体的另一端上,其中公共漏极区域耦合到所有的至少一个 两个半导体本体以及形成在所述至少两个半导体本体上方的公共栅电极,其中所述公共栅电极为所述至少两个半导体本体中的每一个提供栅电极,并且其中所述公共栅电极具有一对横向相对的侧壁, 基本垂直于半导体本体的侧壁。