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1. 发明申请

WO2021211348A1 METHODS AND APPARATUS FOR PASSIVATING A TARGET 审中-公开
公开(公告)号：WO2021211348A1
公开(公告)日：2021-10-21
申请号：PCT/US2021/026318
申请日：2021-04-08
申请人： APPLIED MATERIALS, INC.
发明人： DU, Chao , CHEN, Xing , MILLER, Keith A. , RAMALINGAM, Jothilingam , LEI, Jianxin
IPC分类号： C23C16/455 , C23C16/44 , H01L45/00 , H01L27/24
摘要： Methods and apparatus for passivating a target are provided herein. For example, a method includes a) supplying an oxidizing gas into an inner volume of the process chamber; b) igniting the oxidizing gas to form a plasma and oxidize at least one of a target or target material deposited on a process kit disposed in the inner volume of the process chamber; and c) performing a cycle purge comprising: c1) providing air into the process chamber to react with the at least one of the target or target material deposited on the process kit; c2) maintaining a predetermined pressure for a predetermined time within the process chamber to generate a toxic by-product caused by the air reacting with the at least one of the target or target material deposited on the process kit; and c3) exhausting the process chamber to remove the toxic by-product.

2. 发明申请

WO2020056412A1 APPARATUS FOR ENHANCING FLOW UNIFORMITY IN A PROCESS CHAMBER 审中-公开
公开(公告)号：WO2020056412A1
公开(公告)日：2020-03-19
申请号：PCT/US2019/051304
申请日：2019-09-16
申请人： APPLIED MATERIALS, INC.
发明人： RAMALINGAM, Jothilingam , SAVANDAIAH, Kirankumar Neelasandra , ZHANG, Fuhong , JOHANSON, William
IPC分类号： H01L21/67 , H01L21/687 , H01L21/683
摘要： Methods and apparatus for processing substrates are provided herein. In some embodiments, a shroud for controlling gas flow in a process chamber includes a closed walled body having an upper end and a lower end, the closed walled body defining a first opening of the shroud at the lower end and a second opening of the shroud at the upper end, wherein the second opening is offset from the first opening; and a top wall disposed atop a portion of the upper end of the closed walled body in a position above the first opening to define, together with a remaining portion of the upper end of the closed walled body, the second opening, wherein the shroud is configured to divert a gas flow from the second opening through the first opening.

3. 发明申请

WO2020176181A1 A FILM STACK FOR LITHOGRAPHY APPLICATIONS 审中-公开
公开(公告)号：WO2020176181A1
公开(公告)日：2020-09-03
申请号：PCT/US2020/015182
申请日：2020-01-27
申请人： APPLIED MATERIALS, INC.
发明人： TEJINDER, Singh , PARIKH, Suketu Arun , DIEHL, Daniel Lee , STOLFI, Michael Anthony , RAMALINGAM, Jothilingam , CAO, Yong , YAN, Lifan , LANG, Chi-I , HWANG, Ho-yung David
IPC分类号： H01L21/033
摘要： Methods for forming a film stack comprising a hardmask layer and etching such hardmask layer to form features in the film stack are provided. The methods described herein facilitate profile and dimension control of features through a proper profile management scheme formed in the film stack. In one embodiment, a method for etching a hardmask layer includes forming a hardmask layer on a substrate, wherein the hardmask layer comprises a metal containing material having an atomic number greater than 28, supplying an etching gas mixture to the substrate, and etching the hardmask layer exposed by a photoresist layer.

4. 发明申请

WO2015060993A1 METHOD OF MAKING SOURCE/DRAIN CONTACTS BY SPUTTERING A DOPED TARGET 审中-公开
标题翻译：通过喷射目标来制造源/排泄物接触的方法
公开(公告)号：WO2015060993A1
公开(公告)日：2015-04-30
申请号：PCT/US2014/057849
申请日：2014-09-26
申请人： APPLIED MATERIALS, INC.
发明人： LEI, Jianxin , RAMALINGAM, Jothilingam , NI, Chi-Nung
IPC分类号： H01L21/203 , H01L21/265 , H01L21/335
CPC分类号： H01L21/28506 , C23C14/16 , C23C14/3414 , C23C14/5813 , H01L21/225 , H01L21/2254 , H01L21/28518 , H01L21/2855 , H01L21/76843 , H01L21/76855 , H01L29/456 , H01L29/66477
摘要： A method of depositing a contact layer material includes sputtering a target including a metal and a dopant. The contact layer material is conductive and may be used in a transistor device to connect a conductive region, such as a source region or a drain region of metal-oxide semiconductor field effect transistor, to a contact plug. The contact plug is used to connect the source/drain region formed in a semiconducting substrate to metal wiring layers formed above the gate level of a semiconductor device. The resulting contact layer may be a metal silicide including the dopant. In some embodiments, the sputtered metal may be nickel and the dopant may be phosphorous and the resulting contact layer a nickel silicide doped with phosphorous. Embodiments described, in general, can provide reduced contact resistance and thus improved performance in semiconductor devices.
摘要翻译：沉积接触层材料的方法包括溅射包括金属和掺杂剂的靶。接触层材料是导电的，并且可以用在晶体管器件中以将诸如金属氧化物半导体场效应晶体管的源极区域或漏极区域的导电区域连接到接触插塞。接触插头用于将形成在半导体衬底中的源极/漏极区域连接到形成在半导体器件的栅极级上方的金属布线层。所得到的接触层可以是包括掺杂剂的金属硅化物。在一些实施例中，溅射金属可以是镍，并且掺杂剂可以是磷，并且所得到的接触层是掺杂有磷的硅化镍。通常描述的实施例可以提供降低的接触电阻并因此提高半导体器件的性能。

5. 发明申请

WO2023278388A1 CLEANING OF SIN WITH CCP PLASMA OR RPS CLEAN 审中-公开
公开(公告)号：WO2023278388A1
公开(公告)日：2023-01-05
申请号：PCT/US2022/035236
申请日：2022-06-28
申请人： APPLIED MATERIALS, INC.
发明人： RAMALINGAM, Jothilingam , CAO, Yong , LAVITSKY, Ilya , MILLER, Keith A. , GUNG, Tza-Jing , TANG, Xianmin , LAVAN, Shane , SCHMIEDING, Randy D. , FORSTER, John C. , SAVANDAIAH, Kirankumar Neelasandra
IPC分类号： C23C14/56 , C23C14/34 , C23C14/50 , C23C14/22 , H01J37/34 , H01J37/32 , C23C14/54 , C23C14/564 , H01J37/32091 , H01J37/32357 , H01J37/3435 , H01J37/3441 , H01J37/3447 , H01J37/3488
摘要： A physical vapor deposition processing chamber is described. The processing chamber includes a target backing plate in a top portion of the processing chamber, a substrate support in a bottom portion of the processing chamber, a deposition ring positioned at an outer periphery of the substrate support and a shield. The substrate support has a support surface spaced a distance from the target backing plate to form a process cavity. The shield forms an outer bound of the process cavity. In-chamber cleaning methods are also described. In an embodiment, the method includes closing a bottom gas flow path of a processing chamber to a process cavity, flowing an inert gas from the bottom gas flow path, flowing a reactant into the process cavity through an opening in the shield, and evacuating the reaction gas from the process cavity.

6. 发明申请

WO2020176502A1 A FILM STACK FOR LITHOGRAPHY APPLICATIONS 审中-公开
公开(公告)号：WO2020176502A1
公开(公告)日：2020-09-03
申请号：PCT/US2020/019696
申请日：2020-02-25
申请人： APPLIED MATERIALS, INC.
发明人： TEJINDER, Singh , PARIKH, Suketu Arun , DIEHL, Daniel Lee , STOLFI, Michael Anthony , RAMALINGAM, Jothilingam , CAO, Yong , YAN, Lifan , LANG, Chi-I , HWANG, Ho-yung David
IPC分类号： H01L21/033 , H01L21/311
摘要： Methods for forming a film stack comprising a hardmask layer and etching such hardmask layer to form features in the film stack are provided. The methods described herein facilitate profile and dimension control of features through a proper profile management scheme formed in the film stack. In one or more embodiments, a method for etching a hardmask layer includes forming a hardmask layer on a substrate, where the hardmask layer contains a metal-containing material containing a metal element having an atomic number greater than 28, supplying an etching gas mixture to the substrate, and etching the hardmask layer exposed by a photoresist layer.

7. 发明申请

WO2017044520A1 TUNGSTEN SILICIDE NITRIDE FILMS AND METHODS OF FORMATION 审中-公开
标题翻译： TUNGSTEN硅酸盐膜和形成方法
公开(公告)号：WO2017044520A1
公开(公告)日：2017-03-16
申请号：PCT/US2016/050614
申请日：2016-09-08
申请人： APPLIED MATERIALS, INC.
发明人： RAMALINGAM, Jothilingam , JAKKARAJU, Rajkumar , LEI, Jianxin , WANG, Zhiyong
IPC分类号： H01L21/285 , H01L21/28 , H01L27/108
CPC分类号： H01L29/4975 , C23C14/0036 , C23C14/022 , C23C14/0641 , C23C14/5826 , H01L21/28088 , H01L21/28097 , H01L21/28202 , H01L21/2855
摘要： Embodiments of the present disclosure include tungsten silicide nitride films and methods for depositing tungsten silicide nitride films. In some embodiments, a thin film microelectronic device includes a semiconductor substrate having a tungsten gate electrode stack comprising a tungsten silicide nitride film having a formula W x Si y N z , wherein x is about 19 to about 22 atomic percent, y is about 57 to about 61 atomic percent, and z is about 15 to about 20 atomic percent. In some embodiments, a method of processing a substrate disposed in physical vapor deposition (PVD) chamber, includes: exposing a substrate having a gate insulating layer to a plasma formed from a first process gas comprising nitrogen and argon; sputtering silicon and tungsten material from a target disposed within a processing volume of the PVD chamber; depositing atop the gate insulating layer a tungsten silicide nitride layer as described above; and depositing a bulk tungsten layer atop the tungsten silicide nitride layer.
摘要翻译：本公开的实施例包括硅化钨氮化物膜和用于沉积硅化钨氮化物膜的方法。在一些实施例中，薄膜微电子器件包括具有钨栅极电极堆叠的半导体衬底，所述钨栅电极堆叠包括具有式W x Si y N z的硅化钨化硅膜，其中x为约19至约22原子％，y为约57至约61原子％，z为约15〜约20原子％。在一些实施例中，处理设置在物理气相沉积（PVD）室中的衬底的方法包括：将具有栅极绝缘层的衬底暴露于由包括氮和氩的第一工艺气体形成的等离子体; 从设置在PVD室的处理容积内的靶溅射硅和钨材料; 在栅极绝缘层的顶上沉积如上所述的硅化钨化硅层; 以及在硅化钨化硅层顶上沉积体钨层。

8. 发明申请

WO2022197723A1 METHODS OF REDUCING PARTICLES IN A PHYSICAL VAPOR DEPOSITION (PVD) CHAMBER 审中-公开
公开(公告)号：WO2022197723A1
公开(公告)日：2022-09-22
申请号：PCT/US2022/020412
申请日：2022-03-15
申请人： APPLIED MATERIALS, INC.
发明人： DOU, Wei , CAO, Yong , LI, Mingdong , LAVAN, Shane , RAMALINGAM, Jothilingam , LIU, Chengyu
IPC分类号： C23C14/56 , C23C14/18 , C23C14/04 , C23C14/50 , C23C14/00
摘要： Embodiments of methods and apparatus for reducing particle formation in physical vapor deposition (PVD) chambers are provided herein. In some embodiments, a method of reducing particle formation in a PVD chamber includes: performing a plurality of first deposition processes on a corresponding series of substrates disposed on a substrate support in the PVD chamber, wherein the PVD chamber includes a cover ring disposed about the substrate support and having a texturized outer surface, and wherein a silicon nitride (SiN) layer having a first thickness is deposited onto the texturized outer surface during each of the plurality of first deposition processes; and performing a second deposition process on the cover ring between subsets of the plurality of first deposition processes to deposit an amorphous silicon layer having a second thickness onto an underlying silicon nitride (SiN) layer.

9. 发明申请

WO2021021279A1 DOSE REDUCTION OF PATTERNED METAL OXIDE PHOTORESISTS 审中-公开
公开(公告)号：WO2021021279A1
公开(公告)日：2021-02-04
申请号：PCT/US2020/035751
申请日：2020-06-02
申请人： APPLIED MATERIALS, INC.
发明人： SINGH, Tejinder , YAN, Lifan , MALLICK, Abhijit, B. , DIEHL, Daniel, Lee , HWANG, Ho-yung , RAMALINGAM, Jothilingam
IPC分类号： H01L21/033 , H01L21/02
摘要： Embodiments of the present disclosure generally relate to a multilayer stack used as a mask in extreme ultraviolet (EUV) lithography and methods for forming a multilayer stack. In one embodiment, the method includes forming a carbon layer over a film stack, forming a metal rich oxide layer on the carbon layer by a physical vapor deposition (PVD) process, forming a metal oxide photoresist layer on the metal rich oxide layer, and patterning the metal oxide photoresist layer, The metal oxide photoresist layer is different from the metal rich oxide layer and is formed by a process different from the PVD process. The metal rich oxide layer formed by the PVD process improves adhesion of the metal oxide photoresist layer and increases the secondary electrons during EUV lithography, which leads to decreased EUV dose energies

10. 发明申请

WO2018067464A1 METHODS AND DEVICES USING PVD RUTHENIUM 审中-公开
标题翻译：使用PVD RUTHENIUM的方法和装置
公开(公告)号：WO2018067464A1
公开(公告)日：2018-04-12
申请号：PCT/US2017/054766
申请日：2017-10-02
申请人： APPLIED MATERIALS, INC.
发明人： RAMALINGAM, Jothilingam , MARSHALL, Ross , LEI, Jianxin , TANG, Xianmin
IPC分类号： H01L21/285 , H01L21/324 , H01L21/02
摘要： Ruthenium containing gate stacks and methods of forming ruthenium containing gate stacks are described. The ruthenium containing gate stack comprises a polysilicon layer on a substrate; a silicide layer on the polysilicon layer; a barrier layer on the silicide layer; a ruthenium layer on the barrier layer; and a spacer layer comprising a nitride on sides of the ruthenium layer, wherein the ruthenium layer comprises substantially no ruthenium nitride after formation of the spacer layer. Forming the ruthenium layer comprises sputtering the ruthenium in a krypton environment on a high current electrostatic chuck comprising a high resistivity ceramic material. The sputtered ruthenium layer is annealed at a temperature greater than or equal to about 500 °C.
摘要翻译：描述了含钌栅极叠层和形成含钌栅极叠层的方法。包含钌的栅极叠层包括在衬底上的多晶硅层; 在多晶硅层上的硅化物层; 硅化物层上的阻挡层; 在阻挡层上的钌层; 以及在所述钌层的侧面上包含氮化物的间隔层，其中在形成所述间隔层之后，所述钌层基本上不包含氮化钌。形成钌层包括在包含高电阻率陶瓷材料的高电流静电卡盘上的氪环境中溅射钌。溅射的钌层在大于或等于约500℃的温度下退火。

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