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1. 发明申请

WO2020005421A1 METHOD TO REDUCE DATA STREAM FOR SPATIAL LIGHT MODULATOR 审中-公开
公开(公告)号：WO2020005421A1
公开(公告)日：2020-01-02
申请号：PCT/US2019/033482
申请日：2019-05-22
申请人： APPLIED MATERIALS, INC.
发明人： JOHNSON, Joseph R. , LAIDIG, Thomas L. , BENCHER, Christopher Dennis
IPC分类号： G03F7/20 , H01L21/027
摘要： Embodiments of the present disclosure provide improved photolithography systems and methods using a solid state emitter array. The solid state emitter array comprises solid state emitter devices arranged in rows and columns, wherein each solid state emitter device comprises two or more subpixels. Each solid state emitter device comprises one program gate which may transmit a voltage to a state storage node. The state storage node is in electrical communication with a drive gate. The drive gate is in communication with two or more solid state emitter subpixels. The arrangement of a plurality of subpixels in communication with a single drive gate allows more than one pulse to be delivered to the drive gate, resulting in illumination of more than one subpixel at each drive gate. The redundancy results in improved data efficiency.

2. 发明申请

WO2020005403A1 SHIFTING OF PATTERNS TO REDUCE LINE WAVINESS 审中-公开
公开(公告)号：WO2020005403A1
公开(公告)日：2020-01-02
申请号：PCT/US2019/032449
申请日：2019-05-15
申请人： APPLIED MATERIALS, INC.
发明人： JOHNSON, Joseph R. , BENCHER, Christopher Dennis , LAIDIG, Thomas L.
IPC分类号： G03F7/20 , G03F7/00 , H01L21/027
摘要： Embodiments described herein provide a method shifting mask pattern data during a digital lithography process to reduce line waviness of an exposed pattern. The method includes providing a mask pattern data having a plurality of exposure polygons to a processing unit of a digital lithography system. The processing unit has a plurality of image projection systems that receive the mask pattern data. Each image projection system corresponds to a portion of a plurality of portions of a substrate and receives an exposure polygon corresponding to the portion. The substrate is scanned under the plurality of image projection systems and pluralities of shots are projected to the plurality of portions while shifting the mask pattern data. Each shot of the pluralities of shots is inside the exposure polygon corresponding to the portion.

3. 发明申请

WO2019209396A1 SYSTEMS AND METHODS OF USING SOLID STATE EMITTER ARRAYS 审中-公开
公开(公告)号：WO2019209396A1
公开(公告)日：2019-10-31
申请号：PCT/US2019/016674
申请日：2019-02-05
申请人： APPLIED MATERIALS, INC.
发明人： BENCHER, Christopher Dennis , JOHNSON, Joseph R.
IPC分类号： G03F7/20 , G03F1/76
摘要： Embodiments of the present disclosure provide improved photolithography systems and methods using a solid state emitter device. The solid state emitter device includes an array of solid state emitters arranged in a plurality of horizontal rows and vertical columns. The variable intensity of each group of solid state emitters, for example an entire row or column of solid state emitters, is controllable for improved field brightness uniformity and stitching. Controlling the variable intensity includes, for example, varying the signal, such as voltage, that is applied to each of the rows of solid state emitters to attenuate the brightness from the middle of the array to the edges of the array to accommodate for overlapping exposures during photolithography processing.

4. 发明申请

WO2016003575A2 LOCALIZED STRESS MODULATION FOR OVERLAY AND EPE 审中-公开
标题翻译：用于覆盖和EPE的局部应力调制
公开(公告)号：WO2016003575A2
公开(公告)日：2016-01-07
申请号：PCT/US2015/033810
申请日：2015-06-02
申请人： APPLIED MATERIALS, INC.
发明人： YIEH, Ellie Y. , DAI, Huixiong , NEMANI, Srinivas D. , GODET, Ludovic , BENCHER, Christopher Dennis
IPC分类号： H01L21/66
CPC分类号： H01L22/12 , H01L22/20
摘要： Embodiments of the disclosure provide apparatus and methods for localized stress modulation for overlay and edge placement error (EPE) using electron or ion implantation. In one embodiment, a process for correcting overlay error on a substrate generally includes performing a measurement process in a metrology tool on a substrate to obtain a substrate distortion or an overlay error map, determining doping parameters to correct overlay error or substrate distortion based on the overlay error map, and providing a doping recipe to a doping apparatus based on the doping parameters determined to correct substrate distortion or overlay error. Embodiments may also provide performing a doping treatment process on the substrate using the determined doping repair recipe, for example, by comparing the overlay error map or substrate distortion with a database library stored in a computing system.
摘要翻译：本公开的实施例提供了使用电子或离子注入的用于覆盖和边缘放置误差（EPE）的局部应力调制的装置和方法。在一个实施例中，用于校正衬底上的覆盖误差的处理通常包括在衬底上的度量工具中执行测量过程以获得衬底失真或覆盖误差图，基于所述衬底失真或覆盖误差图确定掺杂参数以校正重叠误差或衬底失真覆盖误差图，并且基于确定用于校正衬底失真或重叠误差的掺杂参数向掺杂装置提供掺杂配方。实施例还可以使用确定的掺杂修复配方在衬底上执行掺杂处理过程，例如通过将覆盖误差图或衬底失真与存储在计算系统中的数据库进行比较。

5. 发明申请

WO2020014026A1 PHOTORESIST COMPOSITION FOR LINE DOUBLING 审中-公开
公开(公告)号：WO2020014026A1
公开(公告)日：2020-01-16
申请号：PCT/US2019/040085
申请日：2019-07-01
申请人： APPLIED MATERIALS, INC.
发明人： VORA, Ankit , BENCHER, Christopher Dennis
IPC分类号： G03F7/004 , G03F7/022 , G03F7/008 , G03F7/038 , G03F7/20
摘要： Photoresist compositions, methods of manufacturing the photoresist compositions, and methods of using the photoresist compositions are provided. In one implementation, the photoresist composition comprises a novolac (novolac) resin, a diazonaphthoquinone (DNQ) dissolution inhibitor, a bis(azide) crosslinker, and a casting solvent. In one implementation, the bis(azide) crosslinker absorbs at wavelengths in a range between 325 nanometers and 400 nanometers. In one implementation, the bis(azide) crosslinker is an aromatic bi(azide) crosslinker.

6. 发明申请

WO2019209449A1 FABRICATION AND USE OF DOSE MAPS AND FEATURE SIZE MAPS DURING SUBSTRATE PROCESSING 审中-公开
公开(公告)号：WO2019209449A1
公开(公告)日：2019-10-31
申请号：PCT/US2019/024275
申请日：2019-03-27
申请人： APPLIED MATERIALS, INC.
发明人： BENCHER, Christopher Dennis , JOHNSON, Joseph R.
IPC分类号： G03F7/20 , G03F1/76
摘要： Systems and methods discussed herein relate to patterning substrates during lithography and microlithography to form features to a set or sets of critical dimensions using dose. The dose maps are generated based upon images captured during manufacturing to account for process variation in a plurality of operations employed to pattern the substrates. The dose maps are used along with imaging programs to tune the voltages applied to various regions of a substrate in order to produce features to a set or sets of critical dimensions and compensate for upstream or downstream operations that may otherwise result in incorrect critical dimension formation.

7. 发明申请

WO2017011188A1 QUARTER WAVE LIGHT SPLITTING 审中-公开
标题翻译：四分之一波光束分割
公开(公告)号：WO2017011188A1
公开(公告)日：2017-01-19
申请号：PCT/US2016/040178
申请日：2016-06-29
申请人： APPLIED MATERIALS, INC.
发明人： BENCHER, Christopher Dennis , JOHNSON, Joseph R. , MARKLE, Dave , VAEZ-IRAVANI, Mehdi
IPC分类号： G03F7/20
CPC分类号： G02B27/283 , G02B5/3083 , G02B26/0833 , G02F1/1303 , G03F7/2008 , G03F7/2057 , G03F7/70291 , G03F7/70566
摘要： The present disclosure provides a method for producing an image on a substrate. The method includes providing a single beam of light to a multiple DMD assembly, splitting the single beam of light into an s-polarization beam and a p-polarization beam, and reflecting the s-polarization beam and the p-polarization beam through the multiple DMD assembly such that the multiple DMD assembly produces a plurality of superimposed images on the substrate.
摘要翻译：本公开提供了一种用于在基板上产生图像的方法。该方法包括向多个DMD组件提供单个光束，将单个光束分解为s偏振光束和p偏振光束，并将S偏振光束和p偏振光束反射通过多个 DMD组件，使得多个DMD组件在衬底上产生多个叠加的图像。

8. 发明申请

WO2016200498A1 CONFORMAL STRIPPABLE CARBON FILM FOR LINE-EDGE-ROUGHNESS REDUCTION FOR ADVANCED PATTERNING 审中-公开
标题翻译：用于高级图案的线边缘粗糙度的一致的可剥离碳膜
公开(公告)号：WO2016200498A1
公开(公告)日：2016-12-15
申请号：PCT/US2016/029746
申请日：2016-04-28
申请人： APPLIED MATERIALS, INC.
发明人： MEBARKI, Bencherki , MANNA, Pramit , MIAO, Li Yan , PADHI, Deenesh , KIM, Bok Hoen , BENCHER, Christopher Dennis
IPC分类号： H01L21/027 , H01L21/3065
CPC分类号： H01L21/0337 , H01L21/02115 , H01L21/02118 , H01L21/02266 , H01L21/02274 , H01L21/0273 , H01L21/31058 , H01L21/31138 , H01L2221/00
摘要： Embodiments of the disclosure relate to deposition of a conformal organic material over a feature formed in a photoresist or a hardmask, to decrease the critical dimensions and line edge roughness. In various embodiments, an ultra-conformal carbon-based material is deposited over features formed in a high-resolution photoresist. The conformal organic layer formed over the photoresist thus reduces both the critical dimensions and the line edge roughness of the features.
摘要翻译：本公开的实施例涉及在光致抗蚀剂或硬掩模中形成的特征上沉积保形有机材料，以减少临界尺寸和线边缘粗糙度。在各种实施例中，将超适形碳基材料沉积在形成于高分辨率光致抗蚀剂中的特征上。在光致抗蚀剂上形成的共形有机层因此降低了特征的临界尺寸和线边缘粗糙度。

9. 发明申请

WO2016018598A1 DIGITAL GREY TONE LITHOGRAPHY FOR 3D PATTERN FORMATION 审中-公开
标题翻译：用于3D图案形成的数字灰度色调
公开(公告)号：WO2016018598A1
公开(公告)日：2016-02-04
申请号：PCT/US2015/040121
申请日：2015-07-13
申请人： APPLIED MATERIALS, INC.
发明人： BENCHER, Christopher Dennis
IPC分类号： H01L21/027
CPC分类号： G03F7/203 , G03F7/0037
摘要： A method of processing a substrate is described herein. The method includes positioning a substrate on a stage associated with a maskless direct writing pattern generator. The substrate has an undeveloped, unexposed photoresist layer formed thereon. The photoresist layer has a plurality of writing pixel locations. The method includes delivering predetermined doses of electromagnetic energy from the pattern generator to each writing pixel location. A first predetermined dose is a full tone dose, and the first predetermined dose is delivered to at least one writing pixel location. A second predetermined is a fractional tone dose, and the second predetermined dose is delivered to at least one writing pixel location. A third predetermined dose is either a fractional dose or a zero tone dose. The third predetermined dose is delivered to at least one writing pixel location, and the third predetermined dose is different from the second predetermined dose.
摘要翻译：本文描述了处理衬底的方法。该方法包括将衬底定位在与无掩模直接写入图案发生器相关联的台上。衬底具有形成在其上的未显影未曝光光致抗蚀剂层。光致抗蚀剂层具有多个写入像素位置。该方法包括将预定剂量的电磁能量从图案发生器传送到每个写入像素位置。第一预定剂量是全音调剂量，并且第一预定剂量被递送至至少一个写入像素位置。第二预定是分数色调剂量，并且第二预定剂量被递送到至少一个写入像素位置。第三预定剂量是分数剂量或零音量。第三预定剂量被递送到至少一个写入像素位置，并且第三预定剂量不同于第二预定剂量。

10. 发明申请

WO2008036810A2 BI-LAYER CAPPING OF LOW-K DIELECTRIC FILMS 审中-公开
标题翻译：低K电介质膜的双层封盖
公开(公告)号：WO2008036810A2
公开(公告)日：2008-03-27
申请号：PCT/US2007/079020
申请日：2007-09-20
申请人： APPLIED MATERIALS, INC. , XU, Ping , BENCHER, Christopher Dennis
发明人： XU, Ping , BENCHER, Christopher Dennis
IPC分类号： H01L21/469
CPC分类号： H01L21/76829 , C23C16/30 , C23C16/45523 , H01L21/02126 , H01L21/022 , H01L21/02216 , H01L21/02274 , H01L21/0234 , H01L21/02348 , H01L21/02351 , H01L21/02362 , H01L21/3122 , H01L21/31633 , H01L21/76835
摘要： A method is provided for processing a substrate surface by delivering a first gas mixture comprising a first organosilicon compound, a first oxidizing gas, and one or more hydrocarbon compounds into a chamber at deposition conditions sufficient to deposit a first low dielectric constant film on the substrate surface. A second gas mixture having a second organosilicon compound and a second oxidizing gas is delivered into the chamber at deposition conditions sufficient to deposit a second low dielectric constant film on the first low dielectric constant film. The flow rate of the second oxidizing gas into the chamber is increased, and the flow rate of the second organosilicon compound into the chamber is decreased to deposit an oxide rich cap on the second low dielectric constant film.
摘要翻译：提供了一种方法，用于通过将包含第一有机硅化合物，第一氧化气体和一种或多种碳氢化合物的第一气体混合物在沉积条件下输送到室中来处理基底表面，所述沉积条件足以沉积衬底表面上的第一低介电常数膜。具有第二有机硅化合物和第二氧化气体的第二气体混合物以足以在第一低介电常数膜上沉积第二低介电常数膜的沉积条件输送到室中。第二氧化气体流入腔室的流速增加，第二有机硅化合物流入腔室的流速降低，在第二低介电常数薄膜上沉积富氧化物的盖子。

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