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    • 1. 发明申请
    • PARTIAL RESPONSE DECISION FEEDBACK EQUALIZER WITH DISTRIBUTED CONTROL
    • 部分响应决策反馈均衡器与分布式控制
    • WO2011133333A3
    • 2012-01-19
    • PCT/US2011031522
    • 2011-04-07
    • RAMBUS INCSHEN JIEWU TINGCHANG KUN-YANG
    • SHEN JIEWU TINGCHANG KUN-YANG
    • H04L27/01
    • H04L25/03057H04L2025/03363H04L2025/03369
    • A multi-phase partial response equalizer is disclosed. The equalizer includes receiver circuitry to receive a data symbol over N bit intervals and to generate N sets of samples in response to N clock signals having different phases. A first storage stage is provided, including storage elements to store the sets of samples during a common clock interval. First and second selection circuits are respectively coupled to an input and an output of the first storage stage. An output storage stage is coupled to the second selection circuit to store an output sample. The first and second selection circuits, over multiple clock intervals, cooperatively select the output sample from one of the sets of samples based on a most recent previous output sample.
    • 公开了一种多相部分响应均衡器。 均衡器包括接收电路,用于在N个比特间隔上接收数据符号,并响应于具有不同相位的N个时钟信号产生N组采样。 提供第一存储级,包括在公共时钟间隔期间存储样本组的存储元件。 第一和第二选择电路分别耦合到第一存储级的输入和输出。 输出存储级耦合到第二选择电路以存储输出样本。 多个时钟间隔的第一和第二选择电路基于最近的先前输出样本协同地从一组样本中选择输出样本。
    • 2. 发明申请
    • ERROR RECOVERY SCHEME FOR I2C SLAVE
    • I2C从机故障恢复方案
    • WO2005119448A1
    • 2005-12-15
    • PCT/EP2005/051886
    • 2005-04-27
    • THOMSON LICENSING S.A.TAN, Beng EngLEE, Guan SweeWU, Ting
    • TAN, Beng EngLEE, Guan SweeWU, Ting
    • G06F11/00
    • G06F11/0757G06F13/4291
    • To implement an efficient and convenient way of ensuring that the I 2 C bus will not be stuck low during data communication between a TV microprocessor (master) and a DVD module microprocessor (slave) in a TV-DVD combo device it is proposed to implement a Watchdog timer (13) for the data communication via the I 2 C bus. It has been detected that if the STOP condition is missing during the data transfer between master (10) and slave (11), the I 2 C bus will be blocked in low state for ever, i.e. the TV microprocessor (10) will no longer be able to communicate with the DVD module. This problem may occur due to some interference problems within the TV-DVD combo device. With the implementation of the Watchdog timer (13), preferably in software a simple error recovery scheme for the I 2 C bus communication can be realized.
    • 为了实现在TV-DVD组合设备中的TV微处理器(主机)和DVD模块微处理器(从机)之间的数据通信期间,确保I <2> C总线不会被卡住的有效和方便的方式, 通过I 2 C总线实现数据通信的看门狗定时器(13)。 已经检测到,如果在主机(10)和从机(11)之间的数据传输期间STOP条件丢失,I 2 C总线将被阻塞在低状态,即电视微处理器(10)将 不再能够与DVD模块进行通信。 由于TV-DVD组合设备中的一些干扰问题,可能会出现此问题。 通过执行看门狗定时器(13),最好在软件中可以实现用于I 2 C总线通信的简单错误恢复方案。