专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明申请

WO2012040085A1 HIGH DENSITY MULTI-CHIP LED DEVICES 审中-公开
标题翻译：高密度多芯片LED器件
公开(公告)号：WO2012040085A1
公开(公告)日：2012-03-29
申请号：PCT/US2011/052103
申请日：2011-09-19
申请人： CREE, INC. , ANDREWS, Peter Scott , ROSADO, Raymond , LAUGHNER, Michael P. , EMERSON, David T. , ABARE, Amber C. , BRITT, Jeffrey C.
发明人： ANDREWS, Peter Scott , ROSADO, Raymond , LAUGHNER, Michael P. , EMERSON, David T. , ABARE, Amber C. , BRITT, Jeffrey C.
IPC分类号： H01L25/075 , H01L33/62
CPC分类号： H01L25/0753 , H01L33/486 , H01L33/58 , H01L33/62 , H01L2224/48091 , Y10T29/49002 , H01L2924/00014
摘要： High density multi-chip LED devices (600, 700, 800, 900, 1100, 1200) are described. Embodiments of the present invention provide high-density, multi-chip LED devices (600, 700, 800, 900, 1100, 1200) with relatively high efficiency and light output in a compact size. An LED device (600, 700, 800, 900, 1100, 1200) includes a plurality of interconnected LED chips (610, 612, 710, 712, 810, 812, 910, 911, 912, 913, 1120, 1121, 1221, 1240) and an optical element such as a lens (1150). The LED chips (610, 612, 710, 712, 810, 812, 910, 911, 912, 913, 1120, 1121, 1221, 1240) may be arranged in two groups, wherein the LED chips within each group are connected in parallel and the groups are connected in series. In some embodiments, the LED device (600, 700, 800, 900, 1100, 1200) includes a submount (500, 1000), which may be made of ceramic. The submount (500, 1000) may include a connection bus and semicircular areas to which chips are bonded. Wire bonds (614, 616, 618, 620, 716, 718, 720, 814, 816, 820, 914, 916, 917, 918, 920, 921, 1122, 1123, 1125, 1126, 1221, 1240, 1242, 1244) can be connected to the LED chips (610, 612, 710, 712, 810, 812, 910, 911, 912, 913, 1120, 1121, 1221, 1240) so that all the wire bonds are disposed on the outside of a group of LED chips to minimize light absorption.
摘要翻译：描述了高密度多芯片LED器件（600,700,800,900,1100,1200）。本发明的实施例提供了具有较高效率和光输出的紧凑尺寸的高密度多芯片LED器件（600,700,800,900,1100,1200）。 LED装置（600,700,800,900,1100,1200）包括多个相互连接的LED芯片（610,612,710,712,810,812,910,911,912,913,1120,1121,1212,212， 1240）和诸如透镜（1150）的光学元件。 LED芯片（610,612,710,712,810,812,910,911,912,913,1120,1121,1221,1240）可以分成两组，每组中的LED芯片并联连接并且这些组是串联的。在一些实施例中，LED装置（600,700,800,900,1100,1200）包括可由陶瓷制成的底座（500,1000）。基座（500,1000）可以包括连接总线和与芯片结合的半圆形区域。线接合（614,616,618,620,716,718,720,814,816,820,914,916,917,918,920,921,1122,1123,1125,1126,1221,1240,1242,1244））可以连接到LED芯片（610,612,710,712,810,812,910,911,912,913,1120,1121,1221,1240），使得所有引线键都布置在一组LED芯片，以尽量减少光吸收。

2. 发明申请

WO2012047790A3 MULTIPLE CONFIGURATION LIGHT EMITTING DEVICES AND METHODS 审中-公开
标题翻译：多种配置发光装置和方法
公开(公告)号：WO2012047790A3
公开(公告)日：2012-07-19
申请号：PCT/US2011054563
申请日：2011-10-03
申请人： CREE INC , ANDREWS PETER S , ROSADO RAYMOND , LAUGHNER MICHAEL P , EMERSON DAVID T , BRITT JEFFREY C
发明人： ANDREWS PETER S , ROSADO RAYMOND , LAUGHNER MICHAEL P , EMERSON DAVID T , BRITT JEFFREY C
IPC分类号： H01L33/62 , H01L33/48
CPC分类号： H01L25/0753 , H01L33/58 , H01L33/62 , H01L2224/48091 , H01L2924/01322 , H01L2924/19107 , H01L2924/00014 , H01L2924/00
摘要： Multiple configuration light emitting diode (LED) devices and methods are disclosed wherein LEDs within the device can be selectively configured for use in higher voltage, or variable voltage, applications. Variable arrangements of LEDs can be configured. Arrangements can include one or more LEDs connected in series, parallel, and/or a combination thereof. A surface over which one or more LEDs may be mounted can comprise one or more electrically and/or thermally isolated portions.
摘要翻译：公开了多配置发光二极管（LED）装置和方法，其中装置内的LED可被选择性地配置为用于较高电压或可变电压应用。可以配置LED的可变布置。布置可以包括串联，并联和/或其组合的一个或多个LED。可以安装一个或多个LED的表面可以包括一个或多个电隔离部分和/或热隔离部分。

3. 发明申请

WO2004059809A3 METHODS OF FORMING SEMICONDUCTOR DEVICES HAVING SELF ALIGNED SEMICONDUCTOR MESAS AND CONTACT LAYERS AND RELATED DEVICES 审中-公开
标题翻译：形成具有自对准半导体器件和接触层及相关器件的半导体器件的方法
公开(公告)号：WO2004059809A3
公开(公告)日：2005-04-07
申请号：PCT/US0340377
申请日：2003-12-18
申请人： CREE INC , HABERERN KEVIN W , BERGMANN MICHAEL J , ROSADO RAYMOND , EMERSON DAVID T
发明人： HABERERN KEVIN W , BERGMANN MICHAEL J , ROSADO RAYMOND , EMERSON DAVID T
IPC分类号： C30B1/00 , H01L21/00 , H01L33/14 , H01S5/042 , H01S5/22 , H01S5/223 , H01S5/227 , H01S5/323
CPC分类号： H01L33/145 , H01S5/021 , H01S5/0421 , H01S5/0425 , H01S5/22 , H01S5/2205 , H01S5/2206 , H01S5/2214 , H01S5/2231 , H01S5/2275 , H01S5/32341 , H01S2301/176
摘要： Methods of forming a semiconductor device can include forming a semiconductor structure on a substrate, the semiconductor structure having mesa sidewalls and a mesa surface opposite the substrate. A contact layer can be formed on the mesa surface wherein the contact layer has sidewalls and a contact surface opposite the mesa surface and wherein the contact layer extends across substantially an entirety of the mesa surface. A passivation layer can be formed on the mesa sidewalls and on portions of the contact layer sidewalls adjacent the mesa surface, and the passivation layer can expose substantially an entirety of the contact surface of the contact layer.
摘要翻译：形成半导体器件的方法可以包括在衬底上形成半导体结构，半导体结构具有台面侧壁和与衬底相对的台面。接触层可以形成在台面表面上，其中接触层具有侧壁和与台面表面相对的接触表面，并且其中接触层在基本上整个台面表面上延伸。可以在台面侧壁和邻近台面表面的接触层侧壁的部分上形成钝化层，并且钝化层可以暴露接触层的基本上整个接触表面。

4. 发明申请

WO2012161969A1 GAP ENGINEERING FOR FLIP-CHIP MOUNTED HORIZONTAL LEDS 审中-公开
标题翻译：用于片状安装水平LED的GAP工程
公开(公告)号：WO2012161969A1
公开(公告)日：2012-11-29
申请号：PCT/US2012/037209
申请日：2012-05-10
申请人： CREE, INC. , EMERSON, David Todd , ROSADO, Raymond , DONOFRIO, Matthew , EDMOND, John Adam
发明人： EMERSON, David Todd , ROSADO, Raymond , DONOFRIO, Matthew , EDMOND, John Adam
IPC分类号： H01L33/00
CPC分类号： H01L33/52 , H01L25/0753 , H01L33/20 , H01L33/486 , H01L33/505 , H01L33/54 , H01L33/62 , H01L2924/0002 , H01L2924/00
摘要： A horizontal LED die is flip-chip mounted on a mounting substrate to define a gap that extends between the closely spaced apart anode and cathode contacts of the LED die, and between the closely spaced apart anode and cathode pads of the substrate. An encapsulant is provided on the light emitting diode die and the mounting substrate. The gap is configured to prevent sufficient encapsulant from entering the gap that would degrade operation of the LED.
摘要翻译：水平LED管芯被倒装安装在安装基板上以限定在LED管芯的紧密间隔开的阳极和阴极接触件之间以及衬底的间隔开的阳极和阴极焊盘之间延伸的间隙。密封剂设置在发光二极管管芯和安装基板上。间隙被配置成防止足够的密封剂进入间隙，这将降低LED的操作。

5. 发明申请

WO2012047790A2 MULTIPLE CONFIGURATION LIGHT EMITTING DEVICES AND METHODS 审中-公开
标题翻译：多配置发光器件和方法
公开(公告)号：WO2012047790A2
公开(公告)日：2012-04-12
申请号：PCT/US2011/054563
申请日：2011-10-03
申请人： CREE, INC. , ANDREWS, Peter, S. , ROSADO, Raymond , LAUGHNER, Michael, P. , EMERSON, David, T. , BRITT, Jeffrey, C.
发明人： ANDREWS, Peter, S. , ROSADO, Raymond , LAUGHNER, Michael, P. , EMERSON, David, T. , BRITT, Jeffrey, C.
IPC分类号： H01L33/62 , H01L33/48
CPC分类号： H01L25/0753 , H01L33/58 , H01L33/62 , H01L2224/48091 , H01L2924/01322 , H01L2924/19107 , H01L2924/00014 , H01L2924/00
摘要： Multiple configuration light emitting diode (LED) devices and methods are disclosed wherein LEDs within the device can be selectively configured for use in higher voltage, or variable voltage, applications. Variable arrangements of LEDs can be configured. Arrangements can include one or more LEDs connected in series, parallel, and/or a combination thereof. A surface over which one or more LEDs may be mounted can comprise one or more electrically and/or thermally isolated portions.
摘要翻译：公开了多种配置发光二极管（LED）器件和方法，其中器件内的LED可以被选择性地配置用于更高电压或可变电压应用。可以配置LED的可变布置。装置可以包括串联，并联和/或其组合的一个或多个LED。一个或多个LED可以安装在其上的表面可以包括一个或多个电和/或热隔离部分。

6. 发明申请

WO2012040084A1 MULTI-CHIP LED DEVICES 审中-公开
标题翻译：多芯片LED器件
公开(公告)号：WO2012040084A1
公开(公告)日：2012-03-29
申请号：PCT/US2011/052102
申请日：2011-09-19
申请人： CREE, INC. , ANDREWS, Peter Scott , ROSADO, Raymond , LAUGHNER, Michael P. , EMERSON, David T. , BRITT, Jeffrey C.
发明人： ANDREWS, Peter Scott , ROSADO, Raymond , LAUGHNER, Michael P. , EMERSON, David T. , BRITT, Jeffrey C.
IPC分类号： H01L25/075 , H01L33/62
CPC分类号： H01L25/0753 , H01L33/486 , H01L33/58 , H01L33/62 , H01L2224/48091 , Y10T29/49002 , H01L2924/00014
摘要： Multi-chip LED devices (200, 300) are described. Embodiments of the present invention provide multi-chip LED devices (200, 300) with relatively high efficiency and good color rendering. The LED device (200, 300) includes a plurality of interconnected LED chips (202, 302) and an optical element such as a lens. The optical element may be molded from silicone. The LED chips (202, 302) may be connected in parallel. In some embodiments, the LED device (200, 300) includes a submount (100), which may be made of a ceramic material such as alumina or aluminum nitride. Wire bonds (204, 304, 305) can be connected to the LED chips (202, 302) so that all the wire bonds tend the outside of a group of LED chips. Various sizes and types of LED chips may be used, including vertical LED chips and sideview LED chips.
摘要翻译：描述了多芯片LED器件（200,300）。本发明的实施例提供了具有较高效率和良好显色性能的多芯片LED器件（200,300）。 LED装置（200,300）包括多个互连的LED芯片（202,302）和诸如透镜的光学元件。光学元件可以由硅树脂模制而成。 LED芯片（202,302）可以并联连接。在一些实施例中，LED装置（200,300）包括底座（100），其可由诸如氧化铝或氮化铝的陶瓷材料制成。引线键合（204,304,305）可以连接到LED芯片（202,302），使得所有的引线键合趋向于一组LED芯片的外部。可以使用各种尺寸和类型的LED芯片，包括垂直LED芯片和侧面LED芯片。

7. 发明申请

WO2004059808A2 METHODS OF FORMING SEMICONDUCTOR DEVICES INCLUDING MESA STRUCTURES AND MULTIPLE PASSIVATION LAYERS AND RELATED DEVICES 审中-公开
标题翻译：形成MESA结构和多个钝化层及相关器件的半导体器件的方法
公开(公告)号：WO2004059808A2
公开(公告)日：2004-07-15
申请号：PCT/US2003/040682
申请日：2003-12-18
申请人： CREE, INC. , HABERERN, Kevin, W. , ROSADO, Raymond , BERGMANN, Michael, J. , EMERSON, David, T.
发明人： HABERERN, Kevin, W. , ROSADO, Raymond , BERGMANN, Michael, J. , EMERSON, David, T.
IPC分类号： H01S5/028
CPC分类号： H01L33/145 , H01S5/021 , H01S5/0421 , H01S5/0425 , H01S5/22 , H01S5/2205 , H01S5/2206 , H01S5/2214 , H01S5/2231 , H01S5/2275 , H01S5/32341 , H01S2301/176
摘要： A method of forming a semiconductor device may include forming a semiconductor structure on a substrate wherein the semiconductor structure defines a mesa having a mesa surface opposite the substrate and mesa sidewalls between the mesa surface and the substrate. A first passivation layer can be formed on at least portions of the mesa sidewalls and on the substrate adjacent the mesa sidewalls wherein at least a portion of the mesa surface is free of the first passivation layer and wherein the first passivation layer comprises a first material. A second passivation layer can be formed on the first passivation layer wherein at least a portion of the mesa surface is free of the second passivation layer, and wherein the second passivation layer comprises a second material different than the first material. Related devices are also discussed.
摘要翻译：形成半导体器件的方法可以包括在衬底上形成半导体结构，其中半导体结构限定具有与衬底相对的台面的台面和台面与衬底之间的台面侧壁。第一钝化层可以形成在台面侧壁的至少部分和邻近台面侧壁的基板上，其中台面表面的至少一部分不含第一钝化层，并且其中第一钝化层包括第一材料。可以在第一钝化层上形成第二钝化层，其中台面表面的至少一部分不含第二钝化层，并且其中第二钝化层包括不同于第一材料的第二材料。还讨论了相关设备。

8. 发明申请

WO2004059808A3 METHODS OF FORMING SEMICONDUCTOR DEVICES INCLUDING MESA STRUCTURES AND MULTIPLE PASSIVATION LAYERS AND RELATED DEVICES 审中-公开
标题翻译：形成包括MESA结构和多个钝化层及相关器件的半导体器件的方法
公开(公告)号：WO2004059808A3
公开(公告)日：2004-12-09
申请号：PCT/US0340682
申请日：2003-12-18
申请人： CREE INC , HABERERN KEVIN W , ROSADO RAYMOND , BERGMANN MICHAEL J , EMERSON DAVID T
发明人： HABERERN KEVIN W , ROSADO RAYMOND , BERGMANN MICHAEL J , EMERSON DAVID T
IPC分类号： C30B1/00 , H01L21/00 , H01L33/14 , H01S5/042 , H01S5/22 , H01S5/223 , H01S5/227 , H01S5/323 , H01S5/028
CPC分类号： H01L33/145 , H01S5/021 , H01S5/0421 , H01S5/0425 , H01S5/22 , H01S5/2205 , H01S5/2206 , H01S5/2214 , H01S5/2231 , H01S5/2275 , H01S5/32341 , H01S2301/176
摘要： A method of forming a semiconductor device may include forming a semiconductor structure on a substrate wherein the semiconductor structure defines a mesa having a mesa surface opposite the substrate and mesa sidewalls between the mesa surface and the substrate. A first passivation layer can be formed on at least portions of the mesa sidewalls and on the substrate adjacent the mesa sidewalls wherein at least a portion of the mesa surface is free of the first passivation layer and wherein the first passivation layer comprises a first material. A second passivation layer can be formed on the first passivation layer wherein at least a portion of the mesa surface is free of the second passivation layer, and wherein the second passivation layer comprises a second material different than the first material. Related devices are also discussed.
摘要翻译：形成半导体器件的方法可以包括在衬底上形成半导体结构，其中半导体结构限定台面，该台面具有与衬底相对的台面表面和台面表面与衬底之间的台面侧壁。第一钝化层可以形成在台面侧壁的至少部分上以及邻近台面侧壁的衬底上，其中台面表面的至少一部分没有第一钝化层，并且其中第一钝化层包括第一材料。可以在第一钝化层上形成第二钝化层，其中台面表面的至少一部分没有第二钝化层，并且其中第二钝化层包括不同于第一材料的第二材料。还讨论了相关设备。

9. 发明申请

WO2004059809A2 METHODS OF FORMING SEMICONDUCTOR DEVICES HAVING SELF ALIGNED SEMICONDUCTOR MESAS AND CONTACT LAYERS AND RELATED DEVICES 审中-公开
标题翻译：形成具有自对准半导体器件和接触层及相关器件的半导体器件的方法
公开(公告)号：WO2004059809A2
公开(公告)日：2004-07-15
申请号：PCT/US2003/040377
申请日：2003-12-18
申请人： CREE, INC. , HABERERN, Kevin, W. , BERGMANN, Michael, J. , ROSADO, Raymond , EMERSON, David, T.
发明人： HABERERN, Kevin, W. , BERGMANN, Michael, J. , ROSADO, Raymond , EMERSON, David, T.
IPC分类号： H01S5/323
CPC分类号： H01L33/145 , H01S5/021 , H01S5/0421 , H01S5/0425 , H01S5/22 , H01S5/2205 , H01S5/2206 , H01S5/2214 , H01S5/2231 , H01S5/2275 , H01S5/32341 , H01S2301/176
摘要： Methods of forming a semiconductor device can include forming a semiconductor structure on a substrate, the semiconductor structure having mesa sidewalls and a mesa surface opposite the substrate. A contact layer can be formed on the mesa surface wherein the contact layer has sidewalls and a contact surface opposite the mesa surface and wherein the contact layer extends across substantially an entirety of the mesa surface. A passivation layer can be formed on the mesa sidewalls and on portions of the contact layer sidewalls adjacent the mesa surface, and the passivation layer can expose substantially an entirety of the contact surface of the contact layer.
摘要翻译：形成半导体器件的方法可以包括在衬底上形成半导体结构，半导体结构具有台面侧壁和与衬底相对的台面。接触层可以形成在台面表面上，其中接触层具有侧壁和与台面表面相对的接触表面，并且其中接触层在基本上整个台面表面上延伸。可以在台面侧壁和邻近台面表面的接触层侧壁的部分上形成钝化层，并且钝化层可以暴露接触层的基本上整个接触表面。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式