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1. 发明申请

WO2005038815A1 MEMORY DEVICE AND METHOD USING POSITIVE GATE STRESS TO RECOVER OVERERASED CELL 审中-公开
标题翻译：存储器件和使用正栅极应力来恢复过度电池的方法
公开(公告)号：WO2005038815A1
公开(公告)日：2005-04-28
申请号：PCT/US2004/030694
申请日：2004-09-16
申请人： ADVANCED MICRO DEVICES, INC. , HAMILTON, Darlene , LIU, Zhizheng , RANDOLPH, Mark, W. , HE, Yi , HSIA, Edward , TANPAIROJ, Kulachet , LEE, Mimi , MADHANI, Alykhan
发明人： HAMILTON, Darlene , LIU, Zhizheng , RANDOLPH, Mark, W. , HE, Yi , HSIA, Edward , TANPAIROJ, Kulachet , LEE, Mimi , MADHANI, Alykhan
IPC分类号： G11C16/34
CPC分类号： G11C16/3404 , G11C16/0475 , G11C16/107 , G11C16/3409 , G11C16/344 , G11C16/3445 , G11C16/345
摘要： A method of erasing a flash electrically erasable read only memory (EEPROM) device composed of a plurality of memory cells (10) includes pre-programming (100) the plurality of memory cells (10), applying an erase pulse (110) to the plurality of memory cells (10) followed by an erase verification (120). The erase verification (120) is followed by soft programming (135) any memory cells having a threshold voltage below a predetermined minimum level (V TMIN ) and applying a positive gate stress (130) to the plurality of memory cells (10). The erase method prevents overerasing and provides a tightened threshold voltage distribution.
摘要翻译：擦除由多个存储单元（10）组成的闪存电可擦除只读存储器（EEPROM）器件的方法包括：对所述多个存储器单元（10）进行预编程（100），向所述多个存储器单元（10）施加擦除脉冲（110）多个存储器单元（10），随后进行擦除验证（120）。擦除验证（120）之后是具有低于预定最小电平（VTMIN）的阈值电压并向多个存储单元（10）施加正门应力（130）的任何存储器单元（135）进行软编程（135）。擦除方法可以防止过压，并提供紧固的阈值电压分布。

2. 发明申请

WO2004097837A3 METHOD OF DUAL CELL MEMORY DEVICE OPERATION FOR IMPROVED END-OF-LIFE READ MARGIN 审中-公开
标题翻译：用于改进终止读取标记的双细胞存储器设备操作的方法
公开(公告)号：WO2004097837A3
公开(公告)日：2005-02-10
申请号：PCT/US2004007124
申请日：2004-03-08
申请人： ADVANCED MICRO DEVICES INC , HAMILTON DARLENE G , TANPAIROJ KULACHET , HSIA EDWARD , MADHANI ALYKHAN , LEE MIMI
发明人： HAMILTON DARLENE G , TANPAIROJ KULACHET , HSIA EDWARD , MADHANI ALYKHAN , LEE MIMI
IPC分类号： G11C20060101 , G11C11/34 , G11C11/56 , G11C16/04 , G11C16/10 , G11C16/34
CPC分类号： G11C11/5671 , G11C16/0475 , G11C16/10 , G11C16/3418 , G11C16/3454
摘要： A method of programming a dual cell memory device (6) having a first charge storing cell (38, 40) and a second charge storing cell (38, 40). According to one aspect of the method, the method can include over-erasing the first and second charge storing cells to shift an erase state threshold voltage of the memory device to be lower than a natural state threshold voltage. According to another aspect of the method, the method can include programming the first and second charge storing cells to the same data state and verifying that the second programmed charge storing cell stores charge corresponding to the data state. If the verification fails, both charge storing cells can be re-pulsed.
摘要翻译：一种编程具有第一电荷存储单元（38,40）和第二电荷存储单元（38,40）的双单元存储器件（6）的方法。根据该方法的一个方面，该方法可以包括过度擦除第一和第二电荷存储单元，以使存储器件的擦除状态阈值电压低于自然状态阈值电压。根据该方法的另一方面，该方法可以包括将第一和第二电荷存储单元编程为相同的数据状态，并验证第二编程电荷存储单元存储对应于数据状态的电荷。如果验证失败，则电荷存储单元可以被重新脉冲。

3. 发明申请

WO2006081168A1 AUTOMATED TESTS FOR BUILT-IN SELF TEST 审中-公开
标题翻译：自动测试自动测试
公开(公告)号：WO2006081168A1
公开(公告)日：2006-08-03
申请号：PCT/US2006/002246
申请日：2006-01-23
申请人： SPANSION LLC , LEE, Mimi , HAMILTON, Darlene , CHEAH, Ken Cheong , NGUYEN, Kendra , GUO, Xin
发明人： LEE, Mimi , HAMILTON, Darlene , CHEAH, Ken Cheong , NGUYEN, Kendra , GUO, Xin
IPC分类号： G11C29/12
CPC分类号： G11C29/021 , G11C16/04 , G11C29/02 , G11C29/028 , G11C29/1201 , G11C29/16
摘要： A method (800) is discussed for providing programmable test conditions for a built-in self test circuit (212) of a flash memory device (300). The method (800) comprises providing (804) a BIST interface (220) adapted to adjust a test condition (500) used in a BIST circuit (212), providing the memory cells (310) of the Flash memory device (300), and providing the BIST circuit (212) adapted to test the flash memory (310). The method (800) further comprises communicating (806) with the BIST interface (220) one or more global variables (520) associated with the test condition (500), adjusting (808) the test condition (500) used by the BIST circuit (212) based on the values represented by the global variables (500), performing (810) one or more test operations on the flash memory (310) in accordance with the adjusted test condition, and reporting (812) the results (560) of the memory test operations. The method (800) of the present invention may further include a serial communications medium and the use of a serial test protocol for communicating the global variables (500) to the BIST interface (220) and test results (560) from the interface (220). The global variables (520) may also be provided by a memory device user.
摘要翻译：讨论了一种用于为闪存设备（300）的内置自测电路（212）提供可编程测试条件的方法（800）。方法（800）包括提供（804）适于调整在BIST电路（212）中使用的测试条件（500）的BIST接口（220），提供闪存设备（300）的存储单元（310）以及提供适于测试闪速存储器（310）的BIST电路（212）。方法（800）还包括与BIST接口（220）通信（806）与测试条件（500）相关联的一个或多个全局变量（520），调整（808）由BIST电路使用的测试条件（500）基于由全局变量（500）表示的值，根据调整的测试条件执行（810）对闪存（310）的一个或多个测试操作，并且（812）结果（560）的内存测试操作。本发明的方法（800）还可以包括串行通信介质和使用串行测试协议来将接口（220）的全局变量（500）传送到BIST接口（220）和测试结果（560））。全局变量（520）也可以由存储器设备用户提供。

4. 发明申请

WO2004097837A2 METHOD OF DUAL CELL MEMORY DEVICE OPERATION FOR IMPROVED END-OF-LIFE READ MARGIN 审中-公开
标题翻译：用于改进终止读取标记的双细胞存储器设备操作的方法
公开(公告)号：WO2004097837A2
公开(公告)日：2004-11-11
申请号：PCT/US2004/007124
申请日：2004-03-08
申请人： ADVANCED MICRO DEVICES, INC. , HAMILTON, Darlene, G. , TANPAIROJ, Kulachet , HSIA, Edward , MADHANI, Alykhan , LEE, Mimi
发明人： HAMILTON, Darlene, G. , TANPAIROJ, Kulachet , HSIA, Edward , MADHANI, Alykhan , LEE, Mimi
IPC分类号： G11C
CPC分类号： G11C11/5671 , G11C16/0475 , G11C16/10 , G11C16/3418 , G11C16/3454
摘要： A method of programming a dual cell memory device (6) having a first charge storing cell (38, 40) and a second charge storing cell (38, 40). According to one aspect of the method, the method can include over-erasing the first and second charge storing cells to shift an erase state threshold voltage of the memory device to be lower than a natural state threshold voltage. According to another aspect of the method, the method can include programming the first and second charge storing cells to the same data state and verifying that the second programmed charge storing cell stores charge corresponding to the data state. If the verification fails, both charge storing cells can be re-pulsed.
摘要翻译：一种编程具有第一电荷存储单元（38,40）和第二电荷存储单元（38,40）的双单元存储器件（6）的方法。根据该方法的一个方面，该方法可以包括过度擦除第一和第二电荷存储单元，以使存储器件的擦除状态阈值电压低于自然状态阈值电压。根据该方法的另一方面，该方法可以包括将第一和第二电荷存储单元编程为相同的数据状态，并验证第二编程电荷存储单元存储对应于数据状态的电荷。如果验证失败，则电荷存储单元可以被重新脉冲。

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