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1. 发明申请

WO2011092526A1 A DRIVER FOR DDR2/3 MEMORY INTERFACES 审中-公开
标题翻译： DDR2 / 3内存接口的驱动程序
公开(公告)号：WO2011092526A1
公开(公告)日：2011-08-04
申请号：PCT/GR2011/000005
申请日：2011-01-27
申请人： ANALOGIES S.A. , PLESSAS, Fotis , DAVRAZOS, Efthimios , BIRBAS, Michael , KIKIDIS, John
发明人： PLESSAS, Fotis , DAVRAZOS, Efthimios , BIRBAS, Michael , KIKIDIS, John
IPC分类号： G11C29/02 , G11C7/10 , G11C11/4096
CPC分类号： G11C7/1072 , G11C7/10 , G11C7/1051 , G11C7/1057 , G11C7/1066 , G11C7/1069 , G11C7/1078 , G11C7/1084 , G11C7/12 , G11C11/4096 , G11C29/02 , G11C29/022 , G11C29/028 , G11C2207/2254
摘要： An apparatus is described that includes a combined drive and termination circuit programmable to interface to DDR2 and DDR3 memory modules. In an exemplary embodiment the apparatus includes a combined output/termination driver, an input driver and a calibration subsystem. The combined output/termination driver includes a number of pull-up circuits and a number of pull-down circuits. One of the pull-up circuits presents a fixed output impedance. The rest of the pull-up circuits have an impedance programmable between two desired impedance values. One of the pull-down circuits presents a fixed output impedance. The rest of the pull-down circuits have an impedance programmable between two desired impedance values. The necessary number of pull-up circuits and pull-down circuits is activated in order to provide a desired driving and termination circuit such as to interface to specific impedance values as defined by the DDR2 and DDR3 interface protocol.
摘要翻译：描述了一种装置，其包括可编程以与DDR2和DDR3存储器模块接口的组合的驱动和终端电路。在示例性实施例中，该装置包括组合的输出/终端驱动器，输入驱动器和校准子系统。组合的输出/终端驱动器包括多个上拉电路和多个下拉电路。其中一个上拉电路呈现固定的输出阻抗。其余的上拉电路的阻抗可编程在两个所需的阻抗值之间。一个下拉电路呈现固定的输出阻抗。其余的下拉电路具有两个所需阻抗值之间可编程的阻抗。激活必要数量的上拉电路和下拉电路，以便提供期望的驱动和终止电路，以便与由DDR2和DDR3接口协议定义的特定阻抗值相连接。

2. 发明申请

WO2010023492A3 ANALOG TO DIGITAL CONVERTER 审中-公开
公开(公告)号：WO2010023492A3
公开(公告)日：2010-03-04
申请号：PCT/GB2009/051101
申请日：2009-09-01
申请人： ANALOGIES S.A. , BARTON, Russell , PETRELLIS, Nikolaos , BIRBAS, Michael , KIKIDIS, John
发明人： PETRELLIS, Nikolaos , BIRBAS, Michael , KIKIDIS, John
IPC分类号： H03M1/42 , H03M1/14 , H03M1/36 , H03M1/16
摘要： An analog to digital converter for converting an initial analog signal into a digital signal comprising at least one electronic module with an input, a first output, and a second output, which module generates from an analog input signal: a first output signal, which first output signal in terms of multiples of a predetermined amount of current or voltage, such as 1uA or 1mV, is substantially equal to the integer quotient of division of the input signal by a number or comprises a plurality of signals which if combined are substantially equal to the integer quotient of division of the input signal in terms of multiples of a predetermined amount of current or voltage, and a second output signal which in terms of multiples of a predetermined amount of current or voltage, such as 1uA or 1mV, is substantially equal to the remainder of the division, the analog to digital converter also comprising a further analog to digital converter for converting the second output signal into a digital signal, wherein the further analog to digital converter is connected the at least one module and the module is configured so that in use when the analog input signal connects through the input the first output signal connects through the first output, and the second output signal connects through the second output into the further analog to digital converter.

3. 发明申请

WO2010023492A2 ANALOG TO DIGITAL CONVERTER 审中-公开
标题翻译：模拟数字转换器
公开(公告)号：WO2010023492A2
公开(公告)日：2010-03-04
申请号：PCT/GB2009051101
申请日：2009-09-01
申请人： ANALOGIES S A , BARTON RUSSELL , PETRELLIS NIKOLAOS , BIRBAS MICHAEL , KIKIDIS JOHN
发明人： PETRELLIS NIKOLAOS , BIRBAS MICHAEL , KIKIDIS JOHN
IPC分类号： H03M1/42 , H03M1/14
CPC分类号： H03M1/368 , H03M1/146 , H03M1/164 , H03M1/366 , H03M1/42
摘要： An analog to digital converter for converting an initial analog signal into a digital signal comprising at least one electronic module with an input, a first output, and a second output, which module generates from an analog input signal: a first output signal, which first output signal in terms of multiples of a predetermined amount of current or voltage, such as 1uA or 1mV, is substantially equal to the integer quotient of division of the input signal by a number or comprises a plurality of signals which if combined are substantially equal to the integer quotient of division of the input signal in terms of multiples of a predetermined amount of current or voltage, and a second output signal which in terms of multiples of a predetermined amount of current or voltage, such as 1uA or 1mV, is substantially equal to the remainder of the division, the analog to digital converter also comprising a further analog to digital converter for converting the second output signal into a digital signal, wherein the further analog to digital converter is connected the at least one module and the module is configured so that in use when the analog input signal connects through the input the first output signal connects through the first output, and the second output signal connects through the second output into the further analog to digital converter.
摘要翻译：一种用于将初始模拟信号转换为数字信号的模数转换器，包括具有输入端，第一输出端和第二输出端的至少一个电子模块，该模块根据模拟输入信号产生：第一输出信号，其第一输出信号以预定量的电流或电压（诸如1uA或1mV）的倍数表示的输出信号基本上等于输入信号除以数的整数商或包括多个信号，如果组合的信号基本上等于输入信号以预定量的电流或电压的倍数表示的整数商与以诸如1uA或1mV的预定量的电流或电压的倍数表示的第二输出信号基本相等到除法器的其余部分，模数转换器还包括用于将第二输出信号转换成数字信号的另一模数转换器其中所述另一模数转换器连接到所述至少一个模块并且所述模块被配置为使得在所述模拟输入信号通过所述输入连接时所述第一输出信号通过所述第一输出连接并且所述第二输出信号连接通过第二个输出进入另一个模数转换器。

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