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    • 4. 发明申请
    • DAMASCENE PROCESS HAVING RETAINED CAPPING LAYER THROUGH METALLIZATION FOR PROTECTING LOW-K DIELECTRICS
    • 通过用于保护低K电介质的金属化具有保留的覆盖层的大面积工艺
    • WO2008151166A1
    • 2008-12-11
    • PCT/US2008/065586
    • 2008-06-02
    • TEXAS INSTRUMENTS INCORPORATEDJIANG, PingRAMAPPA, Deepak, A.
    • JIANG, PingRAMAPPA, Deepak, A.
    • H01L21/3205H01L21/28
    • H01L21/76808H01L29/78
    • A method of forming single or dual damascene interconnect structures using either a via- first or trench first approach includes the steps of providing a substrate (3) surface having an etch-stop layer thereon, a low-k dielectric layer on the etch-stop layer, and a dielectric capping layer on the low-k dielectric layer. In the single damascene process using trench pattern, a trench is etched through the capping layer, the low-k dielectric layer and the etch-stop layer to reach the substrate surface. In the via-first process, using a via pattern, the via is etched through the capping layer, the low-k dielectric layer and the etch-stop layer to reach the substrate surface. In the trench first process, using the via pattern the via is etched through the capping layer, the low-k dielectric layer and the etch-stop layer to reach the substrate surface. In the single damascene (12) or either via-first or trench- first dual damascene embodiment, the capping layer is retained over the low-k dielectric layer on top surfaces of the trench into the metal processing, generally including CMP processing, wherein the CMP process removes at least a portion, and in one embodiment the entire, capping layer.
    • 使用通孔或沟槽第一方法形成单个或双镶嵌互连结构的方法包括以下步骤:提供在其上具有蚀刻停止层的衬底(3)表面,蚀刻停止层上的低k电介质层 层,以及在低k电介质层上的介电覆盖层。 在使用沟槽图案的单个镶嵌工艺中,通过覆盖层,低k电介质层和蚀刻停止层蚀刻沟槽以到达衬底表面。 在通孔第一工艺中,使用通孔图案,通过覆盖层,低k电介质层和蚀刻停止层蚀刻通孔以到达衬底表面。 在沟槽第一工艺中,使用通孔图案,通过覆盖层,低k电介质层和蚀刻停止层蚀刻通孔以到达衬底表面。 在单镶嵌(12)或通孔或第一双镶嵌件实施例中,将覆盖层保留在沟槽顶表面上的低k介电层上,进入金属加工,通常包括CMP处理,其中 CMP工艺去除至少一部分,并且在一个实施例中移除整个封盖层。