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21. 发明申请

WO2006031257A3 METHOD FOR GROWING Si-Ge SEMICONDUCTOR MATERIALS AND DEVICES ON SUBSTRATES 审中-公开
标题翻译：用于生长Si-Ge半导体材料的方法和基板上的器件
公开(公告)号：WO2006031257A3
公开(公告)日：2006-09-08
申请号：PCT/US2005012157
申请日：2005-04-08
申请人： UNIV ARIZONA STATE , KOUVETAKIS JOHN , TSONG IGNATIUS S T , HU CHANGWU , TOLLE JOHN
发明人： KOUVETAKIS JOHN , TSONG IGNATIUS S T , HU CHANGWU , TOLLE JOHN
IPC分类号： C30B25/00
CPC分类号： C30B25/02 , B82Y10/00 , B82Y30/00 , C30B29/52 , H01L21/02381 , H01L21/02422 , H01L21/02532 , H01L21/02587 , H01L21/0262 , H01L21/02636
摘要： A method is provided for growing Si-Ge materials on Si(100) with Ge-rich contents (Ge>50 at.%) and precise stoichiometries SiGe, SiGe 2 , SiGe 3 and SiGe 4 . New hydrides with direct Si-Ge bonds derived from the family of compounds (H 3 Ge) X SiH 4 - X (x=1-4) are used to grow uniform, relayed and highly planar films with low defect densities at unprecedented low temperatures between about 300-450 ° C, circumventing entirely the need of thick compositionally graded buffer layer and lift off technologies. At about 500-700 ° C, SiGe X quantum dots are grown with narrow size distribution, defect-free microstructures and highly homogeneous elemental content at the atomic level. The method provides precise control of morphology, composition, structure and strain via the incorporation of the entire Si/Ge framework of the gaseous precursor into the film. The grown materials possess the required morphological and microstructural characteristics for applications in high frequency electronic and optical systems, as well as templates and buffer layers for development of commercial devices based on high mobility Si and Ge channels.
摘要翻译：提供了一种用于在具有富锗含量（Ge> 50at。％）和精确化学计量的Si（100）上生长Si-Ge材料的方法，SiGe，SiGe 2 Si，SiGe 3， SUB＆gt;和SiGe 4。具有衍生自化合物族（H 3 3 Ge）的直接Si-Ge键的新的氢化物X 1 SiH 4-X（x = 1- 4）用于在约300-450℃之间的前所未有的低温下生长具有低缺陷密度的均匀，中继和高平面的膜，完全避免厚层组分梯度缓冲层和剥离技术的需要。在约500-700℃，SiGe X X量子点以窄的分布，无缺陷的微结构和在原子水平上的高度均匀的元素含量生长。该方法通过将气态前体的整个Si / Ge骨架结合到膜中来提供形态，组成，结构和应变的精确控制。生长的材料具有在高频电子和光学系统中的应用所需的形态和微结构特征，以及用于基于高迁移率Si和Ge通道开发商业设备的模板和缓冲层。

22. 发明申请

WO2006031240A1 HYDRIDE COMPOUNDS WITH SILICON AND GERMANIUM CORE ATOMS AND METHOD OF SYNTHESIZING SAME 审中-公开
标题翻译：具有硅和锗核心的氢化物化合物及其合成方法
公开(公告)号：WO2006031240A1
公开(公告)日：2006-03-23
申请号：PCT/US2004/043854
申请日：2004-12-31
申请人： ARIZONA BOARD OF REGENTS , KOUVETAKIS, John , RITTER, Cole, J., III , TOLLE, John
发明人： KOUVETAKIS, John , RITTER, Cole, J., III , TOLLE, John
IPC分类号： C01B6/06
CPC分类号： C01B33/04 , C01B6/06 , Y10S148/058
摘要： A method is provided for synthesizing silicon-germanium hydride compounds of the formula (H 3 Ge) 4-X SiH X , wherein x = 0, 1, 2 or 3. The method includes combining a silane triflate with a compound having a GeH 3 ligand under conditions whereby the silicon-germanium hydride is formed. The compound having the GeH 3 ligand is selected from the group consisting of KGeH 3 , NaGeH 3 and MR 3 GeH 3 , wherein M is a Group IV element and R is an organic ligand. The silane triflate can be H X Si (OSO 2 CF 3 ) 4-x or H x Si(OSO 2 C 4 F 9 ) 4-x• The method can be used to synthesize trisilane, (H 3 Si) 2 SiH 2 , and the iso-tetrasilane analog, (H 3 Si) 3 SiH, by combining a silane triflate with a compound comprising a SiH 3 ligand under conditions whereby the silicon hydride is formed. The silane triflate can include H X Si (OSO 2 CF 3 ) 4-x or H X Si (OSO 2 C 4 F 9 ) 4-x wherein x = 1 or 2. A method for synthesizing (H 3 Ge) 2 SiH 2 includes combining H 3 GeSiH 2 (OSO 2 CF 3 ) with KGeH 3 under conditions whereby (H 3 Ge) 2 SiH 2 is formed.
摘要翻译：提供了一种用于合成式（IIIa）Ge-Si-x-SiH x X的硅 - 锗氢化合物的方法，其中x = 0 ，1,2或3.该方法包括在形成硅 - 锗氢化物的条件下将硅烷三氟甲磺酸酯与具有GeH 3 N 3配体的化合物组合。具有GeH 3 N 3配体的化合物选自KGeH 3，NaGeH 3和MR 3 3， GeH 3，其中M是IV族元素，R是有机配体。硅烷三氟甲磺酸酯可以是H x Si（OSO 2，CF 3）4-x H或H x-Si可以使用该方法合成丙硅烷，（H 3 3 Si）2 SiH 2 Si，和异四硅烷类似物（H 3 N 3 > Si）3 SiH，通过在形成硅氢化物的条件下将硅烷三氟甲磺酸酯与包含SiH 3 N 3配体的化合物组合。硅烷三氟甲磺酸酯可以包括H x X Si（OSO 2，CF 3）4-x H或H X 1 Si（OSO 2 C 4 H 9）4-x X其中x = 1或 2.一种合成（H 3 N 3）2 Si 2 H 2的方法，包括将H 3 N 3 GeSiH 2 （H 3 N 3 Ge）的化合物，其中具有KGeH 3的化合物（OSO 2 < 形成2 SiH 2 2。

23. 发明申请

WO2004114368B1 METHOD FOR PREPARING GE1-x-ySnxEy (E=P, As, Sb) SEMICONDUCTORS AND RELATED Si-Ge-Sn-E AND Si-Ge-E ANALOGS 审中-公开
标题翻译：制备GE1-x-ySnxEy（E = P，As，Sb）半导体和相关Si-Ge-Sn-E和Si-Ge-E模拟物的方法
公开(公告)号：WO2004114368B1
公开(公告)日：2005-09-22
申请号：PCT/US2004018968
申请日：2004-06-14
申请人： UNIV ARIZONA STATE , KOUVETAKIS JOHN , BAUER MATTHEW , TOLLE JOHN , COOK CANDI
发明人： KOUVETAKIS JOHN , BAUER MATTHEW , TOLLE JOHN , COOK CANDI
IPC分类号： H01L20060101 , H01L21/22 , H01L21/225 , H01L21/38
CPC分类号： H01L21/2252 , C23C16/22 , C30B25/02 , C30B29/08 , C30B29/52
摘要： A process for is provided for synthesizing a compound having the formula E(GeH3)3 wherein E is selected from the group consisting of arsenic (As), antimony (Sb) and phosphorus (P). GeH3Br and [CH3)3Si]3E are combined under conditions whereby E(GeH3)3 is obtained. The E(GeH3)3 is purified by trap-to-trap fractionation. Yields from about 70% to about 76% can be obtained. The E(GeH3)3 can be used as a gaseous precursor for doping a region of a semiconductor material comprising Ge, SnGe, SiGe and SiGeSn in a chemical vapor deposition reaction chamber.
摘要翻译：提供用于合成具有式E（GeH 3）3的化合物的方法，其中E选自砷（As），锑（Sb）和磷（P）。 GeH 3 Br和[CH 3）3 Si] 3E在得到E（GeH 3）3的条件下合并。 E（GeH 3）3通过捕集阱捕获分级纯化。可以获得约70％至约76％的产率。 E（GeH 3）3可以用作气化前体，用于在化学气相沉积反应室中掺杂包含Ge，SnGe，SiGe和SiGeSn的半导体材料的区域。

24. 发明申请

WO2005001902A2 GESN ALLOYS AND ORDERED PHASES WITH DIRECT TUNABLE BANDGAPS GROWN DIRECTLY ON SILICON 审中-公开
标题翻译：具有直接在硅上直接形成的直接焊接带的合金和订购相
公开(公告)号：WO2005001902A2
公开(公告)日：2005-01-06
申请号：PCT/US2004/018961
申请日：2004-06-14
申请人： ARIZONA BOARD OF REGENTS, acting for and on behalf of ARIZONA STATE UNIVERSITY , KOUVETAKIS, John , BAUER, Matthew , MENENDEZ, Jose , HU, Chang, Wu , TSONG, Ignatius, S., T. , TOLLE, John
发明人： KOUVETAKIS, John , BAUER, Matthew , MENENDEZ, Jose , HU, Chang, Wu , TSONG, Ignatius, S., T. , TOLLE, John
IPC分类号： H01L
CPC分类号： H01L21/2252 , C23C16/22 , C30B25/02 , C30B29/08 , C30B29/52
摘要： A method for depositing an epitaxial Ge-Sn layer on a substrate in a CVD reaction chamber includes introducing into the chamber a gaseous precursor comprising SnD4 under conditions whereby the epitaxial Ge-Sn layer is formed on the substrate. the gaseous precursor comprises SnD4 and high purity H2 of about 15-20 % by volume. The gaseous precursor is introduced at a temperature in a range of about 250 °C to about 350 °C. Using the process device-quality Sn-Ge materials with tunable bandgaps can be grown directly on Si substrates.
摘要翻译：在CVD反应室中在衬底上沉积外延Ge-Sn层的方法包括在衬底上形成外延Ge-Sn层的条件下将包含SnD4的气态前体引入室中。气态前体包含约15-20体积％的SnD4和高纯度H2。气态前体在约250℃至约350℃的温度范围内引入。使用具有可调带隙的工艺设备质量的Sn-Ge材料可以直接在Si衬底上生长。

25. 发明申请

WO2005015609A3 SIXSNYGE1-X-Y AND RELATED ALLOY HETEROSTRUCTURES BASED ON SI, GE AND SN 审中-公开
标题翻译：基于SI，GE和SN的第六基元1-X-Y及相关合金异构体
公开(公告)号：WO2005015609A3
公开(公告)日：2012-05-10
申请号：PCT/US2004018969
申请日：2004-06-14
申请人： UNIV ARIZONA , KOUVETAKIS JOHN , BAUER MATTHEW , TOLLE JOHN
发明人： KOUVETAKIS JOHN , BAUER MATTHEW , TOLLE JOHN
IPC分类号： H01L21/02 , H01L20060101 , H01L21/22 , H01L21/225 , H01L21/38 , H01L29/06 , H01L31/00 , H01L31/06
CPC分类号： H01L21/2252 , C23C16/22 , C30B25/02 , C30B29/08 , C30B29/52
摘要： A novel method for synthesizing device-quality alloys and ordered phases in a Si-Ge-Sn system uses a UHV-CVD process and reactions of SnD4 with SiH3GeH3. Using the method, single-phase Si x Sn y Ge 1-x-y semiconductors (x = 0.25, y = 0.11) are grown on Si via Ge1-xSnx buffer layers The Ge1-xSnx buffer layers facilitate heteroepitaxial growth of the Si x Sn y Ge 1-x-y films and act as compliant templates that can conform structurally and absorb the differential strain imposed by the more rigid Si and Si-Ge-Sn materials. The SiH3GeH3 species was prepared using a new and high yield method that provided high purity semiconductor grade material.
摘要翻译：在Si-Ge-Sn系统中合成器件质量合金和有序相的新方法使用特高压CVD法和SnD4与SiH3GeH3的反应。使用该方法，通过Ge1-xSnx缓冲层在Si上生长单相Si x Sn y Ge 1-xy半导体（x = 0.25，y = 0.11）。Ge1-xSnx缓冲层有助于Si x Sn y的异质外延生长 Ge 1-xy膜，并且作为可以在结构上符合并吸收由更刚性的Si和Si-Ge-Sn材料施加的微分应变的柔性模板。使用提供高纯度半导体级材料的新的高产率方法制备SiH 3 GeH 3物质。

26. 发明申请

WO2010044978A1 HYBRID GROUP IV/III-V SEMICONDUCTOR STRUCTURES 审中-公开
标题翻译：混合组IV / III-V半导体结构
公开(公告)号：WO2010044978A1
公开(公告)日：2010-04-22
申请号：PCT/US2009/057213
申请日：2009-09-16
申请人： ARIZONA BOARD OF REGENTS, A BODY CORPORATE ACTING FOR AND ON BEHALF OF ARIZONA STATE UNIVERSITY , KOUVETAKIS, John , MENENDEZ, Jose
发明人： KOUVETAKIS, John , MENENDEZ, Jose
IPC分类号： H01L31/0352 , H01L31/18 , H01L31/0312 , H01L21/02 , H01L21/20 , H01L31/105
CPC分类号： H01L21/02381 , H01L21/0245 , H01L21/02452 , H01L21/02543 , H01L21/02546 , H01L21/02549 , H01L21/0262 , H01L31/0324 , H01L31/0687 , H01L31/076 , H01L31/105 , H01L31/1804 , H01L31/1844 , H01L31/1852 , Y02E10/544 , Y02E10/547 , Y02E10/548 , Y02P70/521
摘要： Described herein are semiconductor structures comprising (i) a Si substrate; (ii) a buffer region formed directly over the Si substrate, wherein the buffer region comprises (a) a Ge layer having a threading dislocation density below about 10 5 cm -2 ; or (b) a Ge 1-x Sn x layer formed directly over the Si substrate and a Ge 1-x-y Si x Sn y layer formed over the Ge 1-x Sn x layer; and (iii) a plurality of III -V active blocks formed over the buffer region, wherein the first III- V active block formed over the buffer region is lattice matched or pseudomorphically strained to the buffer region. Further, methods for forming the semiconductor structures are provided and novel Ge 1-x-y Si x Sn y , alloys are provided that are lattice matched or pseudomorphically strained to Ge and have tunable band gaps ranging from about 0.80 eV to about 1.4O eV.
摘要翻译：本文描述的是包括（i）Si衬底的半导体结构; （ii）直接形成在所述Si衬底上的缓冲区，其中所述缓冲区包括（a）穿透位错密度低于约105cm -2的Ge层; 或（b）直接形成在Si衬底上的Ge1-xSnx层和形成在Ge1-xSnx层上的Ge1-x-ySixSny层; 和（iii）在所述缓冲区上形成的多个III -V有源块，其中在所述缓冲区上形成的所述第一III-V有源块是晶格匹配或伪形变应变到所述缓冲区。此外，提供了用于形成半导体结构的方法，并提供Ge，Ge-x-y SixSny合金，它们与Ge晶格匹配或伪晶应变，具有约0.80eV至约140eV的可调带隙。

27. 发明申请

WO2010033638A1 THIN GROUP IV SEMICONDUCTOR STRUCTURES 审中-公开
标题翻译：第IV组半导体结构
公开(公告)号：WO2010033638A1
公开(公告)日：2010-03-25
申请号：PCT/US2009/057214
申请日：2009-09-16
申请人： ARIZONA BOARD OF REGENTS, a body corporate acting for and on behalf of ARIZONA STATE UNIVERSITY , KOUVETAKIS, John , MENENDEZ, Jose
发明人： KOUVETAKIS, John , MENENDEZ, Jose
IPC分类号： H01L21/02
CPC分类号： H01L21/02381 , H01L21/02433 , H01L21/0245 , H01L21/02452 , H01L21/02532 , H01L21/02535 , H01L21/02573 , H01L21/0262
摘要： Thin group IV semiconductor structures are provided comprising a thin Si substrate and a second region formed directly on the Si substrate, where the second region comprises either (i) a Ge1 -x Sn x layer; or (ii) a Ge layer having a threading dislocation density of less than about 10 5 /cm 2 , and the effective bandgap of the second region is less than the effective bandgap of the Si substrate. Further, methods for preparing the thin group IV semiconductor structures are provided. Such structures are useful, for example, as components of solar cells.
摘要翻译：提供了薄IV族半导体结构，其包括薄Si衬底和直接形成在Si衬底上的第二区域，其中第二区域包括（i）Ge1-xSnx层; 或（ii）穿透位错密度小于约105 / cm2的Ge层，并且第二区域的有效带隙小于Si衬底的有效带隙。此外，提供了制备薄IV族半导体结构的方法。这样的结构例如作为太阳能电池的组件是有用的。

28. 发明申请

WO2008086210A2 ZIRCONIUM AND HAFNIUM BORIDE ALLOY TEMPLATES ON SILICON FOR NITRIDE INTEGRATION APPLICATIONS 审中-公开
标题翻译：用于氮化物整合应用的硅的氮化锆和铪硼合金模板
公开(公告)号：WO2008086210A2
公开(公告)日：2008-07-17
申请号：PCT/US2008/050280
申请日：2008-01-04
申请人： ARIZONA BOARD OF REGENTS, ACTING FOR AND ON BEHALF OF ARIZONA STATE UNIVERSITY , KOUVETAKIS, John , ROUCKA, Radek
发明人： KOUVETAKIS, John , ROUCKA, Radek
IPC分类号： H01L29/06 , H01L21/36
CPC分类号： H01L29/24 , C30B25/183 , C30B29/403 , H01L21/0237 , H01L21/02381 , H01L21/02433 , H01L21/02488 , H01L21/02502 , H01L21/0254 , H01L21/0262 , H01L33/007
摘要： Methods are provided for preparing epitaxial AlGaN layers at temperatures less than about 800 0 C. Generally, a substrate is contacted with H 2 GaN 3 , D2GaNs, or mixtures thereof in the presence of an Al source at a suitable temperature and pressure to form an epitaxial Al x Gai_ x N layer. Further, semiconductor structures are provided comprising, a stack comprising a plurality of repeating alloy layers, formed over a substrate, wherein the repeating alloy layers comprise two or more alloy layer types, wherein at least one alloy layer type comprises a Zr z Hf y Al 1 _ z _ y B2, alloy layer, wherein the sum of z and y is less than or equal to 1, and the thickness of the stack is greater than about 50 nm.
摘要翻译：提供了用于在小于约800℃的温度下制备外延AlGaN层的方法。通常，在合适的温度和压力下，在Al源的存在下，将衬底与H 2 N 3 N 3 N 2，N 2 GaN或其混合物接触以形成外延Al SUB> x Gai_×N层。此外，提供了半导体结构，其包括在衬底上形成的包括多个重复合金层的叠层，其中所述重复合金层包括两种或更多种合金层类型，其中至少一种合金层类型包括Zr z 合金层，合金层，其中z的和z 并且y小于或等于1，并且堆叠的厚度大于约50nm。

29. 发明申请

WO2006099171A2 NOVEL GeSiSn-BASED COMPOUNDS, TEMPLATES, AND SEMICONDUCTOR STRUCTURES 审中-公开
标题翻译：新型GeSiSn基化合物，模板和半导体结构
公开(公告)号：WO2006099171A2
公开(公告)日：2006-09-21
申请号：PCT/US2006008654
申请日：2006-03-10
申请人： NG ON BEHALF OF ARIZONA STATE , KOUVETAKIS JOHN , ROUCKA RADEK
发明人： KOUVETAKIS JOHN , ROUCKA RADEK
CPC分类号： C23C16/0272 , C23C16/301 , C23C16/42 , C30B25/02 , C30B29/52 , H01L21/02381 , H01L21/0245 , H01L21/02452 , H01L21/02502 , H01L21/02532 , H01L21/02535 , H01L21/02543 , H01L21/02546 , H01L21/02549 , H01L21/02557 , H01L21/0256 , H01L21/02562 , H01L21/02568 , H01L21/0262 , H01L29/161 , H01L29/165 , H01L29/20 , H01L29/22 , H01L29/267 , H01L31/028 , H01L31/0296 , H01L31/0304 , H01L31/03046 , H01L31/101 , Y02E10/544 , Y02E10/547
摘要： The present invention provides novel compounds of the formula Gei-x-ySixSny, wherein 0.01
摘要翻译：本发明提供式Gei-x-ySixSny的新型化合物，其中0.01

30. 发明申请

WO2004073045A3 EPITAXIAL GROWTH OF A ZIRCONIUM DIBORIDE LAYER ON SILICON SUBSTRATES 审中-公开
公开(公告)号：WO2004073045A3
公开(公告)日：2004-08-26
申请号：PCT/US2004/004605
申请日：2004-02-12
申请人： ARIZONA BOARD OF REGENTS, a body corporate of the State of Arizona, acting for and on behalf of ARIZONA STATE UNIVERSITY , TSONG, Ignatius, S., T. , KOUVETAKIS, John , TOLLE, John , ROUCKA, Radek
发明人： TSONG, Ignatius, S., T. , KOUVETAKIS, John , TOLLE, John , ROUCKA, Radek
IPC分类号： C30B25/02
摘要： A semiconductor structure and fabrication method is provided for integrating wide bandgap nitrides with silicon. The structure includes a substrate, a single crystal buffer layer formed by epitaxy over the substrate and a group III nitride film formed by epitaxy over the buffer layer. The buffer layer is reflective and conductive. The buffer layer may comprise B an element selected from the group consisting of Zr, Hf, Al. For example, the buffer layer may comprise ZrB 2 , AlB 2 or HfB 2 . The buffer layer provides a lattice match with the group III nitride layer. The substrate can comprise silicon, silicon carbide (SiC), gallium arsenide (GaAs), sapphire or A1 2 O 3 . The group III nitride material includes GaN, A1N, InN, A1GaN, InGaN or A1InGaN and can form an active region. In a presently preferred embodiment, the buffer layer is ZrB 2 and the substrate is Si(111) or Si(100) and the group l[II nitride layer comprises GaN. The ZrB 2 buffer layer provides a reflective and conductive buffer layer that has a small lattice mismatch with GaN. The semiconductor structure can be used to fabricate active microelectronic devices, such as transistors including field effect transistors and bipolar transistors. The semiconductor structure also can be used to fabricate optoelectronic devices, such as laser diodes and light emitting diodes

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