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    • 11. 发明申请
    • DOUBLE SELF-ALIGNED METAL OXIDE TFT
    • 双重自对准金属氧化物TFT
    • WO2013119682A1
    • 2013-08-15
    • PCT/US2013/024956
    • 2013-02-06
    • CBRITE INC.
    • SHIEH, Chan-LongYU, Gang
    • H01J1/62
    • H01L29/7869H01L21/02554H01L21/02565H01L27/1225H01L27/1259H01L29/45H01L29/66969H01L29/78606
    • A method of fabricating metal oxide TFTs on transparent substrates includes the steps of positioning an opaque gate metal area on the front surface of the substrate, depositing transparent gate dielectric and transparent metal oxide semiconductor layers overlying the gate metal and a surrounding area, depositing transparent passivation material on the semiconductor material, depositing photoresist on the passivation material, exposing and developing the photoresist to remove exposed portions, etching the passivation material to leave a passivation area defining a channel area, depositing transparent conductive material over the passivation area, depositing photoresist over the conductive material, exposing and developing the photoresist to remove unexposed portions, and etching the conductive material to leave source and drain areas on opposed sides of the channel area.
    • 在透明基板上制造金属氧化物TFT的方法包括以下步骤:在衬底的前表面上定位不透明栅极金属区域,沉积覆盖栅极金属和周围区域的透明栅极电介质和透明金属氧化物半导体层,沉积透明钝化 在所述半导体材料上沉积光致抗蚀剂,在所述钝化材料上沉积光致抗蚀剂,曝光和显影所述光致抗蚀剂以去除暴露部分,蚀刻所述钝化材料以留下限定沟道区的钝化区,在所述钝化区上沉积透明导电材料, 导电材料,曝光和显影光致抗蚀剂以去除未曝光部分,并且蚀刻导电材料以在沟道区域的相对侧上留下源极和漏极区域。
    • 12. 发明申请
    • MASK LEVEL REDUCTION FOR MOFET
    • 屏蔽层减少MOFET
    • WO2011056294A1
    • 2011-05-12
    • PCT/US2010/048264
    • 2010-09-09
    • CBRITE INC.SHIEH, Chan-LongFOONG, FattYU, Gang
    • SHIEH, Chan-LongFOONG, FattYU, Gang
    • H01L21/336H01L29/78
    • H01L27/1288H01L27/1214H01L27/1225H01L29/4908H01L29/66969H01L29/7869
    • A method of fabricating a thin film transistor for an active matrix display using reduced masking operations includes patterning a gate on a substrate. A gate dielectric is formed over the gate and a semiconducting metal oxide is deposited on the gate dielectric. A channel protection layer is patterned on the semiconducting metal oxide overlying the gate to define a channel area and to expose the remaining semiconducting metal oxide. A source/drain metal layer is deposited on the structure and etched through to the channel protection layer above the gate to separate the source/drain metal layer into source and drain terminals and the source/drain metal layer and the semiconducting metal oxide are etched through at the periphery to isolate the transistor. A nonconductive spacer is patterned on the transistor and portions of the surrounding source/drain metal layer.
    • 使用减少的掩模操作制造用于有源矩阵显示器的薄膜晶体管的方法包括在衬底上图形化栅极。 在栅极上形成栅极电介质,并且在栅极电介质上沉积半导体金属氧化物。 将通道保护层图案化在覆盖栅极的半导体金属氧化物上,以限定通道区域并露出剩余的半导体金属氧化物。 源极/漏极金属层沉积在结构上并蚀刻到栅极上方的沟道保护层,以将源极/漏极金属层分离成源极和漏极端子,并且源/漏极金属层和半导体金属氧化物被蚀刻通过 在外围隔离晶体管。 在晶体管和周围源极/漏极金属层的部分上构图非导电间隔物。
    • 13. 发明申请
    • REVERSED FLEXIBLE TFT BACK-PANEL BY GLASS SUBSTRATE REMOVAL
    • 通过玻璃基板去除反向柔性TFT背板
    • WO2016140975A1
    • 2016-09-09
    • PCT/US2016/020278
    • 2016-03-01
    • CBRITE INC.
    • SHIEH, Chan-LongFOONG, FattYU, GangWANG, Guangming
    • H01L21/00
    • H01L27/1266H01L27/1222H01L27/1225H01L29/78669H01L29/78678H01L29/7869H01L51/003H01L51/0541H01L51/0545H01L51/56H01L2227/323H01L2227/326
    • The process of fabricating a flexible TFT back-panel includes depositing etch stop material on a glass support. A matrix of contact pads, gate electrodes and gate dielectric are deposited overlying the etch stop material. Vias are formed through the dielectric in communication with each pad. A matrix of TFTs is formed by depositing and patterning metal oxide semiconductor material to form an active layer of each TFT overlying the gate electrode. Source/drain metal is deposited on the active layer and in the vias in contact with the pads, the source/drain metal defining source/drain terminals of each TFT. Passivation material is deposited in overlying relationship to the TFTs. A color filter layer is formed on the passivation material and a flexible plastic carrier is affixed to the color filter. The glass support member and the etch stop material are then etched away to expose a surface of each of the pads.
    • 制造柔性TFT后面板的过程包括在玻璃支架上沉积蚀刻停止材料。 接触焊盘,栅极电极和栅极电介质的矩阵沉积在蚀刻停止材料上。 通过与每个焊盘连通的电介质形成通孔。 通过沉积和图案化金属氧化物半导体材料形成TFT的矩阵,以形成覆盖栅电极的每个TFT的有源层。 源极/漏极金属沉积在有源层上,并且在与焊盘接触的通孔中,源极/漏极金属限定每个TFT的源极/漏极端子。 钝化材料以与TFT相重叠的关系沉积。 在钝化材料上形成滤色器层,并将柔性塑料载体固定在滤色器上。 然后将玻璃支撑构件和蚀刻停止材料蚀刻掉以暴露每个焊盘的表面。
    • 14. 发明申请
    • FLEXIBLE APS X-RAY IMAGER WITH MOTFT PIXEL READOUT AND A PIN DIODE SENSING ELEMENT
    • 柔性APS X射线成像器,具有单像素读出和PIN二极管感应元件
    • WO2016025731A1
    • 2016-02-18
    • PCT/US2015/045083
    • 2015-08-13
    • CBRITE INC.
    • SHIEH, Chan-longYU, Gang
    • H01L27/146
    • H01L27/14663H01L27/14612H01L27/14658H01L27/14692H01L27/308H01L51/4293
    • A method of fabricating an X-ray imager including the steps of forming an etch stop layer on a glass substrate and depositing a stack of semiconductor layers on the etch stop layer to form a sensor plane. Separating the stack into an array of PIN photodiodes. Depositing a layer of insulating material on the array to form a planarized surface and forming vias through the insulating layer into communication with an upper surface of each photodiode and forming metal contacts on the planarized surface through the vias in contact with each photodiode. Fabricating an array of MOTFTs in an active pixel sensor configuration backplane on the planarized surface and in electrical communication with the contacts, to provide a sensor plane/MOTFT backplane interconnected combination. Attaching a flexible support carrier to the MOTFT backplane and removing the glass substrate. A scintillator is then laminated on the array of photodiodes.
    • 一种制造X射线成像仪的方法,包括以下步骤:在玻璃衬底上形成蚀刻停止层,并在蚀刻停止层上淀积一叠半导体层以形成传感器平面。 将堆叠分成PIN光电二极管阵列。 在阵列上沉积绝缘材料层以形成平坦化表面,并且通过绝缘层形成通孔,与每个光电二极管的上表面连通,并通过与每个光电二极管接触的通孔在平坦化表面上形成金属触点。 在平坦化表面上的有源像素传感器配置底板中和与触点电连通的MOTFT阵列制造,以提供传感器平面/ MOTFT背板互连的组合。 将柔性支撑载体安装到MOTFT背板上,并拆下玻璃基板。 然后将闪烁体层压在光电二极管阵列上。
    • 17. 发明申请
    • METAL OXIDE TFT WITH IMPROVED STABILITY
    • 金属氧化物膜具有改进的稳定性
    • WO2012057903A1
    • 2012-05-03
    • PCT/US2011/047768
    • 2011-08-15
    • CBRITE INC.SHIEH, Chan-longFOONG, FattYU, Gang
    • SHIEH, Chan-longFOONG, FattYU, Gang
    • H01L29/788
    • H01L29/7869H01L29/78696
    • A metal oxide semiconductor device including an active layer of metal oxide, a layer of gate dielectric, and a layer of low trap density material. The layer of low trap density material is sandwiched between the active layer of metal oxide and the layer of gate dielectric. The layer of low trap density material has a major surface parallel and in contact with a major surface of the active layer of metal oxide to form a low trap density interface with the active layer of metal oxide. A second layer of low trap density material can optionally be placed in contact with the opposed major surface of the active layer of metal oxide so that a low trap density interface is formed with both surfaces of the active layer of metal oxide.
    • 一种金属氧化物半导体器件,包括金属氧化物的有源层,栅极电介质层和低陷阱密度材料层。 低陷阱密度材料层夹在金属氧化物的有源层和栅极电介质层之间。 低陷阱密度材料层的主表面平行并与金属氧化物的有源层的主表面接触,以形成与金属氧化物的有源层的低陷阱密度界面。 可以可选地将第二层低陷阱密度材料放置成与金属氧化物的有源层的相对的主表面接触,使得与金属氧化物的活性层的两个表面形成低陷阱密度界面。
    • 18. 发明申请
    • DOUBLE SELF-ALIGNED METAL OXIDE TFT
    • 双重自对准金属氧化物TFT
    • WO2010123633A1
    • 2010-10-28
    • PCT/US2010/027162
    • 2010-03-12
    • CBRITE INC.
    • SHIEH, Chan-Long,YU, Gang
    • H01L21/336H01L29/786
    • H01L29/7869H01L21/02554H01L21/02565H01L29/66969
    • A method of fabricating metal oxide TFTs on transparent substrates includes the steps of positioning an opaque gate metal area on the front surface of the substrate, depositing transparent gate dielectric and transparent metal oxide semiconductor layers overlying the gate metal and a surrounding area, depositing transparent passivation material on the semiconductor material, depositing photoresist on the passivation material, exposing and developing the photoresist to remove exposed portions, etching the passivation material to leave a passivation area defining a channel area, depositing transparent conductive material over the passivation area, depositing photoresist over the conductive material, exposing and developing the photoresist to remove unexposed portions, and etching the conductive material to leave source and drain areas on opposed sides of the channel area.
    • 在透明基板上制造金属氧化物TFT的方法包括以下步骤:在衬底的前表面上定位不透明栅极金属区域,沉积覆盖栅极金属和周围区域的透明栅极电介质和透明金属氧化物半导体层,沉积透明钝化 在所述半导体材料上沉积光致抗蚀剂,在所述钝化材料上沉积光致抗蚀剂,曝光和显影所述光致抗蚀剂以去除暴露部分,蚀刻所述钝化材料以留下限定沟道区的钝化区,在所述钝化区上沉积透明导电材料, 导电材料,曝光和显影光致抗蚀剂以去除未曝光部分,并且蚀刻导电材料以在沟道区域的相对侧上留下源极和漏极区域。
    • 20. 发明申请
    • TWO-TERMINAL SWITCHING DEVICES AND THEIR METHODS OF FABRICATION
    • 双端开关器件及其制造方法
    • WO2008057553A2
    • 2008-05-15
    • PCT/US2007/023427
    • 2007-11-06
    • CBRITE INC.YU, GangSHIEH, Chan-LongLEE, Hsing-Chung
    • YU, GangSHIEH, Chan-LongLEE, Hsing-Chung
    • H01L29/861G02F1/1365G02F1/167H01L29/22H01L29/417H01L29/786H01L45/00H01L51/0035H01L51/0579H01L51/0587
    • Two-terminal switching devices characterized by high on/off current ratios and by high breakdown voltage are provided. These devices can be employed as switches in the driving circuits of active matrix displays, e.g., in electrophoretic, rotataing element and liquid crystal displays. The switching devices include two electrodes, and a layer of a broad band semiconducting material residing between the electrodes. According to one example, the cathode comprises a metal having a low work function, the anode comprises an organic material having a p+ or p++ type of conductivity, and the broad band semiconductor comprises a metal oxide. The work function difference between the cathode and the anode material is preferably at least about 0.6 eV. The on/off current ratios of at least 10,000 over a voltage range of about 15 V can be achieved. The devices can be formed, if desired, on flexible polymeric substrates having low melting points.
    • 提供了具有高开/关电流比和高击穿电压的双端开关器件。 这些器件可以用作有源矩阵显示器的驱动电路中的开关,例如在电泳,旋转元件和液晶显示器中。 开关装置包括两个电极以及位于电极之间的一层宽带半导体材料。 根据一个实例,阴极包含具有低功函数的金属,阳极包含具有p +或p ++类型导电性的有机材料,并且宽带半导体包含金属氧化物。 阴极和阳极材料之间的功函数差优选为至少约0.6eV。 可以实现在约15V的电压范围内至少10,000的通/断电流比。 如果需要,可以在具有低熔点的柔性聚合物基材上形成该装置。