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1. 发明授权

US10771145B2 Power efficiency in beamforming RF systems 有权
公开(公告)号：US10771145B2
公开(公告)日：2020-09-08
申请号：US15456086
申请日：2017-03-10
申请人： SEAKR ENGINEERING, INC.
发明人： Erik Buehler
IPC分类号： H03K11/00 , H04L25/60 , H04L25/64 , H04B7/185 , H04B7/06 , H04B1/04 , H04B7/08 , H03F1/02 , H03F3/24
摘要： A satellite communication system processes a plurality of input signals to generate beamformed signals, drives a plurality of nonlinear power amplifiers with the beamformed input signals to produce RF signals for transmission; and transmits the RF signals with a plurality of Tx antenna elements. Conversion to and from linear signals to and from nonlinear or digitized signals is performed. Temporal or spatial decorrelation of the beamformed signals is employed to reduce the impact of intermodulation products. In some cases the power amplifiers are nonlinear, and can be one-sided or two-sided and produce two or three distinct output levels.

2. 发明授权

US09264102B2 Trace canceller with equalizer adjusted for trace length driving variable-gain amplifier with automatic gain control loop 有权
公开(公告)号：US09264102B2
公开(公告)日：2016-02-16
申请号：US14793582
申请日：2015-07-07
申请人： Pericom Semiconductor Corporation
发明人： Hung-Yan Cheung , Michael Y. Zhang
IPC分类号： H03K11/00 , H04L25/60 , H04L25/64 , H04B3/466 , H04B3/14 , H04L25/02 , H04L25/03
CPC分类号： H04B3/466 , H04B3/146 , H04L25/0264 , H04L25/03878 , H04L25/03885
摘要： Distortions of both amplitude and phase along a transmission line are compensated for by a trace canceller inserted between a transmitter and a receiver. The trace canceller has an equalizer that compensates for a trace length between the transmitter and the trace canceller. A variable gain amplifier between the equalizer and an output buffer has its gain controlled by an automatic gain control circuit that compares low-frequency swings of the input and output of the trace canceller. The gain of the variable gain amplifier is reduced to prevent the output buffer from saturating and clipping peak voltages on its output. Thus both the variable gain amplifier and the output buffer remain in the linear region. Training pulses from the transmitter are passed through the trace canceller without clipping of peak voltages, allowing the transmitter and receiver to adjust transmission parameters to best match the transmission line.

3. 发明授权

US08595543B2 Method and circuit for trimming an internal oscillator of a USB device according to a counting number between a first and second clock count value 有权
标题翻译：根据第一和第二时钟计数值之间的计数数来修整USB设备的内部振荡器的方法和电路
公开(公告)号：US08595543B2
公开(公告)日：2013-11-26
申请号：US12889794
申请日：2010-09-24
申请人： Tsung-Yin Chiang , Chun-Chi Wang , Po-Hao Wu , Chun-An Tang
发明人： Tsung-Yin Chiang , Chun-Chi Wang , Po-Hao Wu , Chun-An Tang
IPC分类号： G06F1/00 , G06F1/12 , H04L25/64
CPC分类号： H04L7/0331 , H04L7/042
摘要： A circuit and method for trimming an internal oscillator of a USB device that generates a clock signal as a frequency source of the USB device detect an end of packet from an input data stream to initialize a counter, identify a token packet in the data stream to detect a start of frame token packet for the counter to carry out clock counting on the clock signal to thereby obtain a count value, and compare the count value with a reference value to determine a trimming code for trimming a clock frequency of the internal oscillator.
摘要翻译：用于修整USB设备的内部振荡器的电路和方法，其产生作为USB设备的频率源的时钟信号，从输入数据流检测分组的结束以初始化计数器，将数据流中的令牌分组识别为检测用于计数器的帧令牌分组的开始，对时钟信号执行时钟计数，从而获得计数值，并将计数值与参考值进行比较，以确定修整内部振荡器的时钟频率的修整代码。

4. 发明授权

US5400360A Repeater for a digital control system 失效
标题翻译：中继器用于数字控制系统
公开(公告)号：US5400360A
公开(公告)日：1995-03-21
申请号：US35675
申请日：1993-03-23
申请人： Alan W. Richards , Kenneth R. Talbott , Paul R. Smith
发明人： Alan W. Richards , Kenneth R. Talbott , Paul R. Smith
IPC分类号： H04L25/49 , H03K11/00 , H04L25/60 , H04L25/64
CPC分类号： H04L25/4902
摘要： A repeater device in a communication network within a transmission line segment receives a distorted signal from the transmission line and retransmits a modified signal. The repeater includes a detector for activating the device in response to the input of the signal and a logic control in order for directing the signal to the modifying portion of the device. To minimize bit error which may occur as the signal is being transmitted over the network or as the signal is being received by the modifying portion of the repeater, the repeater replaces the leading bit of the signal prior to being retransmitted back to the network.
摘要翻译：传输线路段内的通信网络中的中继器装置接收来自传输线路的失真信号并重新发送修改的信号。中继器包括用于响应于信号的输入而激活设备的检测器和用于将信号引导到设备的修改部分的逻辑控制。为了最小化信号在网络上传输时可能发生的位错误，或者当中继器的修改部分正在接收信号时，中继器将信号的前导位替换回网络。

5. 发明授权

US09954585B2 Software configurable distributed antenna system and method for reducing uplink noise 有权
公开(公告)号：US09954585B2
公开(公告)日：2018-04-24
申请号：US14831626
申请日：2015-08-20
申请人： Dali Systems Co. Ltd.
发明人： Paul Lemson , Shawn Patrick Stapleton , Sasa Trajkovic
IPC分类号： H03K11/00 , H04L25/60 , H04L25/64 , H04B7/04 , H04B10/2575 , H04B7/022 , H04W88/08
CPC分类号： H04B7/04 , H04B7/022 , H04B10/25753 , H04W88/085
摘要： A distributed antenna system includes a master unit including a downlink RF input operable to receive an RF input signal from a downlink port of a base station, a first optical port, and a second optical port. The distributed antenna system also includes a first remote unit coupled to the first optical port. The first remote unit comprises a downlink antenna port and a first uplink antenna port and a second remote unit coupled to the second optical port of the master unit. The second remote unit comprises a downlink antenna port and a second uplink antenna port. The master unit is operable to transmit a first RF signal associated with the first RF uplink signal to a first uplink port of the base station and transmit a second RF signal associated with the second RF uplink signal to a second uplink port of the base station.

6. 发明授权

US08675714B2 Trace canceller with equalizer adjusted for trace length driving variable-gain amplifier with automatic gain control loop 有权
标题翻译：跟踪消除器，带有自动增益控制回路的跟踪长度驱动可变增益放大器调整均衡器
公开(公告)号：US08675714B2
公开(公告)日：2014-03-18
申请号：US12902296
申请日：2010-10-12
申请人： Hung-Yan Cheung , Michael Y. Zhang
发明人： Hung-Yan Cheung , Michael Y. Zhang
IPC分类号： H03K11/00 , H04L25/60 , H04L25/64
CPC分类号： H04B3/466 , H04B3/146 , H04L25/0264 , H04L25/03878 , H04L25/03885
摘要： Distortions of both amplitude and phase along a transmission line are compensated for by a trace canceller inserted between a transmitter and a receiver. The trace canceller has an equalizer that compensates for a trace length between the transmitter and the trace canceller. A variable gain amplifier between the equalizer and an output buffer has its gain controlled by an automatic gain control circuit that compares low-frequency swings of the input and output of the trace canceller. The gain of the variable gain amplifier is reduced to prevent the output buffer from saturating and clipping peak voltages on its output. Thus both the variable gain amplifier and the output buffer remain in the linear region. Training pulses from the transmitter are passed through the trace canceller without clipping of peak voltages, allowing the transmitter and receiver to adjust transmission parameters to best match the transmission line.
摘要翻译：沿着传输线的幅度和相位的变形由插入在发射机和接收机之间的跟踪消除器补偿。跟踪消除器具有补偿发送器和跟踪消除器之间的跟踪长度的均衡器。均衡器和输出缓冲器之间的可变增益放大器的增益由自动增益控制电路控制，自动增益控制电路比较跟踪消除器的输入和输出的低频摆幅。降低可变增益放大器的增益，以防止输出缓冲器饱和和削减其输出端的峰值电压。因此，可变增益放大器和输出缓冲器都保持在线性区域中。来自发射机的训练脉冲通过跟踪消除器而不削减峰值电压，允许发射机和接收机调整传输参数以最好地匹配传输线路。

7. 发明申请

US20070121710A1 Phase locked loop including a frequency change module 有权
标题翻译：锁相环包括变频模块
公开(公告)号：US20070121710A1
公开(公告)日：2007-05-31
申请号：US11318593
申请日：2005-12-28
申请人： Hung-Ming Chien
发明人： Hung-Ming Chien
IPC分类号： H03K11/00 , H04L25/60 , H04L25/64
CPC分类号： H03L7/1976 , H03L7/0891 , H03L7/18 , H03L7/23
摘要： A phase locked loop (PLL) includes a detector, a charge pump, a loop filter, a voltage controlled oscillator (VCO), a divider, and a frequency change module. The detector provides a phase difference based on a reference signal and a feedback signal. The charge pump provides a charge based on the phase difference. The loop filter provides a voltage based on the charge. The VCO provides an output signal based on the voltage received from the loop filter. The divider divides a frequency of the output signal by a value to provide the feedback signal. The frequency change module processes an input signal having a first frequency to provide a processed signal having a second frequency that is different from the first frequency. The frequency change module selects the input signal or the processed signal to provide as the reference signal to the detector. Changing the frequency of the reference signal can change a frequency of a spur.
摘要翻译：锁相环（PLL）包括检测器，电荷泵，环路滤波器，压控振荡器（VCO），分频器和频率改变模块。检测器基于参考信号和反馈信号提供相位差。电荷泵基于相位差提供电荷。环路滤波器基于电荷提供电压。 VCO基于从环路滤波器接收的电压提供输出信号。分频器将输出信号的频率除以一个值，以提供反馈信号。频率变化模块处理具有第一频率的输入信号以提供具有不同于第一频率的第二频率的处理信号。频率变化模块选择输入信号或处理后的信号作为参考信号提供给检测器。更改参考信号的频率可能会改变频率。

8. 发明授权

US5751692A Bus signal detector 失效
标题翻译：总线信号检测器
公开(公告)号：US5751692A
公开(公告)日：1998-05-12
申请号：US485256
申请日：1995-06-07
申请人： Helmut Kiml
发明人： Helmut Kiml
IPC分类号： H03K5/1534 , H04L25/06 , H03K11/00 , H04L25/64
CPC分类号： H03K5/1534 , H04L25/069
摘要： A bus signal detector for a signal transmitted via a bus (12) has an edge detector (14) which supplies a signal (S.sub.F1) indicating the occurrence of a signal edge (F1) when the voltage on the bus (12) suddenly changes by at least a predetermined relative threshold (.DELTA.U.sub.s) in relation to a reference voltage (V.sub.ref) continuously adapted to the quiescent voltage of the bus (.sub.12). An evaluating circuit following the edge detector (14) uses the signal (S.sub.F1) supplied by the edge detector (14) to produce an output signal indicating a bus signal.
摘要翻译：用于经由总线（12）发送的信号的总线信号检测器具有边沿检测器（14），当总线（12）上的电压突然变化时，边沿检测器（14）提供指示出现信号沿（F1）的信号（SF1）至少相对于连续适应总线（12）的静态电压的参考电压（Vref）的预定相对阈值（DELTA Us）。跟随边缘检测器（14）的评估电路使用由边缘检测器（14）提供的信号（SF1）来产生指示总线信号的输出信号。

9. 发明授权

US4355400A Transmitting amplifier for a remote fed intermediate regenerator 失效
标题翻译：用于远程供电中间再生器的发射放大器
公开(公告)号：US4355400A
公开(公告)日：1982-10-19
申请号：US252300
申请日：1981-04-09
申请人： Josef Doemer , Gerhard Thanhaeuser
发明人： Josef Doemer , Gerhard Thanhaeuser
IPC分类号： H04L25/24 , H04L25/64 , H03K5/01
CPC分类号： H04L25/24
摘要： A remote fed intermediate regenerator for use in transmission lines for digital signals having no direct current component has for each transmission direction a series circuit including a distortion corrector a regenerator circuit and a transmitting amplifier. For isolating the signal path and the remote feed path each intermediate regenerator is preceded and followed by remote feed dividing filters and each intermediate regenerator contains a high power Zener diode bridging the remote feed path of the regenerator and the distortion correcter and regenerator circuit each contain low power Zener diodes for stabilizing the operating voltages thereof. A transmitting amplifier for the intermediate regenerator has dynamic current characteristics and operates to stabilize the voltage without the necessity of a Zener diode and accordingly does not require a high-value input impedance thereby avoiding a significant power loss.
摘要翻译：用于没有直流分量的数字信号的传输线的远程馈电中间再生器对于每个传输方向具有包括失真校正器，再生器电路和发射放大器的串联电路。为了隔离信号路径和远程馈送路径，每个中间再生器在远程馈送分频滤波器之前和之后，每个中间再生器包含桥接再生器的远程馈电路径的高功率齐纳二极管，并且失真校正器和再生器电路各自包含低电平用于稳定其工作电压的功率齐纳二极管。用于中间再生器的发射放大器具有动态电流特性并且用于稳定电压而不需要齐纳二极管，因此不需要高值输入阻抗，从而避免显着的功率损耗。

10. 发明授权

US4247935A Arrangement for converting start-stop signals into an isochronous signal 失效
标题翻译：将起始停止信号转换成同步信号的装置
公开(公告)号：US4247935A
公开(公告)日：1981-01-27
申请号：US47183
申请日：1979-06-08
申请人： Robert Bodart , Jean P. A. R. J. Werts
发明人： Robert Bodart , Jean P. A. R. J. Werts
IPC分类号： H04L25/40 , H04J3/00 , H04L5/22 , H04L5/24 , H04L25/64 , H04L5/00
CPC分类号： H04L5/24
摘要： An arrangement is described wherein the leading edge of an A-pulse in a telex signal is additionally delayed relative to the trailing edge, in order to prevent a specified upper limit from being exceeded at the conversion into an isochronous signal. For Z-pulses, a high upper limit for the number of bits is prescribed which, in cascade connections, may lead to degradation of the Z-pulses. The arrangement further enables, because of an additional delay of the leading edge of the Z-pulse relative to the trailing edge, the maximum number of bits in the isochronous signal to be one less than the maximum permissible number.
摘要翻译：描述了一种布置，其中电传信号中的A脉冲的前沿相对于后沿额外延迟，以防止在转换成等时信号时超出规定的上限。对于Z脉冲，规定了位数的高上限，其在级联连接中可能导致Z脉冲的劣化。该布置还使得由于Z脉冲相对于后沿的前沿的附加延迟，等时信号中的最大位数比最大允许数小一个。

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