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    • 3. 发明授权
    • Self adjusting edge detector circuit
    • 自调整边缘检测电路
    • US5717348A
    • 1998-02-10
    • US483779
    • 1995-06-07
    • Helmut Kiml
    • Helmut Kiml
    • H03K5/1534H03K5/22
    • H03K5/1534
    • A edge detector for the production of output signal in a manner dependent on positive and negative edges of a square wave signal comprises a differential amplifier with two base-coupled transistors (Q1, Q2). Each emitter of such transistors is connected via a constant current source (S1 and, respectively, S2) with a supply voltage line (10) and the emitter currents of the transistors are split up between two collectors, of which the first ones are connected with one another and, via a third constant current source (S3), with ground (12). Two output loops each comprise a series circuit composed of a resistor (R3, R4) and the collector-emitter path of an output transistor (Q3, Q4) between ground (12) and the supply voltage line (10). In the case of each of such output transistors (Q3, Q4) the base is connected in each case with a second collector of the base-coupled transistor (Q1, Q2) so that the switching state of the output transistors (Q1, Q2) is set by the voltage at each second collector. The output signals are able to be tapped at the collector of such output transistors (Q3, Q4). An input terminal (14) is connected with the emitter of one (Q1) of the base-coupled transistors (Q1, Q2) for the supply of a current dependent on the input signal and one capacitor (C1) is connected with the emitter of the other one (Q2) of the base-coupled transistors (Q1, Q2).
    • 用于以取决于方波信号的正和负边缘的方式产生输出信号的边缘检测器包括具有两个基极耦合晶体管(Q1,Q2)的差分放大器。 这种晶体管的每个发射极通过恒定电流源(S1和S2)与电源电压线(10)连接,并且晶体管的发射极电流分开在两个集电极之间,其中第一个与第 并通过第三恒流源(S3)与地(12)连接。 两个输出回路各自包括由电阻(R3,R4)和接地(12)和电源电压线(10)之间的输出晶体管(Q3,Q4)的集电极 - 发射极路径组成的串联电路。 在这些输出晶体管(Q3,Q4)的每一个的情况下,基极在每种情况下都与基极耦合晶体管(Q1,Q2)的第二集电极连接,使得输出晶体管(Q1,Q2)的开关状态 由每个第二收集器处的电压设定。 输出信号能够在这种输出晶体管(Q3,Q4)的集电极处被抽头。 输入端子(14)与基极耦合晶体管(Q1,Q2)中的一个(Q1)的发射极连接,用于提供取决于输入信号的电流,并且一个电容器(C1)与 另一个(Q2)的基极耦合晶体管(Q1,Q2)。
    • 6. 发明授权
    • Bus signal detector
    • 总线信号检测器
    • US5751692A
    • 1998-05-12
    • US485256
    • 1995-06-07
    • Helmut Kiml
    • Helmut Kiml
    • H03K5/1534H04L25/06H03K11/00H04L25/64
    • H03K5/1534H04L25/069
    • A bus signal detector for a signal transmitted via a bus (12) has an edge detector (14) which supplies a signal (S.sub.F1) indicating the occurrence of a signal edge (F1) when the voltage on the bus (12) suddenly changes by at least a predetermined relative threshold (.DELTA.U.sub.s) in relation to a reference voltage (V.sub.ref) continuously adapted to the quiescent voltage of the bus (.sub.12). An evaluating circuit following the edge detector (14) uses the signal (S.sub.F1) supplied by the edge detector (14) to produce an output signal indicating a bus signal.
    • 用于经由总线(12)发送的信号的总线信号检测器具有边沿检测器(14),当总线(12)上的电压突然变化时,边沿检测器(14)提供指示出现信号沿(F1)的信号(SF1) 至少相对于连续适应总线(12)的静态电压的参考电压(Vref)的预定相对阈值(DELTA Us)。 跟随边缘检测器(14)的评估电路使用由边缘检测器(14)提供的信号(SF1)来产生指示总线信号的输出信号。