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1. 发明授权

US06433647B1 Low noise I-Q mixer 有权
标题翻译：低噪音I-Q混音器
公开(公告)号：US06433647B1
公开(公告)日：2002-08-13
申请号：US09429700
申请日：1999-10-28
申请人： Pietro Filoramo , Giuseppe Palmisano , Raffaele Salerno
发明人： Pietro Filoramo , Giuseppe Palmisano , Raffaele Salerno
IPC分类号： H04B128
CPC分类号： H03D7/165 , H03D7/1433 , H03D7/145 , H03D7/1458 , H03D7/18
摘要： A low-noise quadrature phase I-Q modulator having a pair of Gilbert cell input stages driven by a feed voltage line and receiving in input respective square wave command signals coming from a local oscillator. The modulator comprises a transistor block with transistors connected to each cell and destined to carry out a voltage-current conversion of a signal in radio frequency received from the block itself; such block further including a single degeneration resistance.
摘要翻译：低噪声正交相位I-Q调制器，具有由馈电电压线驱动的一对吉尔伯特单元输入级，并且在输入来自本地振荡器的相应方波指令信号中接收。调制器包括晶体管块，其晶体管连接到每个单元并且目的地执行从块自身接收的射频中的信号的电压 - 电流转换; 这种嵌段还包括单一的抗退化性。

2. 发明授权

US06418304B1 Method and apparatus for improving efficiency of high-power linear amplifier 有权
标题翻译：提高高功率线性放大器效率的方法和装置
公开(公告)号：US06418304B1
公开(公告)日：2002-07-09
申请号：US09154225
申请日：1998-09-16
申请人： Sam Morrar
发明人： Sam Morrar
IPC分类号： H04B128
CPC分类号： H03F3/72 , H03F1/0261 , H03F1/30 , H03F2200/372 , H03F2203/7206 , H03F2203/7236
摘要： Disclosed is a method and apparatus for improving thermal efficiency and reliability of a linear power amplifier of a communication system. In an illustrative embodiment, the communication system operates in a half-duplex mode and a transistor control terminal (e.g., gate) of the amplifier is biased at a first bias voltage during transmit intervals of the half-duplex mode. The control terminal is biased at a second bias voltage different from the first bias voltage during receive intervals. The second bias voltage is sufficient to reduce idle currents in the amplifier during the receive intervals, thereby improving thermal efficiency of the amplifier. Also disclosed is a base station including a base station controller, a variable bias control circuit and a linear power amplifier. The variable bias control circuit operates under the control of the base station controller to supply a variable bias voltage to the amplifier. Thermal efficiency of the amplifier is improved by reducing idle currents via appropriate bias voltage control during a weak signal transmitting mode and/or during receive intervals of a half-duplex operating mode.
摘要翻译：公开了一种用于提高通信系统的线性功率放大器的热效率和可靠性的方法和装置。在说明性实施例中，通信系统以半双工模式工作，并且在半双工模式的发射间隔期间，放大器的晶体管控制端（例如，栅极）偏置在第一偏置电压。在接收间隔期间，控制端子被偏置在与第一偏置电压不同的第二偏置电压。第二偏置电压足以在接收间隔期间减小放大器中的空闲电流，从而提高放大器的热效率。还公开了包括基站控制器，可变偏置控制电路和线性功率放大器的基站。可变偏置控制电路在基站控制器的控制下工作，向放大器提供可变偏置电压。通过在弱信号发送模式期间和/或在半双工操作模式的接收间隔期间通过适当的偏置电压控制来减少空闲电流来改善放大器的热效率。

3. 发明授权

US06219535B1 Semiconductor amplifier and frequency converter 失效
标题翻译：半导体放大器和变频器
公开(公告)号：US06219535B1
公开(公告)日：2001-04-17
申请号：US09092438
申请日：1998-06-05
申请人： Hidetoshi Ishida , Daisuke Ueda
发明人： Hidetoshi Ishida , Daisuke Ueda
IPC分类号： H04B128
CPC分类号： H03D7/125
摘要： A semiconductor circuit includes at least first and second field effect transistors. A source electrode of the first field effect transistor is connected to a drain electrode of the second field effect transistor via a first AC current blocking element and is also grounded via a bypass capacitor. A drain electrode of the first field effect transistor is connected to a power supply. A source-drain voltage of the first field effect transistor is equal to or higher than a pinch-off voltage of the first field effect transistor. A source-drain voltage of the second field effect transistor is equal to or higher than a pinch-off voltage of the second field effect transistor.
摘要翻译：半导体电路至少包括第一和第二场效应晶体管。第一场效应晶体管的源电极经由第一交流电流阻断元件连接到第二场效应晶体管的漏电极，并且还经由旁路电容器接地。第一场效应晶体管的漏电极连接到电源。第一场效应晶体管的源极 - 漏极电压等于或高于第一场效应晶体管的截止电压。第二场效应晶体管的源极 - 漏极电压等于或高于第二场效应晶体管的截止电压。

4. 发明授权

US06205325B1 Active radio frequency mixer circuit with feedback 有权
标题翻译：有源射频混频电路具有反馈功能
公开(公告)号：US06205325B1
公开(公告)日：2001-03-20
申请号：US09223906
申请日：1998-12-31
申请人： John B. Groe
发明人： John B. Groe
IPC分类号： H04B128
CPC分类号： H03F1/32 , H03D7/1433 , H03D7/1458 , H03D7/1491 , H03D2200/0043 , H04M3/00
摘要： An active mixer circuit, and an associated method, includes a feedback element which increases the linearity of the mixer circuit so that the mixer circuit is operable over a wider dynamic range than typically permitted of conventional, active mixer circuits. The mixer circuit includes a transconductance stage including a pair of transconductance transistors. Signals are applied through both of the transconductance transistors in parallel. The feedback element is coupled to an output side of a first of the transconductance transistors. And, a mixing stage is coupled to an output side of a second of the transconductance transistors.
摘要翻译：有源混频器电路和相关联的方法包括反馈元件，其增加混频器电路的线性，使得混频器电路可以在通常允许的常规有源混频器电路的更宽的动态范围上操作。混频器电路包括跨导级，其包括一对跨导晶体管。信号通过并联的跨导晶体管施加。反馈元件耦合到第一跨导晶体管的输出侧。并且，混频级耦合到第二跨导晶体管的输出侧。

5. 发明授权

US06748205B1 Integrated circuit 有权
标题翻译：集成电路
公开(公告)号：US06748205B1
公开(公告)日：2004-06-08
申请号：US09703010
申请日：2000-10-31
申请人： Somei Kawasaki , Masami Iseki
发明人： Somei Kawasaki , Masami Iseki
IPC分类号： H04B128
CPC分类号： H04L25/0264 , G01R31/31715 , G01R31/31924
摘要： In an integrated circuit, a time-axis expanding circuit is provided in addition to a driver circuit for outputting a signal outside. The time-axis expanding circuit has an equivalent receiver circuit similar to an ordinary receiver circuit, and a D-type flip-flop circuit connected to the equivalent receiver circuit. Input signals from the pins of the time-axis expanding circuit are inputted to the gates of CMOS transistors of the equivalent receiver circuit, and equivalent differential receiving signals outputted from the drains of the CMOS transistors are inputted to the D input terminal of the D-type flip-flop circuit. A measuring clock signal is inputted to the clock input terminal of the D-type flip-flop circuit, and a time-axis-expanded signal is outputted from the Q output terminal of the D-type flip-flop circuit to an output terminal of the time-axis expanding circuit.
摘要翻译：在集成电路中，除了用于在外部输出信号的驱动电路之外，还提供时间轴扩展电路。时间轴扩展电路具有类似于普通接收机电路的等效接收器电路和连接到等效接收器电路的D型触发器电路。来自时间轴扩展电路的引脚的输入信号被输入到等效接收电路的CMOS晶体管的栅极，从CMOS晶体管的漏极输出的等效差分接收信号被输入到D- 型触发器电路。测量时钟信号被输入到D型触发器电路的时钟输入端，时间轴扩展信号从D型触发器电路的Q输出端输出到时间轴扩展电路。

6. 发明授权

US06701164B1 Mobile communication system with zone-shift control apparatus 失效
标题翻译：带移位控制装置的移动通信系统
公开(公告)号：US06701164B1
公开(公告)日：2004-03-02
申请号：US09597616
申请日：2000-06-20
申请人： Akira Yamaguchi , Yoshio Takeuchi , Fumio Watanabe
发明人： Akira Yamaguchi , Yoshio Takeuchi , Fumio Watanabe
IPC分类号： H04B128
CPC分类号： H04W16/28 , H04W16/30 , H04W36/32
摘要： A mobile communication system includes a plurality of antennas for sending and receiving beams, a plurality of mobile terminals moving in a fixed direction substantially, and a zone-shift control unit for treating the moving mobile terminals locating within a predetermined area as a single moving zone and for controlling the antennas and directions of the beams so that the beams always cover the moving zone.
摘要翻译：移动通信系统包括用于发送和接收波束的多个天线，基本上固定方向移动的多个移动终端和用于将位于预定区域内的移动移动终端处理为单个移动区域的区域移动控制单元并且用于控制光束的天线和方向，使得光束始终覆盖移动区域。

7. 发明授权

US06631257B1 System and method for a mixer circuit with anti-series transistors 有权
标题翻译：具有反串联晶体管的混频器电路的系统和方法
公开(公告)号：US06631257B1
公开(公告)日：2003-10-07
申请号：US09553974
申请日：2000-04-20
申请人： William A. White , Geoffrey C. Dawe
发明人： William A. White , Geoffrey C. Dawe
IPC分类号： H04B128
CPC分类号： H03D7/1433 , H03D7/1425 , H03D7/1441 , H03D7/1458 , H03D7/1491 , H03D2200/0043 , H03D2200/0088
摘要： A system and method for a mixer circuit places the RF and mixer core LO transistors on the same level in anti-series. The mixer circuit provides increased headroom, excellent linearity, controllable conversion-gain, and operates with a reduced supply voltage requirement.
摘要翻译：用于混频器电路的系统和方法将RF和混频器核心LO晶体管放置在相同的电平上以反串联。混频器电路提供增加的净空，优异的线性度，可控转换增益，并且以降低的电源电压要求运行。

8. 发明授权

US06603964B1 Mixer with reduced carrier feedthrough 有权
标题翻译：具有减少的载体馈通的混合器
公开(公告)号：US06603964B1
公开(公告)日：2003-08-05
申请号：US09655318
申请日：2000-09-05
申请人： Matthew D. Rowley , David E. Bockelman
发明人： Matthew D. Rowley , David E. Bockelman
IPC分类号： H04B128
CPC分类号： H03D7/1441 , H03D7/1458 , H03D7/1466 , H03D7/161 , H03D2200/0043 , H03D2200/0084 , H04B1/28
摘要： A mixer circuit (100) includes two balanced transmission gate mixers (102, 104). The mixer circuit (100) balances charge injection mechanisms which reduces carrier feedthrough in the preferred embodiment. The inputs signals provided to the second transmission gate mixer (104) are reversed as compared to those provided to the first transmission gate mixer (102). By reversing the forward path through the second transmission gate mixer (104), charge injection parasitics seen by the first transmission gate mixer (102) are canceled by those in the second transmission gate mixer (104).
摘要翻译：混频器电路（100）包括两个平衡传输门极混合器（102,104）。混合器电路（100）平衡在优选实施例中减少载流子馈通的电荷注入机构。提供给第二传输门混频器（104）的输入信号与提供给第一传输门混频器（102）的输入信号相反。通过反转通过第二传输门混合器（104）的正向路径，由第一传输门混频器（102）看到的电荷注入寄生效应被第二传输门混频器（104）中的那些消除。

9. 发明授权

US06324390B1 Fully integrated all-CMOS AM receiver 有权
标题翻译：完全集成的全CMOS AM接收器
公开(公告)号：US06324390B1
公开(公告)日：2001-11-27
申请号：US09656555
申请日：2000-09-06
申请人： Joseph S. Elder , Joseph T. Yestrebsky , Mohammed D. Islam
发明人： Joseph S. Elder , Joseph T. Yestrebsky , Mohammed D. Islam
IPC分类号： H04B128
CPC分类号： H04B1/1027 , H03J5/0272 , H03L7/197 , H04B1/26 , H04B1/28
摘要： A superhetrodyne AM receiver and digital decoder are formed on the same chip. The frequency responses of the various filters are tied to the reference frequency. To compensate for process variations in the implementation of the IC, bias currents setting the operating conditions for various amplifiers, filters, and other components in the system are adjusted based on frequency control signal in a PLL circuit in the local oscillator. Since the magnitude of the control signal reflects the process variations, the bias currents are adjusted based on the control signal to offset these variations in other portions of the receiver. To further improve the signal to noise ratio of the receiver. The IF filter is tuned within a range so as not to include any integer multiple or integer divisor of the timing reference frequency. Various techniques are described for enabling a complete superhetrodyne AM receiver to be implemented on a single chip which receives an antenna input signal and outputs a digital data signal.
摘要翻译：超高频AM接收机和数字解码器形成在同一芯片上。各种滤波器的频率响应与参考频率相关。为了补偿IC的实现中的工艺变化，基于本地振荡器中的PLL电路中的频率控制信号来调整设定系统中各种放大器，滤波器和其它部件的工作条件的偏置电流。由于控制信号的幅度反映了过程变化，所以基于控制信号调整偏置电流以抵消接收器其它部分中的这些变化。进一步提高接收机的信噪比。 IF滤波器在一个范围内调谐，以便不包括定时参考频率的任何整数倍或整数除数。描述了各种技术，用于使得能够在接收天线输入信号并输出数字数据信号的单个芯片上实现完整的超临界AM接收机。

10. 发明授权

US06594478B1 Self oscillating mixer 失效
标题翻译：自振式搅拌机
公开(公告)号：US06594478B1
公开(公告)日：2003-07-15
申请号：US09706443
申请日：2000-11-03
申请人： Vijay Nair , Nada El Zein , Herbert Goronkin
发明人： Vijay Nair , Nada El Zein , Herbert Goronkin
IPC分类号： H04B128
CPC分类号： H03D7/125
摘要： A self oscillating mixer circuit includes a dual gate FET, an NDR device coupled to a first gate of the FET, and a first bias input circuit adapted to couple a first bias voltage across the NDR device. The first bias voltage controls operation of the NDR device within an NDR region of the V-I characteristic curve of the NDR device so that oscillations occur in the NDR device and the FET. The first bias input circuit is adjustable to adjust the applied first bias voltage so as to control frequency and amplitude of the oscillations. An RF input terminal and a second bias input circuit are coupled to supply a second bias voltage at the other gate terminal, which biases the FET at maximum gain so that RF signals applied to the RF input terminal are mixed with the oscillations.
摘要翻译：自振荡混频器电路包括双栅极FET，耦合到FET的第一栅极的NDR器件和适于耦合NDR器件上的第一偏置电压的第一偏置输入电路。第一偏置电压控制NDR器件在NDR器件的V-I特性曲线的NDR区域内的操作，从而在NDR器件和FET中发生振荡。第一偏置输入电路是可调节的，以调节所施加的第一偏置电压，以便控制振荡的频率和振幅。 RF输入端子和第二偏置输入电路被耦合以在另一个栅极端子处提供第二偏置电压，其以最大增益偏置FET，使得施加到RF输入端子的RF信号与振荡混合。

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