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1. 发明申请

US20130257514A1 SOURCE-FOLLOWER BASED VOLTAGE MODE TRANSMITTER 审中-公开
标题翻译：基于电源的电压模式发射器
公开(公告)号：US20130257514A1
公开(公告)日：2013-10-03
申请号：US13435578
申请日：2012-03-30
申请人： Matthew D. Rowley , Rajarshi Mukhopadhyay
发明人： Matthew D. Rowley , Rajarshi Mukhopadhyay
IPC分类号： H03K17/687
CPC分类号： H03F3/45242 , H03F3/189 , H03F3/2173 , H03F3/245 , H03F2203/45296 , H03F2203/45702
摘要： An apparatus is provided. A first switch is coupled between first and third nodes in an H-bridge. A second switch is coupled between first and fourth nodes in the H-bridge. A third switch is coupled between the second and third nodes. A fourth switch is coupled between second and fourth nodes in the H-bridge. A first source-follower is coupled to the first node of the H-bridge and the first supply rail, and the first source-follower is configured to receive a first reference signal. A second source-follower is coupled to the second node of the H-bridge and the second supply rail, and the second source-follower is configured to receive a second reference signal.
摘要翻译：提供了一种装置。第一开关耦合在H桥中的第一和第三节点之间。第二开关耦合在H桥中的第一和第四节点之间。第三开关耦合在第二和第三节点之间。第四开关耦合在H桥中的第二和第四节点之间。第一源极跟随器耦合到H桥和第一电源轨的第一节点，并且第一源极跟随器被配置为接收第一参考信号。第二源极跟随器耦合到H桥和第二电源轨的第二节点，并且第二源极跟随器被配置为接收第二参考信号。

2. 发明授权

US07187207B2 Leakage balancing transistor for jitter reduction in CML to CMOS converters 有权
标题翻译：用于CML到CMOS转换器抖动降低的漏电平衡晶体管
公开(公告)号：US07187207B2
公开(公告)日：2007-03-06
申请号：US11168034
申请日：2005-06-27
申请人： Matthew D. Rowley
发明人： Matthew D. Rowley
IPC分类号： H03K19/0175 , H03K19/094 , H03K19/20 , H03K19/086
CPC分类号： H03K3/356139
摘要： The CML (current mode logic) to CMOS converter with a leakage balancing transistor for jitter reduction includes: a differential input stage; an output stage having a first branch coupled to a first output of the differential input stage and a second branch coupled to a second output of the differential input stage; and a leakage balancing transistor coupled to the first branch of the output stage.
摘要翻译：具有用于抖动降低的漏电平衡晶体管的CML（电流模式逻辑）至CMOS转换器包括：差分输入级; 输出级，其具有耦合到所述差分输入级的第一输出的第一分支和耦合到所述差分输入级的第二输出的第二分支; 以及耦合到所述输出级的所述第一分支的泄漏平衡晶体管。

3. 发明申请

US20130286499A1 VOLTAGE-MODE DRIVER 有权
标题翻译：电压模式驱动器
公开(公告)号：US20130286499A1
公开(公告)日：2013-10-31
申请号：US13457175
申请日：2012-04-26
申请人： Rajarshi Mukhopadhyay , Matthew D. Rowley
发明人： Rajarshi Mukhopadhyay , Matthew D. Rowley
IPC分类号： G11B5/09 , H03K3/00
CPC分类号： G11B5/022 , G11B5/09
摘要： A method is provided. A first CMOS switch is deactivated while activating a second CMOS switch to cause the portion of the write signal to transition from a first direct current (DC) voltage to a first peak voltage. After a first interval, the second CMOS switch is deactivated while activating a third CMOS switch to cause the portion of the write signal to transition from the first peak voltage to a second DC voltage. After a second interval, the third CMOS switch is deactivated while activating a fourth CMOS switch to cause the portion of the write signal to transition from the second DC voltage to a second peak voltage After a third interval, the fourth CMOS switch is deactivated while activating the first CMOS switch to cause the portion of the write signal to transition from the second peak voltage to the first DC voltage.
摘要翻译：提供了一种方法。第一CMOS开关在激活第二CMOS开关以使得该部分写入信号从第一直流（DC）电压转换到第一峰值电压时被去激活。在第一间隔之后，第二CMOS开关被去激活，同时激活第三CMOS开关以使写入信号的部分从第一峰值电压转变到第二直流电压。经过第二个间隔后，第三个CMOS开关被激活，第四个CMOS开关被激活，使得写入信号的一部分从第二个直流电压转变到第二个峰值电压。第三个间隔之后，第四个CMOS开关被激活第一CMOS开关，用于使写入信号的部分从第二峰值电压转换到第一直流电压。

4. 发明授权

US07986159B1 Method and apparatus for detecting a cable in a redriver 有权
标题翻译：用于检测转接器中的电缆的方法和装置
公开(公告)号：US07986159B1
公开(公告)日：2011-07-26
申请号：US12838226
申请日：2010-07-16
申请人： Jawaid Ahmad , Matthew D. Rowley
发明人： Jawaid Ahmad , Matthew D. Rowley
IPC分类号： H03K19/003 , H03K19/173 , H05K7/10
CPC分类号： G06F3/0658 , G06F3/0625 , G06F3/0676 , Y02D10/154
摘要： With conventional redrivers used for external Serial Advanced Technology Attachment (eSATA), there is no ability to indicated to a host that an external device (like a hard disk drive) is not present. As a result, power is consumed by a host because of nearly continual transmission of communication reset signals. Here, a redriver has been provided that includes a cable disconnect terminal and circuitry within a controller that is able to detect whether an external device is present. This redriver enables a host to be powered down or placed in a low power mode while also enabling the use an eSATA compliant connector.
摘要翻译：使用用于外部串行高级技术附件（eSATA）的常规转接器，无法向主机指示外部设备（如硬盘驱动器）不存在。结果是，由于通信复位信号的连续传输，主机消耗电力。这里，提供了一种转接器，其包括电缆断开端子和控制器内的能够检测外部设备是否存在的电路。该转接驱动器可使主机掉电或置于低功耗模式，同时还可以使用符合eSATA标准的连接器。

5. 发明授权

US06603964B1 Mixer with reduced carrier feedthrough 有权
标题翻译：具有减少的载体馈通的混合器
公开(公告)号：US06603964B1
公开(公告)日：2003-08-05
申请号：US09655318
申请日：2000-09-05
申请人： Matthew D. Rowley , David E. Bockelman
发明人： Matthew D. Rowley , David E. Bockelman
IPC分类号： H04B128
CPC分类号： H03D7/1441 , H03D7/1458 , H03D7/1466 , H03D7/161 , H03D2200/0043 , H03D2200/0084 , H04B1/28
摘要： A mixer circuit (100) includes two balanced transmission gate mixers (102, 104). The mixer circuit (100) balances charge injection mechanisms which reduces carrier feedthrough in the preferred embodiment. The inputs signals provided to the second transmission gate mixer (104) are reversed as compared to those provided to the first transmission gate mixer (102). By reversing the forward path through the second transmission gate mixer (104), charge injection parasitics seen by the first transmission gate mixer (102) are canceled by those in the second transmission gate mixer (104).
摘要翻译：混频器电路（100）包括两个平衡传输门极混合器（102,104）。混合器电路（100）平衡在优选实施例中减少载流子馈通的电荷注入机构。提供给第二传输门混频器（104）的输入信号与提供给第一传输门混频器（102）的输入信号相反。通过反转通过第二传输门混合器（104）的正向路径，由第一传输门混频器（102）看到的电荷注入寄生效应被第二传输门混频器（104）中的那些消除。

6. 发明授权

US08643969B2 Voltage-mode driver 有权
标题翻译：电压模式驱动
公开(公告)号：US08643969B2
公开(公告)日：2014-02-04
申请号：US13457175
申请日：2012-04-26
申请人： Rajarshi Mukhopadhyay , Matthew D. Rowley
发明人： Rajarshi Mukhopadhyay , Matthew D. Rowley
IPC分类号： G11B5/09
CPC分类号： G11B5/022 , G11B5/09
摘要： A method is provided. A first CMOS switch is deactivated while activating a second CMOS switch to cause the portion of the write signal to transition from a first direct current (DC) voltage to a first peak voltage. After a first interval, the second CMOS switch is deactivated while activating a third CMOS switch to cause the portion of the write signal to transition from the first peak voltage to a second DC voltage. After a second interval, the third CMOS switch is deactivated while activating a fourth CMOS switch to cause the portion of the write signal to transition from the second DC voltage to a second peak voltage After a third interval, the fourth CMOS switch is deactivated while activating the first CMOS switch to cause the portion of the write signal to transition from the second peak voltage to the first DC voltage.
摘要翻译：提供一种方法。第一CMOS开关在激活第二CMOS开关以使得该部分写入信号从第一直流（DC）电压转换到第一峰值电压时被去激活。在第一间隔之后，第二CMOS开关被去激活，同时激活第三CMOS开关以使写入信号的部分从第一峰值电压转变到第二直流电压。经过第二个间隔后，第三个CMOS开关被激活，第四个CMOS开关被激活，使得写入信号的一部分从第二个直流电压转变到第二个峰值电压。第三个间隔之后，第四个CMOS开关被激活第一CMOS开关，用于使写入信号的部分从第二峰值电压转换到第一直流电压。

7. 发明授权

US07279974B2 Fully differential large swing variable gain amplifier 有权
标题翻译：全差分大摆幅可变增益放大器
公开(公告)号：US07279974B2
公开(公告)日：2007-10-09
申请号：US11150448
申请日：2005-06-10
申请人： Matthew D. Rowley
发明人： Matthew D. Rowley
IPC分类号： H03F3/45
CPC分类号： H03F3/45183 , H03F2203/45368 , H03F2203/45644 , H03F2203/45674
摘要： The fully differential large swing variable gain amplifier circuit includes: a first 5-transistor transconductor having a common mode node; and a second 5-transistor transconductor having a common mode node coupled to the common mode node of the first 5-transistor transconductor, wherein the second 5-transistor transconductor operates 180 degrees out of phase with the first 5-transistor transconductor.
摘要翻译：全差分大摆动可变增益放大器电路包括：具有共模节点的第一5晶体管跨导体; 以及具有耦合到所述第一5晶体管跨导体的共模节点的共模节点的第二5晶体管跨导体，其中所述第二5晶体管跨导体与所述第一5晶体管跨导体相差180度异相。

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