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1. 发明申请

US20150326242A1 COUNTER, ANALOGUE TO DIGITAL CONVERTER INCLUDING THE COUNTER AND IMAGE SENSING DEVICE INCLUDING THE ANALOGUE TO DIGITAL CONVERTER 有权
标题翻译：计数器，数字转换器的模拟，包括计数器和图像传感装置，包括数字转换器的模拟
公开(公告)号：US20150326242A1
公开(公告)日：2015-11-12
申请号：US14490440
申请日：2014-09-18
申请人： SK hynix Inc.
发明人： Min-Seok SHIN
IPC分类号： H03M1/36 , H03K19/21 , H04N5/376 , H03K4/02 , H03M1/12 , H04N5/378 , H03K21/10 , G11C27/02
CPC分类号： H03M1/56 , G11C27/02 , H03K4/02 , H03K19/21 , H03K21/10 , H03M1/123 , H03M1/1245 , H03M1/36 , H04N5/376 , H04N5/378
摘要： A counter includes a sampling unit suitable for sampling a logic state of a least significant bit (LSB) during a counting hold section, the counting hold section is present between first and second ramp sections; and a toggling control unit suitable for, in response to a clock and a sampling signal outputted from the sampling unit, generating the LSB according to a first voltage level of a counting target signal during a second part of the first ramp section and generating the LSB according to a second voltage level of the counting target signal during a first part of the second ramp section.
摘要翻译：计数器包括适于在计数保持部分期间采样最低有效位（LSB）的逻辑状态的采样单元，计数保持部分存在于第一和第二斜坡部分之间; 以及切换控制单元，其适于响应于从所述采样单元输出的时钟和采样信号，在所述第一斜坡部分的第二部分期间根据计数目标信号的第一电压电平生成所述LSB，并且生成所述LSB 根据第二斜坡部分的第一部分期间的计数目标信号的第二电压电平。

2. 发明授权

US08963904B2 Clock feedthrough and crosstalk reduction method 有权
标题翻译：时钟馈通和串扰降低方法
公开(公告)号：US08963904B2
公开(公告)日：2015-02-24
申请号：US12839076
申请日：2010-07-19
申请人： Yongman Lee
发明人： Yongman Lee
IPC分类号： G09G5/00 , H03K5/12 , H03K3/00 , H03K3/012 , H03K17/04 , H03K17/16 , H03K17/687 , H03K4/02
CPC分类号： H03K4/02 , H03K17/163
摘要： Systems and methods of the present disclosure relates generally to techniques for controlling a gate signal applied to a transistor in an electronic component. One embodiment includes decreasing a skew rate at the rising and/or falling edges of the gate signal to reduce the effects of data signal errors. Decreasing the gate signal falling edge skew rate may decrease clock feedthrough effects of the transistor, and decreasing the gate signal rising edge skew rate may decrease crosstalk effects between more than one data paths in the electronic component. The falling edge skew rate may be manipulated by initially increasing the activating voltage of the gate signal to a higher voltage, such that the gate signal may take longer to fall. The rising edge skew rate may be manipulated by increasing a voltage later during the activating period, such that the gate signal may take longer to rise.
摘要翻译：本公开的系统和方法一般涉及用于控制施加到电子部件中的晶体管的栅极信号的技术。一个实施例包括降低门信号的上升沿和/或下降沿的偏移速率，以减少数据信号误差的影响。降低栅极信号下降沿偏移速率可能会降低晶体管的时钟馈通效应，并且降低栅极信号上升沿偏移速率可能会降低电子元件中多个数据通路之间的串扰效应。可以通过最初将栅极信号的激活电压增加到更高的电压来操纵下降沿偏移速率，使得栅极信号可能需要更长的时间来下降。可以通过在激活期间稍后增加电压来操纵上升沿偏移速率，使得栅极信号可能需要更长的时间来上升。

3. 发明授权

US08461883B2 Frequency generator 有权
标题翻译：频率发生器
公开(公告)号：US08461883B2
公开(公告)日：2013-06-11
申请号：US12773853
申请日：2010-05-05
申请人： Kuo-Ching Hsu , Chin-Hsun Hsu , Tsung-Hau Chang
发明人： Kuo-Ching Hsu , Chin-Hsun Hsu , Tsung-Hau Chang
IPC分类号： H03B19/00
CPC分类号： G06F1/08 , H03K4/02
摘要： A frequency generator is used for generating a frequency within a frequency range. The frequency generator includes a variable current source, a voltage drop generation unit, a voltage source, a detection unit, a conversion unit, and an oscillating circuit. The variable current source is used for outputting a current according to a control signal. The voltage drop generation unit is used for generating a voltage drop according to the current. The voltage source is used for outputting a voltage range. The detection unit is used for outputting the control signal to the variable current source according to a relationship between the voltage drop and the voltage range. The conversion unit is used for outputting a digital code according to the relationship between the voltage drop and the voltage range. The oscillator circuit is used for generating the frequency according to the digital code.
摘要翻译：频率发生器用于产生频率范围内的频率。频率发生器包括可变电流源，电压降产生单元，电压源，检测单元，转换单元和振荡电路。可变电流源用于根据控制信号输出电流。电压降产生单元用于根据电流产生电压降。电压源用于输出电压范围。检测单元用于根据电压降与电压范围之间的关系将控制信号输出到可变电流源。转换单元用于根据电压降和电压范围之间的关系输出数字代码。振荡电路用于根据数字码产生频率。

4. 发明申请

US20110285457A1 Multi-Level Transmitter Circuit Having Substantially Constant Impedance Output 有权
标题翻译：具有基本恒定阻抗输出的多电平变送器电路
公开(公告)号：US20110285457A1
公开(公告)日：2011-11-24
申请号：US12786331
申请日：2010-05-24
申请人： Isaac Terasuth Ko , Ka Wai Ho , Wan Tim Chan
发明人： Isaac Terasuth Ko , Ka Wai Ho , Wan Tim Chan
IPC分类号： G05F3/02
CPC分类号： H01L41/042 , B06B1/0207 , B06B2201/51 , B06B2201/55 , H03K4/02 , H03K5/156 , H03K19/0002
摘要： A multi-level transmitter circuit with substantially constant output impedance has a capacitive transducer connected between a voltage input and ground. A first voltage path connects the voltage input to a first positive voltage source. The first voltage path is controlled by a first control signal. A second voltage path connects the voltage input to a second positive voltage source, less than the first positive voltage source. The second voltage path passes through a diode and is controlled by a second control signal. A third voltage path connects the voltage input to a third voltage source, less than ground, and is controlled by the second control signal. The impedance at the voltage input during the first control signal is substantially the same as the impedance at the voltage input during the second control signal.
摘要翻译：具有基本上恒定的输出阻抗的多电平发射机电路具有连接在电压输入和地之间的电容式换能器。第一电压路径将电压输入连接到第一正电压源。第一电压路径由第一控制信号控制。第二电压路径将电压输入连接到第二正电压源，小于第一正电压源。第二电压路径通过二极管并由第二控制信号控制。第三电压路径将电压输入连接到小于地的第三电压源，并由第二控制信号控制。第一控制信号期间的电压输入端的阻抗与第二控制信号期间的电压输入处的阻抗基本相同。

5. 发明申请

US20110074468A1 FREQUENCY GENERATOR 有权
标题翻译：频率发生器
公开(公告)号：US20110074468A1
公开(公告)日：2011-03-31
申请号：US12773853
申请日：2010-05-05
申请人： Kuo-Ching Hsu , Chin-Hsun Hsu , Tsung-Hau Chang
发明人： Kuo-Ching Hsu , Chin-Hsun Hsu , Tsung-Hau Chang
IPC分类号： H03L7/00
CPC分类号： G06F1/08 , H03K4/02
摘要： A frequency generator is used for generating a frequency within a frequency range. The frequency generator includes a variable current source, a voltage drop generation unit, a voltage source, a detection unit, a conversion unit, and an oscillating circuit. The variable current source is used for outputting a current according to a control signal. The voltage drop generation unit is used for generating a voltage drop according to the current. The voltage source is used for outputting a voltage range. The detection unit is used for outputting the control signal to the variable current source according to a relationship between the voltage drop and the voltage range. The conversion unit is used for outputting a digital code according to the relationship between the voltage drop and the voltage range. The oscillator circuit is used for generating the frequency according to the digital code.
摘要翻译：频率发生器用于产生频率范围内的频率。频率发生器包括可变电流源，电压降产生单元，电压源，检测单元，转换单元和振荡电路。可变电流源用于根据控制信号输出电流。电压降产生单元用于根据电流产生电压降。电压源用于输出电压范围。检测单元用于根据电压降与电压范围之间的关系将控制信号输出到可变电流源。转换单元用于根据电压降和电压范围之间的关系输出数字代码。振荡电路用于根据数字码产生频率。

6. 发明申请

US20100253560A1 Electronic apparatus, AD converter, and AD conversion method 失效
标题翻译：电子设备，AD转换器和AD转换方法
公开(公告)号：US20100253560A1
公开(公告)日：2010-10-07
申请号：US12659802
申请日：2010-03-22
申请人： Shigetaka Kudo
发明人： Shigetaka Kudo
IPC分类号： H03M3/00 , H03M1/12
CPC分类号： H04N5/374 , H03K4/02 , H03M1/1023 , H03M1/123 , H03M1/56 , H04N5/378
摘要： An electronic apparatus includes: an AD conversion section that has a comparing section, which receives a reference signal whose level changes gradually from a reference signal generating section that generates the reference signal and which compares the reference signal with an analog signal to be processed, and a counter section, which receives a count clock for AD conversion and performs a count operation on the basis of a comparison result of the comparing section, and that acquires digital data of the signal to be processed on the basis of output data of the counter section; a count operation period control section that controls an operation period of the counter section in each processing period on the basis of the comparison result of the comparing section; and a driving control section that controls the reference signal generating section and the AD conversion section.
摘要翻译：一种电子设备，包括：AD转换部分，具有比较部分，其接收电平从产生参考信号的参考信号产生部分逐渐变化并将参考信号与待处理的模拟信号进行比较的参考信号;以及计数器部分，其接收用于AD转换的计数时钟，并且基于比较部分的比较结果执行计数操作，并且基于计数器部分的输出数据获取要处理的信号的数字数据 ; 计数运算周期控制部，根据比较部的比较结果，对每个处理期间的计数部的运算期间进行控制; 以及驱动控制部分，其控制参考信号产生部分和AD转换部分。

7. 发明授权

US07161519B2 PWM modulation circuit and class D amplifier using such PWM modulation circuit 有权
标题翻译： PWM调制电路和D类放大器采用这种PWM调制电路
公开(公告)号：US07161519B2
公开(公告)日：2007-01-09
申请号：US11215008
申请日：2005-08-31
申请人： Hideo Taniuchi
发明人： Hideo Taniuchi
IPC分类号： H03M1/82
CPC分类号： G06J1/00 , H03F3/217 , H03F2200/351 , H03K4/02 , H03K7/08 , H03M1/504
摘要： The PWM modulation circuit according to the invention is connected to an input terminal for an analog baseband signal and a staircase generating circuit generating a staircase wave, and carries out PWM modulation to a staircase wave input from the staircase generating circuit based on an analog baseband signal input from the input terminal. The staircase generating circuit includes a plurality of constant current source circuits, a plurality of switches connected to the plurality of constant current source circuits on a one-to-one basis, a serial-parallel conversion circuit that carries out serial-parallel conversion to a clock signal input from a clock signal input terminal and outputs the result to the plurality of switches, and an output voltage control circuit that converts a constant current input from the plurality of constant current source circuits into a constant voltage at an arbitrary value and outputs the result. The plurality of switches switch between their on and off states in response to a clock signal input from the serial-parallel conversion circuit. The output voltage control circuit converts a constant current input from the plurality of constant current source circuits connected to the plurality of switches in an on state into a constant voltage in a prescribed ratio, so that a staircase wave is generated.
摘要翻译：根据本发明的PWM调制电路连接到模拟基带信号的输入端和产生阶梯波的阶梯产生电路，并且基于模拟基带信号对从阶梯发生电路输入的阶梯波进行PWM调制从输入端输入。该阶梯发生电路包括多个恒流源电路，一对一连接到多个恒流源电路的多个开关，串行并行转换电路，其进行串行并行转换为时钟信号从时钟信号输入端子输入，并将结果输出到多个开关;以及输出电压控制电路，其将从多个恒流源电路输入的恒定电流转换为恒定电压为任意值，并输出结果。响应于从串并转换电路输入的时钟信号，多个开关在其导通和截止状态之间切换。输出电压控制电路将从连接到多个开关的多个恒流源电路输入的恒定电流以规定的比例转换为规定比例的恒定电压，从而产生阶梯波。

8. 发明授权

US5196732A Step voltage generator 失效
标题翻译：步进电压发电机
公开(公告)号：US5196732A
公开(公告)日：1993-03-23
申请号：US628847
申请日：1990-12-11
申请人： Akira Takahashi , Masanori Hirano , Teruo Takeshita
发明人： Akira Takahashi , Masanori Hirano , Teruo Takeshita
IPC分类号： H04N5/228 , H03K4/02 , H04N5/335 , H04N5/341 , H04N5/353 , H04N9/07
CPC分类号： H03K4/02
摘要： A step voltage generator for outputting a step voltage from an output terminal. The step voltage generator includes a voltage dividing circuit having a plurality of dividing elements serially connected to each other and disposed between two power sources of different voltage levels for voltage dividing the potential difference between the two power sources. The step generator further includes a switching circuit having a plurality of switch devices serially connected to each other and similarly disposed between the two power sources. The end switch device of the serially connected bunch is connected to the output terminal. A trigger circuit turns on the switch devices sequentially starting with the one closest to the output terminal. A plurality of reverse flow preventive circuits prohibit current through a switch device most recently turned on from flowing through a voltage dividing element previously turned on and which remains on.
摘要翻译：一种用于从输出端子输出阶梯电压的阶梯电压发生器。所述阶梯电压发生器包括分压电路，所述分压电路具有串联连接的多个分压元件，并且配置在两个不同电压电平的电源之间，用于分压两个电源之间的电位差。步进发生器还包括具有彼此串联连接并类似地设置在两个电源之间的多个开关装置的开关电路。串联连接的串的末端开关装置连接到输出端子。触发电路从最靠近输出端子的触发电路依次开启开关装置。多个逆流防止电路禁止电流通过最近接通的开关装置流过预先导通的分压元件并保持接通。

9. 发明授权

US4975600A Bicmos TTL output driver circuit 失效
标题翻译： Bicmos TTL输出驱动电路
公开(公告)号：US4975600A
公开(公告)日：1990-12-04
申请号：US430060
申请日：1989-10-30
申请人： Hiep V. Tran , Pak K. Fung
发明人： Hiep V. Tran , Pak K. Fung
IPC分类号： H03K4/02 , H03K19/003 , H03K19/0175 , H03K19/0944
CPC分类号： H03K19/00346 , H03K19/017518 , H03K19/09448 , H03K4/02
摘要： An output driver circuit for reducing output terminal ringing in integrated circuits has a plurality of pull-down transistors each having first, second and third terminals. A plurality of voltage setting devices each are connected in series to the second terminal of one of the pull-down transistors. An input is connected to the common third terminals of the plurality of pull-down transistors, and an output pull-up circuit is connected between the output of the circuit and the first terminals of the plurality of pull-down transistors. Multiple output driver circuits, each having an input delayed with respect to the others, can be connected together with a common output.
摘要翻译：用于减少集成电路中的输出端子振铃的输出驱动器电路具有多个下拉晶体管，每个具有第一，第二和第三端子。多个电压设定装置各自串联连接到一个下拉晶体管的第二端子。输入连接到多个下拉晶体管的公共第三端子，并且输出上拉电路连接在电路的输出和多个下拉晶体管的第一端子之间。每个具有相对于其他输入延迟的输入的多个输出驱动器电路可以与公共输出连接在一起。

10. 再颁专利

USRE31051E Regulator for controlling capacitor charge to provide complex waveform 失效
标题翻译：用于控制电容器电荷以提供复杂波形的稳压器
公开(公告)号：USRE31051E
公开(公告)日：1982-10-05
申请号：US566868
申请日：1975-04-10
申请人： William F. Davis , Howard G. Shumway , Thomas M. Frederiksen
发明人： William F. Davis , Howard G. Shumway , Thomas M. Frederiksen
IPC分类号： F02D41/32 , G06G7/28 , H03K4/02
CPC分类号： H03K4/02 , F02D41/32 , G06G7/28
摘要： In fuel injection ignition systems, it is necessary to provide control of the open time of the fuel injector valves which varies with the engine speed. However, for efficient operation with a minimum of pollution, the relationship of valve open time to engine speed is not a simple relationship, and factors other than engine speed are involved. It has been found that the open time should change with engine speed by steps not directly related to engine speed. This can be accomplished by providing a waveform which varies with time across a capacitor by a regulator system which controls both increase and decrease of the voltage across the capacitor. This voltage waveform, which varies with time and is independent of engine speed, can then be combined with a ramp voltage initiated at a particular point of rotation of the engine at the time the injector valves are opened. The valves can then be turned off when the combined voltage has the desired relation to a voltage produced by manifold pressure to provide the required open time for the injector valves.

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