专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明申请

US20180205400A1 Random Delay Generation for Thin-Film Transistor Based Circuits 审中-公开
公开(公告)号：US20180205400A1
公开(公告)日：2018-07-19
申请号：US15922649
申请日：2018-03-15
申请人： Thin Film Electronics, ASA
发明人： Vivek SUBRAMANIAN , Mingming MAO , Zhigang WANG
IPC分类号： H04B1/04 , H03K3/355 , H03K3/03 , H03K3/033 , H03K5/13 , H04H20/16 , H03B5/12 , H01L21/66
CPC分类号： H04B1/04 , G06K7/0008 , G06K7/10059 , G06K19/0723 , H01L22/20 , H01L2924/0002 , H03B5/1203 , H03K3/0315 , H03K3/033 , H03K3/355 , H03K5/13 , H03K5/133 , H04H20/16 , H01L2924/00
摘要： Circuits and circuit elements configured to generate a random delay, a monostable oscillator, circuits configured to broadcasting repetitive messages wireless systems, and methods for forming such circuits, devices, and systems are disclosed. The present invention advantageously provides relatively low cost delay generating circuitry based on TFT technology in wireless electronics applications, particularly in RFID applications. Such novel, technically simplified, low cost TFT-based delay generating circuitry enables novel wireless circuits, devices and systems, and methods for producing such circuits, devices and systems.

2. 发明申请

US20140247079A1 Pulse Generator Circuit 审中-公开
标题翻译：脉冲发生器电路
公开(公告)号：US20140247079A1
公开(公告)日：2014-09-04
申请号：US14276488
申请日：2014-05-13
申请人： Palo Alto Research Center Incorporated
发明人： David Eric Schwartz
IPC分类号： H03K3/012
CPC分类号： H03K3/012 , H03K3/355 , H03K5/04
摘要： A pulse generator circuit is disclosed that is optimized for printed, solution-processed thin film transistor processing. In certain embodiments, the circuit comprises dual thin film transistors that operate as a diode and resistor, respectively. Optionally, a third thin film transistor may be provided to operate as a pass transistor in response to an enable signal. The elements of the circuit are configured such that a rising pulse on an input node triggers an output pulse on an output node in the manner of a monostable multivibrator.
摘要翻译：公开了针对印刷，溶液处理的薄膜晶体管处理优化的脉冲发生器电路。在某些实施例中，电路包括分别作为二极管和电阻器工作的双薄膜晶体管。可选地，可以提供第三薄膜晶体管以响应于使能信号而作为传输晶体管工作。电路的元件被配置为使得输入节点上的上升脉冲以单稳态多谐振荡器的方式触发输出节点上的输出脉冲。

3. 发明授权

US08810298B2 Random delay generation for thin-film transistor based circuits 有权
标题翻译：基于薄膜晶体管的电路的随机延迟生成
公开(公告)号：US08810298B2
公开(公告)日：2014-08-19
申请号：US12625435
申请日：2009-11-24
申请人： Vivek Subramanian , Mingming Mao , Zhigang Wang
发明人： Vivek Subramanian , Mingming Mao , Zhigang Wang
IPC分类号： H03K5/13 , H03K3/03 , G06K19/07
CPC分类号： H04B1/04 , G06K7/0008 , G06K7/10059 , G06K19/0723 , H01L22/20 , H01L2924/0002 , H03B5/1203 , H03K3/0315 , H03K3/033 , H03K3/355 , H03K5/13 , H03K5/133 , H04H20/16 , H01L2924/00
摘要： Circuits and circuit elements configured to generate a random delay, a monostable oscillator, circuits configured to broadcasting repetitive messages wireless systems, and methods for forming such circuits, devices, and systems are disclosed. The present invention advantageously provides relatively low cost delay generating circuitry based on TFT technology in wireless electronics applications, particularly in RFID applications. Such novel, technically simplified, low cost TFT-based delay generating circuitry enables novel wireless circuits, devices and systems, and methods for producing such circuits, devices and systems.
摘要翻译：被配置为产生随机延迟的电路和电路元件，单稳态振荡器，被配置为广播重复消息无线系统的电路，以及用于形成这种电路，装置和系统的方法。本发明有利地提供了在无线电子应用中特别是RFID应用中基于TFT技术的相对较低成本的延迟产生电路。这种新颖的，技术上简化的，低成本的基于TFT的延迟产生电路实现了新颖的无线电路，设备和系统以及用于生产这样的电路，设备和系统的方法。

4. 发明授权

US08547139B2 CMOS logic integrated circuit 失效
标题翻译： CMOS逻辑集成电路
公开(公告)号：US08547139B2
公开(公告)日：2013-10-01
申请号：US13421159
申请日：2012-03-15
申请人： Chikahiro Hori , Akira Takiba
发明人： Chikahiro Hori , Akira Takiba
IPC分类号： H03K19/0175 , H03K19/094 , H03K19/20 , H03B1/00 , H03L5/00
CPC分类号： H03K3/355 , H03K3/35613 , H03K19/018528
摘要： A CMOS logic integrated circuit includes a level shifter and a CMOS logic circuit. The level shifter converts a signal of a first logic level to a signal of a second logic level. The signal of the first logic level changes between a first low potential and a first high potential higher than the first low potential. The signal of the second logic level changes between the first low potential and a second high potential higher than the first high potential. The CMOS logic circuit includes a first N-channel type MOSFET and a second N-channel type MOSFET. The second N-channel type MOSFET is connected in series with the first N-channel type MOSFET. A first signal of the first logic level is input into a gate of the first N-channel type MOSFET. A second signal of the second logic level has an inversion relationship with the first signal.
摘要翻译： CMOS逻辑集成电路包括电平转换器和CMOS逻辑电路。电平移位器将第一逻辑电平的信号转换为第二逻辑电平的信号。第一逻辑电平的信号在第一低电位和高于第一低电位的第一高电位之间变化。第二逻辑电平的信号在第一低电位和高于第一高电位的第二高电位之间变化。 CMOS逻辑电路包括第一N沟道型MOSFET和第二N沟道型MOSFET。第二N沟道型MOSFET与第一N沟道型MOSFET串联连接。第一逻辑电平的第一信号被输入到第一N沟道型MOSFET的栅极中。第二逻辑电平的第二信号与第一信号具有反相关系。

5. 发明授权

US07902898B2 Delay circuit 有权
标题翻译：延时电路
公开(公告)号：US07902898B2
公开(公告)日：2011-03-08
申请号：US12399102
申请日：2009-03-06
申请人： Jyi-Hung Tseng
发明人： Jyi-Hung Tseng
IPC分类号： H03H11/26
CPC分类号： H03K3/355
摘要： A delay circuit includes current sources, switches, a transistor switch, a charging unit and a comparator. Each of the switches is provided for receiving an enable signal to activate and convey one of the current sources. The transistor switch is activated for pulling down voltage of an operating node coupled to the switches. The charging unit provides an operating voltage for the operating node based on one of the current sources when the transistor switch is deactivated and one of the switches is activated to convey one of the current sources to the charging unit. The comparator is provided for comparing the operating voltage with a reference voltage.
摘要翻译：延迟电路包括电流源，开关，晶体管开关，充电单元和比较器。每个开关被提供用于接收使能信号以激活和传送电流源中的一个。晶体管开关被激活用于降低耦合到开关的操作节点的电压。当晶体管开关被去激活时，充电单元基于电流源之一为工作节点提供工作电压，并且其中一个开关被激活以将一个电流源传送到充电单元。比较器用于将工作电压与参考电压进行比较。

6. 发明授权

US07342463B2 Timer circuits and method 有权
标题翻译：定时器电路及方法
公开(公告)号：US07342463B2
公开(公告)日：2008-03-11
申请号：US11280516
申请日：2005-11-15
申请人： A. Paul Brokaw , Yuxin Li
发明人： A. Paul Brokaw , Yuxin Li
IPC分类号： H03K3/26
CPC分类号： H03K3/011 , H03K3/354 , H03K3/355
摘要： A timing circuit operates by applying an arbitrary voltage across a resistance, and using the resulting current to generate a charging current which charges and/or discharges a capacitance to an endpoint voltage. Additional circuitry is arranged such that the capacitance is charged and/or discharged until its voltage crosses a threshold which is proportional to one of the resistance's endpoint voltages, such that the capacitance's endpoint voltage tracks the resistance's endpoint voltage. Thus, the resistor voltage can vary with supply voltage or temperature, or the resistance value itself can vary, without materially affecting the timing relationships. The arbitrary voltage is preferably provided with a pair of diode-connected transistors connected in series with the resistance, so that a single transistor operated at the same current density as one of the diode-connected transistors establishes the threshold voltage and detects when the capacitor voltage reaches the threshold.
摘要翻译：定时电路通过在电阻上施加任意电压来工作，并且使用所得到的电流来产生将电容充电和/或放电到端点电压的充电电流。附加电路被布置成使得电容被充电和/或放电，直到其电压跨过与电阻的端点电压之一成比例的阈值，使得电容的端点电压跟踪电阻的端点电压。因此，电阻电压可以随电源电压或温度而变化，或者电阻值本身可以变化，而不会严重影响时序关系。任意电压优选地设置有与电阻串联连接的一对二极管连接的晶体管，使得以与二极管连接的晶体管中的一个相同的电流密度工作的单个晶体管建立阈值电压并且检测何时电容器电压达到门槛。

7. 发明授权

US06353350B1 Pulse generator independent of supply voltage 有权
标题翻译：脉冲发生器独立于电源电压
公开(公告)号：US06353350B1
公开(公告)日：2002-03-05
申请号：US09721502
申请日：2000-11-22
申请人： Lorenzo Bedarida , Simone Bartoli , Luigi Bettini
发明人： Lorenzo Bedarida , Simone Bartoli , Luigi Bettini
IPC分类号： H03K300
CPC分类号： G11C7/04 , G11C7/06 , G11C7/22 , G11C2207/065 , H03K3/011 , H03K3/355 , H03K5/04
摘要： A pulse generator of a type that includes at least one current mirror connected between first and second voltage references and to at least one initiation terminal receiving a pulsive-type initiating signal, connected to a load terminal receiving a load signal, and connected to an output terminal providing an output signal. The pulse generator further includes at least one logic gate having one input terminal connected to an internal control circuit node of the current mirror, having another input terminal connected to receive the initiating signal, and having an output terminal connected to the output terminal of the pulse generator; at least one regulator circuit connected between the current mirror and the second voltage reference and feedback connected to the output terminal; and at least one conductive-type transistor connected between the current mirror and the regulator circuit; the output terminal of the pulse generator delivering a retarded pulsive-type output signal that is independent of the supply voltage and exhibits the same dependency on temperature as the regulator circuit.
摘要翻译：一种类型的脉冲发生器，包括连接在第一和第二电压基准之间的至少一个电流镜和连接到接收负载信号的负载终端并连接到输出的至少一个起始终端的起始终端终端提供输出信号。脉冲发生器还包括至少一个逻辑门，其中一个输入端连接到电流镜的内部控制电路节点，其另一输入端连接以接收起始信号，并且具有连接到脉冲的输出端的输出端发电机; 连接在电流镜与第二电压基准之间的至少一个调节器电路和连接到输出端的反馈; 以及连接在电流镜和调节器电路之间的至少一个导电型晶体管; 脉冲发生器的输出端子输出与电源电压无关的延迟脉动型输出信号，并且对温度表现出与调节器电路相同的依赖性。

8. 发明授权

US4507570A Resettable one shot circuit having noise rejection 失效
标题翻译：具有噪声抑制的可复位单触发电路
公开(公告)号：US4507570A
公开(公告)日：1985-03-26
申请号：US471106
申请日：1983-03-01
申请人： John K. Mahabadi , Victor D. Ehrlich
发明人： John K. Mahabadi , Victor D. Ehrlich
IPC分类号： H03K3/355 , H03K3/3565 , H03K3/033
CPC分类号： H03K3/3565 , H03K3/355
摘要： A one shot circuit having feedback from the output to an input gate is provided to inhibit the input gate when an output is being provided. This feedback inhibits the input gate thereby preventing noise on the input from falsely triggering the one shot. A capacitor in conjunction with a Schmitt trigger is used to determine output pulse width. The output pulse width can be increased by adding additional capacitance to the first capacitor which is fully integrated on an integrated circuit chip. A reset input is also provided so that the circuit can be reset upon command.
摘要翻译：提供了具有从输出到输入门的反馈的单触发电路，用于当提供输出时禁止输入门。该反馈抑制输入门，从而防止输入上的噪声误触发一次。电容器与施密特触发器一起用于确定输出脉冲宽度。可以通过向完全集成在集成电路芯片上的第一电容器添加额外的电容来增加输出脉冲宽度。还提供复位输入，使得可以根据命令复位电路。

9. 发明授权

US3621297A Monostable multivibrator 失效
标题翻译：单机多功能一体机
公开(公告)号：US3621297A
公开(公告)日：1971-11-16
申请号：US3621297D
申请日：1969-09-24
申请人： RCA CORP
发明人： DEAN JACK ALLEN
IPC分类号： H03K3/355 , H03K5/04 , H03K1/18
CPC分类号： H03K3/355 , H03K5/04
摘要： A monostable multivibrator circuit is disclosed which provides a relatively constant width pulse despite large variations from circuit to circuit in the switching transfer voltage characteristics of two switching devices used in any one circuit; in any one circuit, each of the two switching devices have the same switching transfer voltage characteristic. The two switching devices are connected in such a manner that the first device is turned on for a time determined by a first time-constant circuit, and the second device is turned on while the first device is on plus a time determined by a second time-constant circuit. In this manner, the effect on the width of the output pulse by the transfer voltages of one device is cancelled out by the effect on the width of the transfer voltage of the other device. Thus a relatively constant width pulse always results.

10. 发明授权

US11744604B2 Surgical instrument with a hardware-only control circuit 有权
公开(公告)号：US11744604B2
公开(公告)日：2023-09-05
申请号：US16220281
申请日：2018-12-14
申请人： Cilag GmbH International
发明人： Frederick E. Shelton, IV , David C. Yates , Jason L. Harris
IPC分类号： A61B34/00 , A61B17/295 , A61B17/128 , A61B17/29 , A61B17/072 , H03K17/96 , H03K3/033 , H03K17/945 , A61B18/14 , A61B5/06 , A61B17/32 , H03K3/355 , A61B90/98 , G01S17/04 , A61B34/30 , A61B17/04 , A61B18/12 , A61B18/00 , A61B17/00 , A61B90/00 , A61B34/20 , H03K17/97 , A61B17/12 , A61B17/3205
CPC分类号： A61B17/295 , A61B5/065 , A61B17/0469 , A61B17/072 , A61B17/07207 , A61B17/1285 , A61B17/29 , A61B17/320068 , A61B18/1445 , A61B34/30 , A61B34/76 , A61B90/98 , G01S17/04 , H03K3/033 , H03K3/355 , H03K17/945 , H03K17/9622 , A61B17/0467 , A61B17/12013 , A61B17/32056 , A61B2017/0003 , A61B2017/00017 , A61B2017/00022 , A61B2017/00039 , A61B2017/0046 , A61B2017/00075 , A61B2017/00084 , A61B2017/00115 , A61B2017/00123 , A61B2017/00154 , A61B2017/00176 , A61B2017/00199 , A61B2017/00221 , A61B2017/00358 , A61B2017/00398 , A61B2017/00464 , A61B2017/00473 , A61B2017/00477 , A61B2017/00482 , A61B2017/00734 , A61B2017/00876 , A61B2017/07285 , A61B2017/2901 , A61B2017/2903 , A61B2017/2927 , A61B2017/2931 , A61B2018/0091 , A61B2018/00178 , A61B2018/00303 , A61B2018/00678 , A61B2018/00702 , A61B2018/00797 , A61B2018/00875 , A61B2018/00988 , A61B2018/00994 , A61B2018/1253 , A61B2034/2051 , A61B2034/301 , A61B2034/305 , A61B2090/065 , A61B2090/0803 , A61B2090/0807 , A61B2090/0808 , A61B2090/0809 , A61B2562/0257 , A61B2562/08 , H03K2017/9706
摘要： A surgical instrument is disclosed. The surgical instrument includes an electric motor and a control circuit. The control circuit includes a plurality of logic gates and a monostable multivibrator. The monostable multivibrator is connected to a first one of the logic gates. The control circuit is configured to alter a rate of action of a function of the surgical instrument by controlling a speed of rotation of the electric motor based on a sensed parameter.

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式