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1. 发明授权

US08319555B1 Amplifier 有权
标题翻译：放大器
公开(公告)号：US08319555B1
公开(公告)日：2012-11-27
申请号：US13308772
申请日：2011-12-01
申请人： Jari Heikkinen , Jonne Riekki , Jouni Kaukovuori
发明人： Jari Heikkinen , Jonne Riekki , Jouni Kaukovuori
IPC分类号： H03G3/30
CPC分类号： H03F3/45188 , H03F1/565 , H03F3/193 , H03F3/195 , H03F2200/111 , H03F2200/294 , H03F2200/378 , H03F2203/45386 , H03F2203/45506 , H03F2203/45524 , H03F2203/45528 , H03F2203/45534 , H03F2203/45608 , H03F2203/45704
摘要： The invention relates to a configurable low noise amplifier circuit which is configurable between a first topology in which the low noise amplifier circuit includes a degeneration inductance whereby the low noise amplifier circuit operates as an inductively degenerated low noise amplifier, and a second topology in which the low noise amplifier circuit includes a feedback resistance whereby the low noise amplifier circuit operates as a resistive feedback low noise amplifier.
摘要翻译：本发明涉及一种可配置的低噪声放大器电路，其可在第一拓扑之间配置，其中低噪声放大器电路包括退化电感，由此低噪声放大器电路作为电感退化的低噪声放大器工作;以及第二拓扑，其中低噪声放大器电路包括反馈电阻，由此低噪声放大器电路作为电阻反馈低噪声放大器工作。

2. 发明申请

US20010052819A1 Buffer circuit comprising load, follower transistor and current source connected in series 失效
标题翻译：缓冲电路包括串联连接的负载，跟随晶体管和电流源
公开(公告)号：US20010052819A1
公开(公告)日：2001-12-20
申请号：US09871641
申请日：2001-06-04
申请人： FUJITSU QUANTUM DEVICES LIMITED
发明人： Miki Kubota
IPC分类号： H03F003/16
CPC分类号： H03F3/45183 , H03F3/505 , H03F2203/45571 , H03F2203/45608 , H03F2203/45612 , H03F2203/45702
摘要： An input buffer circuit 11X is a source follower circuit and comprises a load 114 and enhancement FETs 111 and 112A connected in series between power supply lines VDD and VSS. A DC bias VB1 is applied to the gate of the FET 112A to act it as a current source, and an AC current component of the drain potential VD of the FET 111 is provided through a capacitor 113 to the gate of the FET 112A. If an inductor as an matching circuit is connected in series to the capacitor 113, a band pass filter is constructed, and the gain of the circuit 11X becomes especially high at the resonance frequency thereof. At high frequencies, the interconnection coupled to the capacitor 113 has a parasitic inductance, and the output waveform of the circuit 11X has a high frequency noise. In this case, a damping transistor is connected between the capacitor 113 and the gate of the FET 112A to obtain a flat gain by adjusting the gate potential thereof.
摘要翻译：输入缓冲器电路11X是源极跟随器电路，并且包括串联连接在电源线VDD和VSS之间的负载114和增强FET 111和112A。将DC偏压VB1施加到FET 112A的栅极以用作电流源，并且通过电容器113将FET 111的漏极电位VD的AC电流分量提供给FET 112A的栅极。如果作为匹配电路的电感器串联连接到电容器113，则构造带通滤波器，并且电路11X的增益在其谐振频率处变得特别高。在高频下，耦合到电容器113的互连件具有寄生电感，并且电路11X的输出波形具有高频噪声。在这种情况下，阻尼晶体管连接在电容器113和FET 112A的栅极之间，通过调节其栅极电位而获得平坦的增益。

3. 发明授权

US08847683B2 Differential amplifying circuit 有权
标题翻译：差分放大电路
公开(公告)号：US08847683B2
公开(公告)日：2014-09-30
申请号：US13446698
申请日：2012-04-13
申请人： Noriaki Shirai
发明人： Noriaki Shirai
IPC分类号： H03F3/45
CPC分类号： H03F3/45 , H03F3/45179 , H03F3/45183 , H03F3/72 , H03F2203/45394 , H03F2203/45554 , H03F2203/45608 , H03F2203/45631 , H03F2203/45638 , H03F2203/45701 , H03F2203/45702 , H03F2203/45706 , H03F2203/45726
摘要： A differential amplifying circuit includes: two metal oxide semiconductor transistors to form a differential pair and receive a differential signal; a plurality of capacitance elements coupled in series between drains of the two metal oxide semiconductor transistors; and an inductance circuit coupled between at least one connection node of the plurality of capacitance elements and a bias power terminal.
摘要翻译：差分放大电路包括：两个金属氧化物半导体晶体管，用于形成差分对并接收差分信号; 串联耦合在两个金属氧化物半导体晶体管的漏极之间的多个电容元件; 以及耦合在所述多个电容元件中的至少一个连接节点与偏置电源端子之间的电感电路。

4. 发明授权

US07256646B2 Neutralization techniques for differential low noise amplifiers 有权
标题翻译：差分低噪声放大器的中和技术
公开(公告)号：US07256646B2
公开(公告)日：2007-08-14
申请号：US11157246
申请日：2005-06-21
申请人： Salem Eid , Gregory A. Blum
发明人： Salem Eid , Gregory A. Blum
IPC分类号： G06G7/12 , H03F3/45
CPC分类号： H03F1/26 , H03F1/14 , H03F3/191 , H03F3/45183 , H03F2200/294 , H03F2200/372 , H03F2203/45332 , H03F2203/45366 , H03F2203/45464 , H03F2203/45544 , H03F2203/45608 , H03F2203/45622 , H03F2203/45638
摘要： An differential LNA has first and second input MOS transistors, with differential inputs applied to their respective control gates and differential outputs taken at their respective drains. The gate-to-drain, Cgd, feedback capacitances of the first and second input MOS transistors are neutralized by respective gate-to-source, Cgs, capacitances in the two neutralizing MOS transistors. A first neutralizing MOS transistor has its control gate coupled to the control gate of the first input MOS transistor, its source node coupled to the drain node of the second input MOS transistor, and its drain node coupled to a fixed potential. A second neutralizing MOS transistor has its control gate coupled to the control gate of the second input MOS transistor, its source node coupled to the drain node of the first input MOS transistor, and its drain node coupled to the same fixed potential. In this manner, similar and opposite potential differences between the gate-and-drain and the drain-and-source regions of the first input MOS transistor are reproduced in gate-and-drain and drain-and-source regions of the first neutralizing MOS transistor. A similar affect is produced in the second input and second neutralizing MOS transistor.
摘要翻译：差分LNA具有第一和第二输入MOS晶体管，其差分输入施加到其各自的控制栅极，并在其各自的漏极处获取差分输出。第二和第二输入MOS晶体管的栅极至漏极Cgd反馈电容由两个中和MOS晶体管中的相应的栅极至源极，Cgs，电容中和。第一中和MOS晶体管的控制栅极耦合到第一输入MOS晶体管的控制栅极，其源极节点耦合到第二输入MOS晶体管的漏极节点，其漏极节点耦合到固定电位。第二中和MOS晶体管的控制栅极耦合到第二输入MOS晶体管的控制栅极，其源极节点耦合到第一输入MOS晶体管的漏极节点，并且其漏极节点耦合到相同的固定电位。以这种方式，在第一中和MOS的栅极和漏极和漏极 - 源极区域中再现第一输入MOS晶体管的栅极 - 漏极和漏极 - 源极区域之间的相似和相反的电位差晶体管。在第二输入和第二中和MOS晶体管中产生类似的影响。

5. 发明申请

US20070024377A1 Impedance matching techiques for multi-band or wideband RF amplifiers and associated amplifier designs 审中-公开
标题翻译：用于多频带或宽带RF放大器和相关放大器设计的阻抗匹配技术
公开(公告)号：US20070024377A1
公开(公告)日：2007-02-01
申请号：US11191591
申请日：2005-07-28
申请人： Xuezhen Wang , Noshir Dubash , Douglas Schucker
发明人： Xuezhen Wang , Noshir Dubash , Douglas Schucker
IPC分类号： H03F3/191
CPC分类号： H03F3/191 , H03F1/42 , H03F3/45188 , H03F2200/111 , H03F2200/27 , H03F2200/294 , H03F2200/36 , H03F2200/372 , H03F2200/39 , H03F2203/45608 , H03F2203/45618 , H03F2203/45622
摘要： Multi-band or wideband impedance matching in RF amplifiers is disclosed, using variable negative feedback. The feedback is provided by variable impedance connected between the input and output terminals of an inverting amplifier, which may be single-ended, or differential. The variable impedance is used in conjunction with a fixed input impedance matching network to tune the variable impedance to different frequencies. The variable impedance feedback can also be used for gain control, and has the added benefit of stabilizing the amplifier. Both multi-band and wideband amplification can be optimized through the use of the disclosed circuitry and techniques. Use of an output impedance matching network in conjunction with the RF amplifier is optional.
摘要翻译：公开了RF放大器中的多频带或宽带阻抗匹配，使用可变负反馈。反馈由连接在反相放大器的输入和输出端之间的可变阻抗提供，反相放大器可以是单端或差分。可变阻抗与固定输入阻抗匹配网络一起使用，以将可变阻抗调谐到不同的频率。可变阻抗反馈也可用于增益控制，并具有稳定放大器的附加益处。可以通过使用所公开的电路和技术来优化多频带和宽带放大。与RF放大器结合使用输出阻抗匹配网络是可选的。

6. 发明授权

US07808319B2 Differential amplifier circuit and frequency mixer for improving linearity 有权
标题翻译：差分放大电路和混频器，提高线性度
公开(公告)号：US07808319B2
公开(公告)日：2010-10-05
申请号：US12325400
申请日：2008-12-01
申请人： Byung Sung Kim , Tae Sung Kim
发明人： Byung Sung Kim , Tae Sung Kim
IPC分类号： H03F3/45
CPC分类号： H03F3/45188 , H03D7/1441 , H03D7/1458 , H03D7/1491 , H03D2200/0043 , H03F1/3211 , H03F3/45183 , H03F2203/45318 , H03F2203/45386 , H03F2203/45544 , H03F2203/45608
摘要： A differential amplifier circuit and a frequency mixer for improving linearity are disclosed. The disclosed differential amplifier circuit includes first and second loads, a first output terminal for the first load, a second output terminal for the second load, a differential amplifying stage including a differential stage for amplifying a voltage difference between a first input stage and a second input stage, and a biasing current source for biasing the differential stage, and a non-linearity filtering circuit for filtering a non-linear signal generated from the differential amplifying stage. The non-linearity filtering circuit includes a first cross circuit including a first transistor to connect the first and second output terminals, and a second cross circuit including a second transistor to connect the first and second output terminals. The differential amplifier circuit achieves an improvement in linearity, as compared to conventional differential amplifier circuits, by offsetting, at a load side, a non-linear component generated at an active element of the differential amplifier circuit, to output only a linear current component.
摘要翻译：公开了一种用于提高线性度的差分放大器电路和混频器。所公开的差分放大器电路包括第一和第二负载，用于第一负载的第一输出端，用于第二负载的第二输出端，差分放大级，包括用于放大第一输入级与第二负载之间的电压差的差分级输入级和用于偏置差分级的偏置电流源，以及用于对从差分放大级产生的非线性信号进行滤波的非线性滤波电路。非线性滤波电路包括：第一交叉电路，包括用于连接第一和第二输出端子的第一晶体管和包括第二晶体管的第二交叉电路，以连接第一和第二输出端子。与传统的差分放大器电路相比，差分放大器电路通过在负载侧偏移在差分放大器电路的有源元件处产生的非线性分量来仅实现线性电流分量而实现了线性的改善。

7. 发明申请

US20080074228A1 Low Mutual Inductance Matched Inductors 有权
标题翻译：低互感电感匹配电感器
公开(公告)号：US20080074228A1
公开(公告)日：2008-03-27
申请号：US11534340
申请日：2006-09-22
申请人： Sean Christopher Erickson , Jason Dee Hudson , Michael J. Saunders
发明人： Sean Christopher Erickson , Jason Dee Hudson , Michael J. Saunders
IPC分类号： H01F5/00
CPC分类号： H01F27/346 , H01F2017/0073 , H03F3/08 , H03F3/193 , H03F3/45188 , H03F2200/294 , H03F2200/451 , H03F2203/45386 , H03F2203/45608 , H03F2203/45638
摘要： Multiple inductor structures and methods for providing low mutual inductance between the inductors are described. In various embodiments of the invention, the polarities of the inductors are positioned such that parasitic mutual inductance is reduced by causing electro-magnetic fields to at least partially cancel resulting in a reduction in interference between the inductors. The polarities of the magnetic fields produced by each inductor are opposite to each other so that at least a partial cancellation results when the fields interfere with each other.
摘要翻译：描述了用于在电感器之间提供低互感的多个电感器结构和方法。在本发明的各种实施例中，电感器的极性被定位成使得通过使电磁场至少部分地消除而导致寄生互感减小，导致电感器之间的干扰减小。每个电感器产生的磁场的极性彼此相反，使得当场相互干扰时，至少产生部分消除。

8. 发明申请

US20060284670A1 Neutralization Techniques for differential low noise amplifiers 有权
标题翻译：差分低噪声放大器的中和技术
公开(公告)号：US20060284670A1
公开(公告)日：2006-12-21
申请号：US11157246
申请日：2005-06-21
申请人： Salem Eid , Gregory Blum
发明人： Salem Eid , Gregory Blum
IPC分类号： H03K5/22
CPC分类号： H03F1/26 , H03F1/14 , H03F3/191 , H03F3/45183 , H03F2200/294 , H03F2200/372 , H03F2203/45332 , H03F2203/45366 , H03F2203/45464 , H03F2203/45544 , H03F2203/45608 , H03F2203/45622 , H03F2203/45638
摘要： An differential LNA has first and second input MOS transistors, with differential inputs applied to their respective control gates and differential outputs taken at their respective drains. The gate-to-drain, Cgd, feedback capacitances of the first and second input MOS transistors are neutralized by respective gate-to-source, Cgs, capacitances in the two neutralizing MOS transistors. A first neutralizing MOS transistor has its control gate coupled to the control gate of the first input MOS transistor, its source node coupled to the drain node of the second input MOS transistor, and its drain node coupled to a fixed potential. A second neutralizing MOS transistor has its control gate coupled to the control gate of the second input MOS transistor, its source node coupled to the drain node of the first input MOS transistor, and its drain node coupled to the same fixed potential. In this manner, similar and opposite potential differences between the gate-and-drain and the drain-and-source regions of the first input MOS transistor are reproduced in gate-and-drain and drain-and-source regions of the first neutralizing MOS transistor. A similar affect is produced in the second input and second neutralizing MOS transistor.
摘要翻译：差分LNA具有第一和第二输入MOS晶体管，其差分输入施加到其各自的控制栅极，并在其各自的漏极处获取差分输出。第二和第二输入MOS晶体管的栅极至漏极Cgd反馈电容由两个中和MOS晶体管中的相应的栅极至源极，Cgs，电容中和。第一中和MOS晶体管的控制栅极耦合到第一输入MOS晶体管的控制栅极，其源极节点耦合到第二输入MOS晶体管的漏极节点，其漏极节点耦合到固定电位。第二中和MOS晶体管的控制栅极耦合到第二输入MOS晶体管的控制栅极，其源极节点耦合到第一输入MOS晶体管的漏极节点，并且其漏极节点耦合到相同的固定电位。以这种方式，在第一中和MOS的栅极和漏极和漏极 - 源极区域中再现第一输入MOS晶体管的栅极 - 漏极和漏极 - 源极区域之间的相似和相反的电位差晶体管。在第二输入和第二中和MOS晶体管中产生类似的影响。

9. 发明申请

US20090219094A1 DIFFERENTIAL AMPLIFIER CIRCUIT AND FREQUENCY MIXER FOR IMPROVING LINEARITY 有权
标题翻译：用于改善线性度的差分放大器电路和频率混频器
公开(公告)号：US20090219094A1
公开(公告)日：2009-09-03
申请号：US12325400
申请日：2008-12-01
申请人： Byung Sung KIM , Tae Sung Kim
发明人： Byung Sung KIM , Tae Sung Kim
IPC分类号： H03F3/45
CPC分类号： H03F3/45188 , H03D7/1441 , H03D7/1458 , H03D7/1491 , H03D2200/0043 , H03F1/3211 , H03F3/45183 , H03F2203/45318 , H03F2203/45386 , H03F2203/45544 , H03F2203/45608
摘要： A differential amplifier circuit and a frequency mixer for improving linearity are disclosed. The disclosed differential amplifier circuit includes first and second loads, a first output terminal for the first load, a second output terminal for the second load, a differential amplifying stage including a differential stage for amplifying a voltage difference between a first input stage and a second input stage, and a biasing current source for biasing the differential stage, and a non-linearity filtering circuit for filtering a non-linear signal generated from the differential amplifying stage. The non-linearity filtering circuit includes a first cross circuit including a first transistor to connect the first and second output terminals, and a second cross circuit including a second transistor to connect the first and second output terminals. The differential amplifier circuit achieves an improvement in linearity, as compared to conventional differential amplifier circuits, by offsetting, at a load side, a non-linear component generated at an active element of the differential amplifier circuit, to output only a linear current component.
摘要翻译：公开了一种用于提高线性度的差分放大器电路和混频器。所公开的差分放大器电路包括第一和第二负载，用于第一负载的第一输出端，用于第二负载的第二输出端，差分放大级，包括用于放大第一输入级与第二负载之间的电压差的差分级输入级和用于偏置差分级的偏置电流源，以及用于对从差动放大级产生的非线性信号进行滤波的非线性滤波电路。非线性滤波电路包括：第一交叉电路，包括用于连接第一和第二输出端子的第一晶体管和包括第二晶体管的第二交叉电路，以连接第一和第二输出端子。与传统的差分放大器电路相比，差分放大器电路通过在负载侧偏移在差分放大器电路的有源元件处产生的非线性分量来仅实现线性电流分量而实现了线性的改善。

10. 发明授权

US07535330B2 Low mutual inductance matched inductors 有权
标题翻译：低互感匹配电感器
公开(公告)号：US07535330B2
公开(公告)日：2009-05-19
申请号：US11534340
申请日：2006-09-22
申请人： Sean Christopher Erickson , Jason Dee Hudson , Michael J. Saunders
发明人： Sean Christopher Erickson , Jason Dee Hudson , Michael J. Saunders
IPC分类号： H01F5/00
CPC分类号： H01F27/346 , H01F2017/0073 , H03F3/08 , H03F3/193 , H03F3/45188 , H03F2200/294 , H03F2200/451 , H03F2203/45386 , H03F2203/45608 , H03F2203/45638
摘要： Multiple inductor structures and methods for providing low mutual inductance between the inductors are described. In various embodiments of the invention, the polarities of the inductors are positioned such that parasitic mutual inductance is reduced by causing electro-magnetic fields to at least partially cancel resulting in a reduction in interference between the inductors. The polarities of the magnetic fields produced by each inductor are opposite to each other so that at least a partial cancellation results when the fields interfere with each other.
摘要翻译：描述了用于在电感器之间提供低互感的多个电感器结构和方法。在本发明的各种实施例中，电感器的极性被定位成使得通过使电磁场至少部分地消除而导致寄生互感减小，导致电感器之间的干扰减小。由每个电感器产生的磁场的极性彼此相反，使得当场相互干扰时，至少产生部分消除。

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