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1. 发明授权

US07256646B2 Neutralization techniques for differential low noise amplifiers 有权
标题翻译：差分低噪声放大器的中和技术
公开(公告)号：US07256646B2
公开(公告)日：2007-08-14
申请号：US11157246
申请日：2005-06-21
申请人： Salem Eid , Gregory A. Blum
发明人： Salem Eid , Gregory A. Blum
IPC分类号： G06G7/12 , H03F3/45
CPC分类号： H03F1/26 , H03F1/14 , H03F3/191 , H03F3/45183 , H03F2200/294 , H03F2200/372 , H03F2203/45332 , H03F2203/45366 , H03F2203/45464 , H03F2203/45544 , H03F2203/45608 , H03F2203/45622 , H03F2203/45638
摘要： An differential LNA has first and second input MOS transistors, with differential inputs applied to their respective control gates and differential outputs taken at their respective drains. The gate-to-drain, Cgd, feedback capacitances of the first and second input MOS transistors are neutralized by respective gate-to-source, Cgs, capacitances in the two neutralizing MOS transistors. A first neutralizing MOS transistor has its control gate coupled to the control gate of the first input MOS transistor, its source node coupled to the drain node of the second input MOS transistor, and its drain node coupled to a fixed potential. A second neutralizing MOS transistor has its control gate coupled to the control gate of the second input MOS transistor, its source node coupled to the drain node of the first input MOS transistor, and its drain node coupled to the same fixed potential. In this manner, similar and opposite potential differences between the gate-and-drain and the drain-and-source regions of the first input MOS transistor are reproduced in gate-and-drain and drain-and-source regions of the first neutralizing MOS transistor. A similar affect is produced in the second input and second neutralizing MOS transistor.
摘要翻译：差分LNA具有第一和第二输入MOS晶体管，其差分输入施加到其各自的控制栅极，并在其各自的漏极处获取差分输出。第二和第二输入MOS晶体管的栅极至漏极Cgd反馈电容由两个中和MOS晶体管中的相应的栅极至源极，Cgs，电容中和。第一中和MOS晶体管的控制栅极耦合到第一输入MOS晶体管的控制栅极，其源极节点耦合到第二输入MOS晶体管的漏极节点，其漏极节点耦合到固定电位。第二中和MOS晶体管的控制栅极耦合到第二输入MOS晶体管的控制栅极，其源极节点耦合到第一输入MOS晶体管的漏极节点，并且其漏极节点耦合到相同的固定电位。以这种方式，在第一中和MOS的栅极和漏极和漏极 - 源极区域中再现第一输入MOS晶体管的栅极 - 漏极和漏极 - 源极区域之间的相似和相反的电位差晶体管。在第二输入和第二中和MOS晶体管中产生类似的影响。

2. 发明授权

US08704597B2 Amplifiers and related receiver systems 有权
标题翻译：放大器和相关的接收机系统
公开(公告)号：US08704597B2
公开(公告)日：2014-04-22
申请号：US13873454
申请日：2013-04-30
申请人： Chuanzhao Yu , Salem Eid
发明人： Chuanzhao Yu , Salem Eid
IPC分类号： H03F3/45
CPC分类号： H03F3/193 , H03F3/45071 , H03F3/45188 , H03F2203/45631 , H03F2203/45638 , H04B1/18
摘要： Apparatus are provided for amplifier circuits and related receiver systems. An amplifier circuit includes a first common-source amplification stage and a second common-source amplification stage. The input of the second common-source amplification stage is coupled to the output of the first common-source amplification stage such that the first common-source amplification stage generates a first amplified signal, and the second common-source amplification stage generates a second amplified signal based on the first amplified signal. The first common-source amplification stage is coupled to a first node and the second common-source amplification stage is coupled to a second node, wherein the common-source amplification stages are configured such that a current between the first node and the second node flows in series through the common-source amplification stages.
摘要翻译：设备用于放大器电路和相关的接收机系统。放大器电路包括第一共源放大级和第二共源极放大级。第二公共源放大级的输入耦合到第一公共源放大级的输出，使得第一公共源极放大级产生第一放大信号，第二公共源极放大级产生第二放大倍数基于第一放大信号的信号。第一公共源放大级耦合到第一节点，并且第二公共源放大级耦合到第二节点，其中公共源放大级被配置为使得第一节点和第二节点之间的电流流动通过共源放大级串联。

3. 发明申请

US20120178400A1 AMPLIFIERS AND RELATED RECEIVER SYSTEMS 有权
标题翻译：放大器及相关接收器系统
公开(公告)号：US20120178400A1
公开(公告)日：2012-07-12
申请号：US13004640
申请日：2011-01-11
申请人： Chuanzhao Yu , Salem Eid
发明人： Chuanzhao Yu , Salem Eid
IPC分类号： H04B1/16 , H03F3/16
CPC分类号： H03F3/193 , H03F3/45071 , H03F3/45188 , H03F2203/45631 , H03F2203/45638 , H04B1/18
摘要： Apparatus are provided for amplifier circuits and related receiver systems. An amplifier circuit includes a first common-source amplification stage and a second common-source amplification stage. The input of the second common-source amplification stage is coupled to the output of the first common-source amplification stage such that the first common-source amplification stage generates a first amplified signal, and the second common-source amplification stage generates a second amplified signal based on the first amplified signal. The first common-source amplification stage is coupled to a first node and the second common-source amplification stage is coupled to a second node, wherein the common-source amplification stages are configured such that a current between the first node and the second node flows in series through the common-source amplification stages.
摘要翻译：设备用于放大器电路和相关的接收机系统。放大器电路包括第一共源放大级和第二共源极放大级。第二公共源放大级的输入耦合到第一公共源放大级的输出，使得第一公共源放大级产生第一放大信号，第二公共源放大级产生第二扩展级基于第一放大信号的信号。第一公共源放大级耦合到第一节点，并且第二公共源放大级耦合到第二节点，其中公共源放大级被配置为使得第一节点和第二节点之间的电流流动通过共源放大级串联。

4. 发明授权

US08463226B2 Amplifiers and related receiver systems 有权
标题翻译：放大器和相关的接收机系统
公开(公告)号：US08463226B2
公开(公告)日：2013-06-11
申请号：US13004640
申请日：2011-01-11
申请人： Chuanzhao Yu , Salem Eid
发明人： Chuanzhao Yu , Salem Eid
IPC分类号： H04B1/16
CPC分类号： H03F3/193 , H03F3/45071 , H03F3/45188 , H03F2203/45631 , H03F2203/45638 , H04B1/18
摘要： Apparatus are provided for amplifier circuits and related receiver systems. An amplifier circuit includes a first common-source amplification stage and a second common-source amplification stage. The input of the second common-source amplification stage is coupled to the output of the first common-source amplification stage such that the first common-source amplification stage generates a first amplified signal, and the second common-source amplification stage generates a second amplified signal based on the first amplified signal. The first common-source amplification stage is coupled to a first node and the second common-source amplification stage is coupled to a second node, wherein the common-source amplification stages are configured such that a current between the first node and the second node flows in series through the common-source amplification stages.
摘要翻译：设备用于放大器电路和相关的接收机系统。放大器电路包括第一共源放大级和第二共源极放大级。第二公共源放大级的输入耦合到第一公共源放大级的输出，使得第一公共源放大级产生第一放大信号，第二公共源放大级产生第二扩展级基于第一放大信号的信号。第一公共源放大级耦合到第一节点，并且第二公共源放大级耦合到第二节点，其中公共源放大级被配置为使得第一节点和第二节点之间的电流流动通过共源放大级串联。

5. 发明申请

US20060284670A1 Neutralization Techniques for differential low noise amplifiers 有权
标题翻译：差分低噪声放大器的中和技术
公开(公告)号：US20060284670A1
公开(公告)日：2006-12-21
申请号：US11157246
申请日：2005-06-21
申请人： Salem Eid , Gregory Blum
发明人： Salem Eid , Gregory Blum
IPC分类号： H03K5/22
CPC分类号： H03F1/26 , H03F1/14 , H03F3/191 , H03F3/45183 , H03F2200/294 , H03F2200/372 , H03F2203/45332 , H03F2203/45366 , H03F2203/45464 , H03F2203/45544 , H03F2203/45608 , H03F2203/45622 , H03F2203/45638
摘要： An differential LNA has first and second input MOS transistors, with differential inputs applied to their respective control gates and differential outputs taken at their respective drains. The gate-to-drain, Cgd, feedback capacitances of the first and second input MOS transistors are neutralized by respective gate-to-source, Cgs, capacitances in the two neutralizing MOS transistors. A first neutralizing MOS transistor has its control gate coupled to the control gate of the first input MOS transistor, its source node coupled to the drain node of the second input MOS transistor, and its drain node coupled to a fixed potential. A second neutralizing MOS transistor has its control gate coupled to the control gate of the second input MOS transistor, its source node coupled to the drain node of the first input MOS transistor, and its drain node coupled to the same fixed potential. In this manner, similar and opposite potential differences between the gate-and-drain and the drain-and-source regions of the first input MOS transistor are reproduced in gate-and-drain and drain-and-source regions of the first neutralizing MOS transistor. A similar affect is produced in the second input and second neutralizing MOS transistor.
摘要翻译：差分LNA具有第一和第二输入MOS晶体管，其差分输入施加到其各自的控制栅极，并在其各自的漏极处获取差分输出。第二和第二输入MOS晶体管的栅极至漏极Cgd反馈电容由两个中和MOS晶体管中的相应的栅极至源极，Cgs，电容中和。第一中和MOS晶体管的控制栅极耦合到第一输入MOS晶体管的控制栅极，其源极节点耦合到第二输入MOS晶体管的漏极节点，其漏极节点耦合到固定电位。第二中和MOS晶体管的控制栅极耦合到第二输入MOS晶体管的控制栅极，其源极节点耦合到第一输入MOS晶体管的漏极节点，并且其漏极节点耦合到相同的固定电位。以这种方式，在第一中和MOS的栅极和漏极和漏极 - 源极区域中再现第一输入MOS晶体管的栅极 - 漏极和漏极 - 源极区域之间的相似和相反的电位差晶体管。在第二输入和第二中和MOS晶体管中产生类似的影响。

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