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1. 发明申请

US20180210239A1 DRIVING CIRCUIT FOR OPTICAL MODULATOR 审中-公开
公开(公告)号：US20180210239A1
公开(公告)日：2018-07-26
申请号：US15876870
申请日：2018-01-22
申请人： SUMITOMO ELECTRIC INDUSTRIES, LTD.
发明人： Taizo TATSUMI
IPC分类号： G02F1/01 , H04B10/516 , G02F1/03 , H04B10/2507 , H03F3/60 , H03F3/68
CPC分类号： G02F1/0123 , G02F1/00 , G02F1/0327 , H03F3/195 , H03F3/45 , H03F3/45089 , H03F3/45475 , H03F3/605 , H03F3/68 , H03F2200/451 , H03F2203/45612 , H04B1/00 , H04B10/2507 , H04B10/516 , H04B10/54
摘要： In an exemplary embodiment, a plurality of differential amplification circuits has: first differential amplification circuits each including a differential pair circuit to generate the differential signal according to the differential input signal, a delay line, and a current source to supply a current to the differential pair circuit via the delay line; and second differential amplification circuits each including a differential pair circuit to generate the differential signal according to the differential input signal, and a current source to directly supply a current to the differential pair circuit. The first differential amplification circuits and the second differential amplification circuits are mutually connected in parallel between the pair of input-side transmission lines and the pair of output-side transmission lines.

2. 发明申请

US20160197585A1 AMPLIFIER 有权
标题翻译：放大器
公开(公告)号：US20160197585A1
公开(公告)日：2016-07-07
申请号：US14969063
申请日：2015-12-15
申请人： FUJITSU LIMITED
发明人： Hideki Oku
IPC分类号： H03F1/26 , H03F3/08
CPC分类号： H03F3/08 , H03F3/45103 , H03F3/50 , H03F2203/45601 , H03F2203/45612 , H03F2203/45668
摘要： An amplifier 12 including a first transistor 23 which is a common base transistor and whose emitter current fluctuates in accordance with fluctuations in an input current that is input to the emitter, a second transistor 24 which is a common base transistor, whose emitter is connected to the collector of the first transistor 23, and whose collector voltage fluctuates in accordance with fluctuations in the emitter current of the first transistor 23, a third transistor 31 which is a common collector transistor and whose base is connected to the collector of the second transistor 24, and an amplification unit 40 to which an emitter voltage of the third transistor 3 is input and which outputs an amplified voltage obtained by amplifying the emitter voltage of the third transistor, wherein the base resistance of the second transistor 24 is higher than the base resistance of the first transistor 23.
摘要翻译：放大器12，其包括作为公共基极晶体管的第一晶体管23，其发射极电流根据输入到发射极的输入电流的波动而波动;第二晶体管24，其是发射极连接到第一晶体管23的集电极，其集电极电压根据第一晶体管23的发射极电流的波动而波动;第三晶体管31，其是公共集电极晶体管，其基极连接到第二晶体管24的集电极以及放大单元40，输入第三晶体管3的发射极电压并输出通过放大第三晶体管的发射极电压而获得的放大电压，其中第二晶体管24的基极电阻高于基极电阻的第一晶体管23。

3. 发明授权

US09197158B2 Dynamic frequency divider circuit 有权
标题翻译：动态分频电路
公开(公告)号：US09197158B2
公开(公告)日：2015-11-24
申请号：US14394116
申请日：2012-04-20
申请人： Akbar Ghazinour , Saverio Trotta
发明人： Akbar Ghazinour , Saverio Trotta
IPC分类号： H03B19/14 , H03F3/45 , H03F3/60 , H03K23/66 , H03L7/00
CPC分类号： H03B19/14 , H03F1/0205 , H03F3/45085 , H03F3/60 , H03F3/602 , H03F2200/423 , H03F2200/513 , H03F2200/543 , H03F2203/45612 , H03F2203/45652 , H03F2203/45668 , H03F2203/45702 , H03K23/667 , H03L7/00
摘要： The invention relates to a Frequency Divider Circuit for dividing an input RF signal to a frequency divided RF signal. The circuit comprises a RF pair, a switching-quad pair coupled in series with a transimpedance amplifier and a double pair of emitter followers. The circuit comprises coupling elements for providing first DC paths to first amplifier paths of the RF pair and for providing second DC paths to second amplifier paths of the series arrangement of the switching-quad pair and the transimpedance amplifier. The first DC paths are independent of the second DC paths. RF connections are provided to couple the first and the second amplifier paths for transferring a signal from the first amplifier paths to the second amplifier paths.
摘要翻译：本发明涉及一种用于将输入RF信号划分为分频RF信号的分频器电路。该电路包括RF对，与跨阻放大器和双对发射极跟随器串联耦合的开关四极对。该电路包括用于向RF对的第一放大器路径提供第一DC路径的耦合元件，以及用于向开关四对和跨阻放大器的串联布置的第二放大器路径提供第二DC路径。第一DC路径独立于第二DC路径。提供RF连接以耦合第一和第二放大器路径，用于将信号从第一放大器路径传送到第二放大器路径。

4. 发明申请

US20130093494A1 DIFFERENTIAL CURRENT BUFFER 有权
标题翻译：差分电流缓冲器
公开(公告)号：US20130093494A1
公开(公告)日：2013-04-18
申请号：US13271991
申请日：2011-10-12
申请人： Edmund Balboni
发明人： Edmund Balboni
IPC分类号： G06G7/14 , H03F3/45
CPC分类号： H03F3/45085 , H03F2203/45318 , H03F2203/45392 , H03F2203/45481 , H03F2203/45612
摘要： Apparatus and methods provide a differential current buffer. The current buffer has cross-coupled feedback and offers relatively good common-mode rejection and a relatively low and linear input impedance, which can reduce intermodulation distortion. The current buffer can be used in, for example, an RF modulator, such as a quadrature modulator.
摘要翻译：装置和方法提供差分电流缓冲器。当前的缓冲器具有交叉耦合反馈，并提供相对较好的共模抑制和相对低的线性输入阻抗，可以减少互调失真。当前的缓冲器可以用于例如RF调制器，例如正交调制器。

5. 发明授权

US08150270B2 Compact high-speed modulator driver method and apparatus 失效
标题翻译：紧凑型高速调制器驱动方法和装置
公开(公告)号：US08150270B2
公开(公告)日：2012-04-03
申请号：US12383910
申请日：2009-03-30
申请人： Andrew John Bonthron
发明人： Andrew John Bonthron
IPC分类号： H04B10/04
CPC分类号： H03F3/607 , H03F3/45089 , H03F3/45475 , H03F3/602 , H03F2203/45136 , H03F2203/45612
摘要： Modulator driver for driving an electro-optical modulator in a high-speed optical communications system. In accordance with aspects of the present invention, a modulator driver is presented comprising an input differential limiting amplifier which is coupled to a distributed differential current-switch configuration, where one set of outputs of the distributed differential current-switch configuration are grounded and the other set of outputs are connected to an artificial transmission line structure generating forward traveling and reverse traveling signals, with the reverse traveling signal termination bias inductively coupled to a separately adjustable positive bias voltage, whereby the circuit architecture reduces the number of components and transitions in the high-speed signal path and is compatible with compact, monolithic fabrication requiring a minimal amount of external components for operation. Other methods and apparatus are presented.
摘要翻译：用于在高速光通信系统中驱动电光调制器的调制器驱动器。根据本发明的方面，提出了一种调制器驱动器，其包括输入差分限幅放大器，其耦合到分布式差分电流 - 开关配置，其中分布式差分电流 - 开关配置的一组输出接地，另一组一组输出连接到产生正向行驶和反向行驶信号的人造传输线结构，其中反向行驶信号终端偏置感应耦合到单独可调节的正偏置电压，由此电路架构减少了高的部件和转换次数速度信号路径，并且兼容紧凑的单片制造，需要最少量的外部组件进行操作。介绍了其他方法和装置。

6. 发明授权

US08054128B2 Current control mechanism for low voltage applications 有权
标题翻译：低电压应用的电流控制机制
公开(公告)号：US08054128B2
公开(公告)日：2011-11-08
申请号：US12795451
申请日：2010-06-07
申请人： Vikas Manan
发明人： Vikas Manan
IPC分类号： H03F1/00 , H03F3/00 , H03F3/04 , H03F3/45
CPC分类号： H03F3/45085 , H01S5/0427 , H03F2203/45612 , H03F2203/45702
摘要： A current control mechanism for use in low power consumption circuits with limited headroom includes a differential transistor pair from whose collectors a current output is taken. The current output is a function of a reference voltage provided at bases of a reference transistor pair having emitters that are coupled to the bases of the differential pair. The reference voltage is controlled by a pair of control transistors that control current through a load. A pair of tracking transistors can be provided to track supply voltage. A single-ended topology can also be implemented.
摘要翻译：用于具有有限余量的低功耗电路的电流控制机构包括从其集电极获取电流输出的差分晶体管对。电流输出是在具有耦合到差分对的基极的发射极的参考晶体管对的基极处提供的参考电压的函数。参考电压由控制通过负载的电流的一对控制晶体管控制。可以提供一对跟踪晶体管来跟踪电源电压。也可以实现单端拓扑。

7. 再颁专利

USRE42291E1 System and method for processing digital visual interface communication data signals and display data channel communication signals over a transmission line 有权
标题翻译：用于处理数字视频接口通信数据信号并通过传输线显示数据信道通信信号的系统和方法
公开(公告)号：USRE42291E1
公开(公告)日：2011-04-12
申请号：US12478032
申请日：2009-06-04
申请人： Aapoolcoyuz Biman , Birubi Ram Biman , John Hudson , Eliyahu D. Zamir , Stephen P. Webster
发明人： Aapoolcoyuz Biman , John Hudson , Eliyahu D. Zamir , Stephen P. Webster
IPC分类号： H04L27/00
CPC分类号： G09G5/006 , G09G2330/04 , G09G2370/047 , H03F3/191 , H03F3/45197 , H03F2203/45458 , H03F2203/45496 , H03F2203/45612 , H03F2203/45702 , H04L25/0272 , H04L25/03878 , H04L25/08 , H04L25/10
摘要： A digital communication system for transmitting and receiving Digital Visual Interface (DVI) communication data signals and Display Data Channel (DDC) communication signals over a transmission line comprises an open-loop equalizer circuit and a DDC extension circuit. The open-loop equalizer circuit is operable to receive DVI communication signals transmitted over the transmission line and output equalized DVI communication data signals. The DDC extension circuit is operable to inject a boost current at the receive end of the transmission line during a positive transition in the DDC communication signal, and clamp the receive end of the transmission line during a negative transition of the DDC communication signal.
摘要翻译：用于通过传输线路发送和接收数字视频接口（DVI）通信数据信号和显示数据信道（DDC）通信信号的数字通信系统包括开环均衡器电路和DDC扩展电路。开环均衡器电路可操作以接收通过传输线传输的DVI通信信号并输出均衡的DVI通信数据信号。 DDC扩展电路可操作以在DDC通信信号的正转换期间在传输线的接收端注入升压电流，并且在DDC通信信号的负转变期间钳位传输线的接收端。

8. 发明授权

US07898333B2 Operational amplifier 有权
标题翻译：运算放大器
公开(公告)号：US07898333B2
公开(公告)日：2011-03-01
申请号：US12247974
申请日：2008-10-08
申请人： Zachary M. Griffith , Miguel E. Urteaga , Mark J. W. Rodwell
发明人： Zachary M. Griffith , Miguel E. Urteaga , Mark J. W. Rodwell
IPC分类号： H03F3/45
CPC分类号： H03F3/45475 , H03F1/083 , H03F1/3211 , H03F3/19 , H03F3/45098 , H03F2200/405 , H03F2200/408 , H03F2200/423 , H03F2200/451 , H03F2200/543 , H03F2203/45051 , H03F2203/45116 , H03F2203/45118 , H03F2203/45138 , H03F2203/45151 , H03F2203/45336 , H03F2203/45512 , H03F2203/45528 , H03F2203/45548 , H03F2203/45564 , H03F2203/45594 , H03F2203/45596 , H03F2203/45612 , H03F2203/45701 , Y10T29/41
摘要： The present invention relates generally to an operational amplifier. In one embodiment, the present invention is an operational amplifier including a transimpedance input stage, the transimpedance input stage including a first stage connected to a first resistor and a second resistor, and an output stage connected to the transimpedance input stage.
摘要翻译：本发明一般涉及运算放大器。在一个实施例中，本发明是包括跨阻输入级的运算放大器，跨阻输入级包括连接到第一电阻器和第二电阻器的第一级，以及连接到跨阻输入级的输出级。

9. 发明授权

US07880544B2 Differential amplifier and applications thereof 有权
标题翻译：差分放大器及其应用
公开(公告)号：US07880544B2
公开(公告)日：2011-02-01
申请号：US12369412
申请日：2009-02-11
申请人： Szymon Gerka , Miroslaw Oksiucik
发明人： Szymon Gerka , Miroslaw Oksiucik
IPC分类号： H03F3/45
CPC分类号： H03F3/45475 , H03F3/45179 , H03F3/45183 , H03F2200/513 , H03F2203/45342 , H03F2203/45612
摘要： A differential amplifier includes a first pair of differential amplifiers and a second pair of differential amplifiers. These first and second pairs of differential amplifiers are connected between first power rails and are arranged to receive a differential input signal. Third and fourth pairs of differential amplifiers are connected between second rails and also connected to the differential input signal. A current summer sums a first output current of the first pair of differential amplifiers, a second output current of the second pair of differential amplifiers, a third output current of the third pair of differential amplifiers and a fourth output current of a fourth pair of differential amplifiers to produce an output signal.
摘要翻译：差分放大器包括第一对差分放大器和第二对差分放大器。这些第一和第二对差分放大器连接在第一电源轨之间，并被布置成接收差分输入信号。第三和第四对差分放大器连接在第二导轨之间，也连接到差分输入信号。当前夏季对第一对差分放大器的第一输出电流，第二对差分放大器的第二输出电流，第三对差分放大器的第三输出电流和第四对差分放大器的第四输出电流求和放大器产生输出信号。

10. 发明申请

US20100142611A1 DIGITAL COMMUNICATION SYSTEM AND METHOD 审中-公开
标题翻译：数字通信系统和方法
公开(公告)号：US20100142611A1
公开(公告)日：2010-06-10
申请号：US12707989
申请日：2010-02-18
申请人： Aapoolcoyuz Biman , John Hudson , Eliyahu D. Zamir , Stephen P. Webster
发明人： Aapoolcoyuz Biman , John Hudson , Eliyahu D. Zamir , Stephen P. Webster
IPC分类号： H03K5/159
CPC分类号： G09G5/006 , G09G2330/04 , G09G2370/047 , H03F3/191 , H03F3/45197 , H03F2203/45458 , H03F2203/45496 , H03F2203/45612 , H03F2203/45702 , H04L25/0272 , H04L25/03878 , H04L25/08 , H04L25/10
摘要： A digital communication system for transmitting and receiving video data signals and control data signals over a transmission line comprises an open-loop equalizer circuit and a control data extension circuit. The open-loop equalizer circuit is operable to receive video signals transmitted over the transmission line and output equalized video data signals. The control data extension circuit is operable to inject a boost current at the receive end of the transmission line during a positive transition in the control data signal, and clamp the receive end of the transmission line during a negative transition of the control data signal.
摘要翻译：用于通过传输线发送和接收视频数据信号和控制数据信号的数字通信系统包括开环均衡器电路和控制数据扩展电路。开环均衡器电路可操作以接收通过传输线传输的视频信号并输出均衡的视频数据信号。控制数据扩展电路可操作以在控制数据信号的正转换期间在传输线的接收端注入升压电流，并且在控制数据信号的负转变期间钳位传输线的接收端。

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