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1. 发明申请

US20160164517A1 High Gain Load Circuit for a Differential Pair Using Depletion Mode Transistors 审中-公开
标题翻译：使用耗尽型晶体管的差分对的高增益负载电路
公开(公告)号：US20160164517A1
公开(公告)日：2016-06-09
申请号：US14959567
申请日：2015-12-04
申请人： Analog Devices, Inc.
发明人： Yogesh Jayaraman Sharma , James Fiorenza
IPC分类号： H03K17/687 , H01L27/088 , H01L29/20
CPC分类号： H03K17/6871 , H01L27/088 , H01L29/2003 , H03F3/45188 , H03F3/45385 , H03F2200/303 , H03F2200/75 , H03F2203/45036 , H03F2203/45182 , H03F2203/45184 , H03F2203/45188 , H03F2203/45202 , H03F2203/45208 , H03F2203/45224 , H03F2203/45656 , H03F2203/45674 , H03F2203/45676 , H03F2203/45701 , H03F2203/45702 , H03F2203/45722
摘要： A differential pair gain stage is disclosed. In one embodiment, the gain stage includes a differential pair of depletion-mode transistors, including a first and a second n-type transistor. In certain embodiments of the invention, the depletion mode transistor may be GaN (gallium nitride) field effect transistors. The gain stage includes an active load including one or more depletion mode transistors electrically coupled to at least one of the drains of depletion mode transistors of the differential pair. The active load may include a source follower for maintaining the AC voltages at the drains of the differential pair at a constant value and may further include a casocde stage for setting a fixed drain source voltage across the output transistors to increase the output impedance and gain of the stage.
摘要翻译：公开了差分对增益级。在一个实施例中，增益级包括包括第一和第二n型晶体管的耗尽型晶体管的差分对。在本发明的某些实施例中，耗尽型晶体管可以是GaN（氮化镓）场效应晶体管。增益级包括有源负载，其包括电耦合到差分对的耗尽型晶体管的至少一个漏极的一个或多个耗尽型晶体管。有源负载可以包括源极跟随器，用于将差分对的漏极处的AC电压保持在恒定值，并且还可以包括用于在输出晶体管两端设置固定的漏极源电压的casocde级，以增加输出阻抗和增益舞台。

2. 发明授权

US5734296A Low voltage operational amplifier input stage and method 失效
标题翻译：低压运算放大器输入级和方法
公开(公告)号：US5734296A
公开(公告)日：1998-03-31
申请号：US618671
申请日：1996-03-19
申请人： Robert N. Dotson , Richard S. Griffith , Robert L. Vyne
发明人： Robert N. Dotson , Richard S. Griffith , Robert L. Vyne
IPC分类号： H03F3/30 , H03F3/343 , H03F3/45 , H03F3/16
CPC分类号： H03F3/4508 , H03F3/3067 , H03F3/343 , H03F3/45076 , H03F2203/45028 , H03F2203/45182
摘要： Low voltage operational amplifier (10) operates in a voltage range of one to eight volts over a temperature range of 0.degree. to 70.degree. centigrade. Op amp input stage (12) uses N-channel depletion-mode MOSFETs to provide amplification of the differential input and maintain constant transconductance. Source follower MOSFET (13) provides unity gain in transferring the AC signal, STAGE-1 OUTPUT, to the base of current sinking transistor (18). Sink control circuit (14) and source control circuit (22) generate the base drive currents for transistors (18) and (24). The signal at the output of MOSFET (13) either causes the sink transistor (18) to sink current or the signal to be transposed by means of a translinear loop (16) and causes the source transistor (24) to source current. An output stage provides approximately fifty milliamps of current drive and is quiescent until the output driver is selected.
摘要翻译：低压运算放大器（10）在0至70℃的温度范围内工作在1-8伏特的电压范围内。运算放大器输入级（12）使用N沟道耗尽型MOSFET来提供差分输入的放大并保持恒定的跨导。源极跟随器MOSFET（13）在将AC信号STAGE-1 OUTPUT传送到电流吸收晶体管（18）的基极时提供单位增益。漏极控制电路（14）和源极控制电路（22）产生用于晶体管（18）和（24）的基极驱动电流。 MOSFET（13）的输出处的信号或者使得宿晶体管（18）通过一个跨线性环路（16）吸收电流或者被转置的信号，并且使源极晶体管（24）产生电流。输出级提供大约五十毫安的电流驱动器，并且静止，直到选择输出驱动器为止。

3. 发明授权

US5146179A Fully differential operational amplifier having frequency dependent impedance division 失效
标题翻译：具有频率相关阻抗分频的全差分运算放大器
公开(公告)号：US5146179A
公开(公告)日：1992-09-08
申请号：US800845
申请日：1991-11-29
申请人： L. Richard Carley , Katsufumi Nakamura
发明人： L. Richard Carley , Katsufumi Nakamura
IPC分类号： H03F3/30 , H03F3/45
CPC分类号： H03F3/3001 , H03F3/45192 , H03F2203/45028 , H03F2203/45182 , H03F2203/45278
摘要： A fully differential operational amplifier includes first and second frequency dependent impedance dividers, preferably frequency dependent current dividers, each of which has an input, a noninverting output and an inverting output. A respective input is coupled to a differential input signal. The noninverting output of the first frequency dependent impedance divider is electrically coupled to the inverting output of the second frequency dependent impedance divider, and the noninverting output of the second impedance divider is electrically coupled to the inverting output of the first divider. A current feedback buffer electrically couples the noninverting output of a respective frequency dependent impedance divider to its associated input. The cross coupling and current feedback buffers provide positive feedback action which merges the inverting and noninverting differential signals as a function of frequency. The frequency dependent impedance dividers preferably deliver substantially all of the current at the input thereof to the associated inverted output at relatively low frequencies (DC) and split the current at the input between the associated inverting and noninverting outputs at relatively high frequencies. Each frequency dependent current divider may be implemented by a pair of cascode transistors one of which is loaded by a cascoded current mirror. High DC gain coupled with high and symmetric slew rate and high common mode rejection is thereby provided.
摘要翻译：全差分运算放大器包括第一和第二频率相关阻抗分配器，优选频率相关的电流分配器，每个具有输入，非反相输出和反相输出。相应的输入耦合到差分输入信号。第一频率相关阻抗分配器的同相输出电耦合到第二频率相关阻抗分配器的反相输出，并且第二阻抗分压器的同相输出电耦合到第一分频器的反相输出。电流反馈缓冲器将相应的频率相关阻抗分配器的非反相输出电耦合到其相关联的输入。交叉耦合和电流反馈缓冲器提供正反馈作用，其将反相和同相差分信号作为频率的函数进行合并。频率相关阻抗分配器优选地将输入端的电流基本上全部输送到相对较低频率（DC）的相关反相输出，并以相对较高的频率将相关联的反相和同相输出之间的输入电流分开。每个频率相关的电流分配器可以由一对共源共栅晶体管来实现，其中一个是由共源电流反射镜加载的。由此提供了高直流增益以及高对称压摆率和高共模抑制。

4. 发明申请

US20170331432A1 AMPLIFYING CIRCUIT 有权
公开(公告)号：US20170331432A1
公开(公告)日：2017-11-16
申请号：US15657618
申请日：2017-07-24
申请人： SHENZHEN GOODIX TECHNOLOGY CO., LTD.
发明人： Mengwen ZHANG
IPC分类号： H03F1/02 , H03F3/187 , H03F1/30 , H03F1/32
CPC分类号： H03F1/0205 , H03F1/301 , H03F1/32 , H03F3/005 , H03F3/187 , H03F3/45183 , H03F3/45188 , H03F3/45192 , H03F3/45475 , H03F3/45659 , H03F3/45699 , H03F3/45762 , H03F2200/129 , H03F2200/156 , H03F2200/159 , H03F2200/18 , H03F2200/222 , H03F2200/252 , H03F2200/264 , H03F2200/471 , H03F2200/555 , H03F2203/45008 , H03F2203/45012 , H03F2203/45024 , H03F2203/45028 , H03F2203/45054 , H03F2203/45068 , H03F2203/45082 , H03F2203/45112 , H03F2203/45134 , H03F2203/45136 , H03F2203/45171 , H03F2203/45174 , H03F2203/45182 , H03F2203/45188 , H03F2203/45192 , H03F2203/45208 , H03F2203/45244 , H03F2203/45332 , H03F2203/45421 , H03F2203/45434 , H03F2203/45444 , H03F2203/45512 , H03F2203/45514 , H03F2203/45534 , H03F2203/45544 , H03F2203/45546 , H03F2203/45551 , H03F2203/45586 , H03F2203/45588 , H03F2203/45616 , H03F2203/45632 , H03F2203/45642 , H03F2203/45656 , H03F2203/45674 , H03F2203/45676
摘要： An amplifying circuit includes a reference voltage generating circuit, a common-mode voltage conversion circuit, a common-mode negative feedback circuit, and an amplifying sub-circuit. The reference voltage generating circuit generates a first reference voltage, a second reference voltage, and a reference common-mode voltage according to a post-stage common-mode voltage. The common-mode voltage conversion circuit converts the pre-stage output differential signal into a differential input signal according to the reference common-mode voltage. The common-mode negative feedback circuit generates a control voltage to quickly establish a common-mode negative feedback of the amplifying sub-circuit, wherein the first reference voltage and the second reference voltage are used to cancel a baseline signal of the pre-stage output differential signal. The amplifying circuit can eliminate the baseline signal, convert the common-mode voltage and quickly establish the common-mode negative feedback.

5. 发明授权

US09331647B2 Low-voltage amplifier and method thereof 有权
标题翻译：低压放大器及其方法
公开(公告)号：US09331647B2
公开(公告)日：2016-05-03
申请号：US14250404
申请日：2014-04-11
申请人： Realtek Semiconductor Corp.
发明人： Chia-Liang (Leon) Lin
IPC分类号： H03F3/45
CPC分类号： H03F3/45183 , H03F3/211 , H03F2200/456 , H03F2203/45032 , H03F2203/45112 , H03F2203/45182 , H03F2203/45702
摘要： An amplifier is provided having a first mixed-length MOS device set for receiving an input signal and outputting an output signal, and a first load for providing termination for the output signal, wherein the first mixed-length MOS device set comprises a parallel connection of a plurality of MOS devices having different channel lengths including at least a short channel length MOS device and a long channel length MOS device. In one configuration, a threshold voltage of the short channel length MOS device is greater than a threshold voltage of the long channel length MOS device. A related method is also provided.
摘要翻译：提供一种具有第一混合长度MOS器件的放大器，用于接收输入信号并输出输出信号，以及第一负载，用于为输出信号提供终止，其中第一混合长度MOS器件组包括：具有至少短沟道长度MOS器件和长沟道长度MOS器件的不同沟道长度的多个MOS器件。在一种配置中，短沟道长度MOS器件的阈值电压大于长沟道长度MOS器件的阈值电压。还提供了相关的方法。

6. 发明授权

US5285168A Operational amplifier for stably driving a low impedance load of low power consumption 失效
标题翻译：用于稳定驱动低功耗的低阻抗负载的运算放大器
公开(公告)号：US5285168A
公开(公告)日：1994-02-08
申请号：US944921
申请日：1992-09-15
申请人： Takashi Tomatsu , Takaaki Noda
发明人： Takashi Tomatsu , Takaaki Noda
IPC分类号： H03F3/30 , H03F3/345 , H03F3/45 , H04L25/02
CPC分类号： H03F3/45192 , H03F3/3001 , H03F2203/30036 , H03F2203/30096 , H03F2203/30129 , H03F2203/45028 , H03F2203/45182 , H03F2203/45281 , H04L25/028
摘要： An operational amplifier is equipped at its input stage with a folded cascode type differential amplifier and at its downstream stage with pre-buffers, which include a differential amplification stage of PMOS input and a differential amplification stage of NMOS input, as level shifters. A MOS resistor having its gate terminal fed with an intermediate bias potential between a supply voltage V.sub.DD and an earth potential is connected between every one of the drain terminals of current-mirror connected load MOSFETs in the pre-buffers. As a result, the gains of the pre-buffers in the steady state can be suppressed to about 10 dB or less. The individual MOSFETs of the push-pull output stage are individually driven by the pre-buffers of low gains.
摘要翻译：运算放大器在其输入级配有折叠型共源共栅型差分放大器，其下游级具有预缓冲器，其中包括PMOS输入的差分放大级和NMOS输入的差分放大级，作为电平转换器。其电源电压VDD和地电位之间的中间偏置电位馈入其栅极端子的MOS电阻连接在预缓冲器中电流镜连接的负载MOSFET的每个漏极端子之间。结果，可以将稳定状态下的预缓冲器的增益抑制在10dB以下。推挽输出级的各个MOSFET分别由低增益的预缓冲器驱动。

7. 发明申请

US20150303877A1 SEMICONDUCTOR DEVICE 审中-公开
标题翻译：半导体器件
公开(公告)号：US20150303877A1
公开(公告)日：2015-10-22
申请号：US14423570
申请日：2013-08-26
申请人： PS4 Luxco S.a.r.l.
发明人： Katsuhiro KITAGAWA , Hiroki TAKAHASHI , Kohei NAKAMURA
IPC分类号： H03F1/02 , H03F3/45
CPC分类号： H03F1/0205 , G11C7/1084 , G11C11/4093 , H03F3/45076 , H03F2203/45182 , H03K5/2481
摘要： A semiconductor device comprises a first input terminal; a second input terminal; an inverting amplifier circuit that comprises an input node connected to a first input terminal, an inverting input node connected to a second input terminal, and an output node connected to an output terminal, amplifies a difference between a first input signal supplied to the input node and a second input signal supplied to the second input terminal, and that outputs an output signal whose polarity is inverted from that of the first input signal to the output node; and a non-inverting amplifier circuit that comprises an input node connected to a second input terminal, an inverting input node connected to a first input terminal, and an output node connected to an output terminal, amplifies a difference between the first input signal and the second input signal, and that outputs an output signal whose polarity is the same as that of the first input signal to the output node.
摘要翻译：半导体器件包括第一输入端; 第二输入端; 反相放大器电路，包括连接到第一输入端子的输入节点，连接到第二输入端子的反相输入节点和连接到输出端子的输出节点，放大提供给输入节点的第一输入信号以及第二输入信号，其被提供给所述第二输入端，并将其极性与所述第一输入信号的极性反相的输出信号输出到所述输出节点; 以及非反相放大器电路，其包括连接到第二输入端子的输入节点，连接到第一输入端子的反相输入节点和连接到输出端子的输出节点，放大第一输入信号和第二输入信号，并且将与第一输入信号的极性相同的输出信号输出到输出节点。

8. 发明申请

US20150295538A1 LOW-VOLTAGE AMPLIFIER AND METHOD THEREOF 有权
标题翻译：低电压放大器及其方法
公开(公告)号：US20150295538A1
公开(公告)日：2015-10-15
申请号：US14250404
申请日：2014-04-11
申请人： Realtek Semiconductor Corp.
发明人： Chia-Liang (Leon) Lin
IPC分类号： H03F1/02 , H03F3/45
CPC分类号： H03F3/45183 , H03F3/211 , H03F2200/456 , H03F2203/45032 , H03F2203/45112 , H03F2203/45182 , H03F2203/45702
摘要： An amplifier is provided having a first mixed-length MOS device set for receiving an input signal and outputting an output signal, and a first load for providing termination for the output signal, wherein the first mixed-length MOS device set comprises a parallel connection of a plurality of MOS devices having different channel lengths including at least a short channel length MOS device and a long channel length MOS device. In one configuration, a threshold voltage of the short channel length MOS device is greater than a threshold voltage of the long channel length MOS device. A related method is also provided.
摘要翻译：提供一种具有第一混合长度MOS器件的放大器，用于接收输入信号并输出输出信号，以及第一负载，用于为输出信号提供终止，其中第一混合长度MOS器件组包括：具有至少短沟道长度MOS器件和长沟道长度MOS器件的不同沟道长度的多个MOS器件。在一种配置中，短沟道长度MOS器件的阈值电压大于长沟道长度MOS器件的阈值电压。还提供了相关的方法。

9. 发明授权

US5900783A Low voltage class AB output stage CMOS operational amplifiers 失效
标题翻译： CMOS运算放大器的低电压等级AB输出级
公开(公告)号：US5900783A
公开(公告)日：1999-05-04
申请号：US905630
申请日：1997-08-04
申请人： Uday Dasgupta
发明人： Uday Dasgupta
IPC分类号： H03F3/30 , H03F3/45 , H03F3/26 , H03F3/16
CPC分类号： H03F3/3022 , H03F3/3001 , H03F3/45192 , H03F2203/30036 , H03F2203/45028 , H03F2203/45182
摘要： A circuit is disclosed for a complimentary metal oxide semiconductor (CMOS) operational amplifier output stage which can be connected easily to almost any input stage design and which can be coupled directly to that input stage. The circuit uses nine small transistors and two output transistors. The output transistors are connected in series between the power supply rails and the size of the two output transistors determines the current available to the load. The circuit of the invention can provide rail-to-rail output voltage swings and can drive a low ohm resistive load.
摘要翻译：公开了一种用于互补金属氧化物半导体（CMOS）运算放大器输出级的电路，其可以容易地连接到几乎任何输入级设计，并且可以直接耦合到该输入级。该电路使用九个小晶体管和两个输出晶体管。输出晶体管串联连接在电源轨道之间，两个输出晶体管的尺寸决定了可用于负载的电流。本发明的电路可以提供轨至轨输出电压摆幅并且可以驱动低欧姆电阻负载。

10. 发明授权

US5124666A CMOS current convevor and its filter applications 失效
标题翻译： CMOS电流对流器及其滤波器应用
公开(公告)号：US5124666A
公开(公告)日：1992-06-23
申请号：US664608
申请日：1991-03-04
申请人： Shen-Iuan Liu , Jing-Shown Wu , Hen-Wai Tsao
发明人： Shen-Iuan Liu , Jing-Shown Wu , Hen-Wai Tsao
IPC分类号： H03F3/30 , H03H11/00 , H03H11/04
CPC分类号： H03F3/3022 , H03F3/3001 , H03F3/45179 , H03H11/00 , H03H11/04 , H03F2203/30006 , H03F2203/30084 , H03F2203/30117 , H03F2203/45182 , H03F2203/45224 , H03F2203/45462
摘要： A CMOS second generation current conveyor (CCII) and its integrators suitable for MOS technology integrated circuit (IC) applications. Ladder filters based on CCII are realized. CMOS CCII-based circuits can be directly employed in single CCII biquad filters. Four configurations are proposed to synthesize various types of second-order transfer functions.
摘要翻译： CMOS第二代电流输送机（CCII）及其集成商适用于MOS技术集成电路（IC）应用。实现了基于CCII的梯形滤波器。基于CMOS CCII的电路可以直接用于单个CCII双二阶滤波器。提出四种配置来合成各种二阶传递函数。

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