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    • 2. 发明授权
    • Scattering bar OPC application method for mask ESD prevention
    • 散射棒用于防止ESD防护的OPC应用方法
    • US07614030B2
    • 2009-11-03
    • US11332928
    • 2006-01-17
    • Chien-Ping Hsu
    • Chien-Ping Hsu
    • G06F17/50
    • G03F1/40G03F1/36
    • A method for reducing ESD on scattering bars in forming a mask containing a target pattern is provided. In one embodiment, the target pattern comprising features to be imaged onto a substrate is obtained. The mask is modified to include at least one scattering bar, the at least one scattering bar being placed adjacent to edges of the features to be imaged. Thereafter, the scattering bar is truncated into one or more scattering bar segments by determining an optimized length for each of the one or more scattering bar segments, wherein ESD on the one or more scattering bar segments is substantially reduced.
    • 提供了一种在形成包含目标图案的掩模时减少散射棒上的ESD的方法。 在一个实施例中,获得包含要成像到衬底上的特征的目标图案。 掩模被修改为包括至少一个散射棒,所述至少一个散射棒邻近要成像的特征的边缘放置。 此后,通过确定一个或多个散射棒段中的每一个的优化长度,将散射棒截断成一个或多个散射棒段,其中一个或多个散射棒段上的ESD被显着减小。
    • 6. 发明申请
    • Method of producing a mask blank for photolithographic applications, and mask blank
    • 制备用于光刻应用的掩模坯料的方法和掩模坯料
    • US20060115744A1
    • 2006-06-01
    • US11198387
    • 2005-08-08
    • Lutz AschkeFrank SobelGuenter HessHans BeckerMarkus RennoFrank SchmidtOliver Goetzberger
    • Lutz AschkeFrank SobelGuenter HessHans BeckerMarkus RennoFrank SchmidtOliver Goetzberger
    • G03F1/00B05D1/04B32B9/00B32B17/10B32B17/06
    • G03F1/24B82Y10/00B82Y40/00G03F1/38G03F1/40Y10T428/31616
    • The invention relates to a method of producing a mask blank (1) for photolithographic applications, particularly in EUV lithography, comprising the steps of: providing a substrate (2) which has a front side (4) and a rear side (3); depositing an electrically conductive layer (5) on the rear side of the substrate; depositing a coating on the front side of the substrate, wherein the coating comprises at least a first layer (6) and a second layer (9); and structuring the coating (6, 9) for photolithographic applications; wherein a respective handling area (22; 22a-22c) is formed on the front side (4) at least at one predefined location, said handling area not being structured for photolithographic applications and being designed for the handling of the mask blank (1) by means of a mechanical clamp or handling device, and wherein the first layer (6) is exposed in the respective handling area (22; 22a-22c) so that, when the mask blank (1) is handled from the front side, the mechanical clamp or handling device bears against the first layer (6). The invention furthermore relates to a corresponding mask blank.
    • 本发明涉及一种制备用于光刻应用的掩模板(1)的方法,特别是在EUV光刻中,包括以下步骤:提供具有前侧(4)和后侧(3)的基板(2) 在所述衬底的后侧上沉积导电层(5); 在所述基底的正面上沉积涂层,其中所述涂层至少包括第一层(6)和第二层(9); 并构造用于光刻应用的涂层(6,9); 其中至少在一个预定位置处在前侧(4)上形成相应的操作区域(22; 22a-22c),所述操作区域不被构造用于光刻应用并且被设计用于处理掩模坯料( 1)通过机械夹具或处理装置,并且其中第一层(6)暴露在相应的处理区域(22; 22a-22c)中,使得当掩模坯料(1)从 前侧,机械夹具或处理装置抵靠第一层(6)。 本发明还涉及相应的掩模坯料。
    • 9. 发明申请
    • Novel modification of mask blank to avoid charging effect
    • 面罩空白的新颖修改,避免充电效果
    • US20040234868A1
    • 2004-11-25
    • US10441888
    • 2003-05-20
    • Cheng-ming Lin
    • B32B009/00G03F009/00G03C005/00B32B017/06
    • G03F1/40C23C14/048G03F1/54G03F1/78
    • A blank mask for photomasking patterns on an integrated circuit comprises a non-conductive substrate and a layer of conductive material deposited on the substrate covering substantially the entire surface of said substrate. Methods for preventing charge accumulation on a non-conductive region of a mask, which is not covered by a layer of conductive material, are provided. One method comprises controlling electron beams to prevent the beams from striking an outer region for an area more than 90 percent of the outer region when patterning a predetermined feature on the mask. The outer region comprises an area beginning from an edge of the mask and ending at 2 to 6 mm inward from the edge. Another method comprises using a blocker to prevent electron beams from hitting the outer region for an area more than 90 percent of the outer region when patterning a predetermined feature on the substrate.
    • 用于集成电路上的光掩模图案的空白掩模包括非导电衬底和沉积在衬底上的基本覆盖所述衬底的整个表面的导电材料层。 提供了防止未被导电材料层覆盖的掩模的非导电区域上的电荷积聚的方法。 一种方法包括在图案化掩模上的预定特征时,控制电子束以防止光束撞击外部区域超过外部区域的90%以上的区域。 外部区域包括从掩模的边缘开始并从边缘向内延伸2至6mm的区域。 另一种方法包括当图案化衬底上的预定特征时,使用阻挡剂来防止电子束撞击外部区域超过外部区域的90%的面积。
    • 10. 发明授权
    • Electrostatic damage (ESD) protected photomask
    • 静电损伤(ESD)保护光掩模
    • US06803156B2
    • 2004-10-12
    • US09920504
    • 2001-08-01
    • Shahzad Akbar
    • Shahzad Akbar
    • G03F900
    • G03F1/40
    • A photomask (8) protected against electrostatic damage and a method of manufacturing such a photomask is disclosed. The photomask (8) comprises a transparent substrate (10) on which is deposited an opaque pattern such as lines (12), (14), (16) and (18). A transparent conductive film (30) is deposited over the substrate (10) and pattern such that the various portions of the pattern (lines (12), (14), (16) and (18)) are all maintained at the same electrical potential thereby preventing damage due to an electrostatic discharge.
    • 公开了防止静电损伤的光掩模(8)和制造这种光掩模的方法。 光掩模(8)包括透明基板(10),在其上沉积不透明图案,例如线(12),(14),(16)和(18)。 在衬底(10)上沉积透明导电膜(30)并且使图案(线(12),(14),(16)和(18))的各个部分全部保持在相同的电 从而防止由静电放电引起的损坏。