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1. 发明授权

US11807521B2 Support structure for MEMS device with particle filter 有权
公开(公告)号：US11807521B2
公开(公告)日：2023-11-07
申请号：US17218358
申请日：2021-03-31
申请人： Taiwan Semiconductor Manufacturing Co., Ltd.
发明人： Chun-Wen Cheng , Chia-Hua Chu , Wen Cheng Kuo
IPC分类号： B81C1/00 , B81B3/00 , B81B7/00 , B81C3/00 , H01L23/00 , H01L23/053
CPC分类号： B81C1/00158 , B81B3/0021 , B81B7/0029 , B81C1/0023 , B81C1/00325 , B81C1/00357 , B81C1/00476 , B81C1/00539 , B81C1/00825 , B81C3/001 , B81B7/0006 , B81B7/0061 , B81B2201/0257 , B81B2203/0127 , B81B2207/012 , B81B2207/115 , H01L23/053 , H01L24/48 , H01L2224/48195
摘要： Various embodiments of the present disclosure are directed towards a method for forming a microelectromechanical systems (MEMS) device. The method includes forming a filter stack over a carrier substrate. The filter stack comprises a particle filter layer having a particle filter. A support structure layer is formed over the filter stack. The support structure layer is patterned to define a support structure in the support structure layer such that the support structure has one or more segments. The support structure is bonded to a MEMS structure.

2. 发明申请

US20180319654A1 MULTI-LAYER, STRESS-ISOLATION PLATFORM FOR A MEMS DIE 审中-公开
公开(公告)号：US20180319654A1
公开(公告)日：2018-11-08
申请号：US15896749
申请日：2018-02-14
申请人： DunAn Microstaq, Inc.
发明人： Wayne C. Long , Joseph L. Nguyen
IPC分类号： B81B7/00 , B81C3/00 , B81C1/00
CPC分类号： B81B7/0029 , B81B7/0048 , B81B2201/0264 , B81C1/00325 , B81C1/00357 , B81C3/001 , B81C2203/035
摘要： A multi-layer, stress-isolation platform configured for attaching a MEMS die to a base includes a first platform, a first layer of attachment material between the base and the first platform and attaching the first platform to the base, a MEMS die, and a second layer of attachment material between the first platform and the MEMS die and attaching the MEMS die to the first platform.

3. 发明申请

US20180118562A1 METHOD FOR THE LOW-LOSS PRODUCTION OF MULTI-COMPONENT WAFERS 审中-公开
公开(公告)号：US20180118562A1
公开(公告)日：2018-05-03
申请号：US15565445
申请日：2015-06-23
申请人： SILTECTRA GmbH
发明人： Wolfram Drescher , Franz Schilling , Jan Richter
IPC分类号： B81C1/00 , H01L21/762 , H01L31/18 , B23K26/00
CPC分类号： B28D5/0011 , B23K26/53 , B23K2101/36 , B28D1/221 , B81C1/00357 , B81C1/0038 , B81C2201/0192 , H01L21/76251 , H01L31/1804 , H01L31/1896
摘要： The present invention relates to a method for producing a multi-component wafer, in particular a MEMS wafer. The method according to the invention comprises at least the following steps: providing a bonding wafer (2), wherein at least one surface portion (4) of the bonding wafer (2) is formed by an oxide film, providing a dispenser wafer (6), wherein the dispenser wafer (6) is thicker than the bonding wafer (2), bringing the dispenser wafer (6) into contact with the surface portion (4) of the bonding wafer (2) that is formed by the oxide film, forming a multilayer arrangement (8) by connecting the dispenser wafer (6) and the bonding wafer (2) in the region of the contact, producing modifications (18) in the interior of the dispenser wafer (6) for predefining a detachment region (11) for separating the multilayer arrangement (8) into a detaching part (14) and a connecting part (16), wherein the production of the modifications (18) takes place before the formation of the multilayer arrangement (8) or after the formation of the multilayer arrangement (8), separating the multilayer arrangement along the detachment region as a result of a weakening of the multilayer arrangement brought about by the production of a sufficient number of modifications or as a result of production of mechanical stresses in the multilayer arrangement, wherein the connecting part (16) remains on the bonding wafer (2) and wherein the split-off detachment part (14) has a greater thickness than the connecting part (16).

4. 发明授权

US09862596B2 Component having a substrate with cavities with micromechanical structures located therein 有权
公开(公告)号：US09862596B2
公开(公告)日：2018-01-09
申请号：US14355464
申请日：2012-11-02
申请人： Continental Teves AG & Co. OHG
发明人： Stefan Günthner , Bernhard Schmid
IPC分类号： B81C1/00 , G01P15/08
CPC分类号： B81C1/00293 , B81B2201/0235 , B81B2201/0264 , B81C1/00357 , G01P15/0802
摘要： A micromechanical component formed from, a substrate (100) having a first cavity (112) and a second cavity (113), a first micromechanical structure (117) arranged in the first cavity (112), and a second micromechanical structure (118) arranged in the second cavity (113). The first cavity (112) and the second cavities having respective first and second gas pressures having different values. The first gas pressure is provided by a closed configuration of the first cavity (112) and a first channel (115) opens into the second cavity (113), and the second gas pressure is adjustable via the first channel (115).

5. 发明授权

US09738516B2 Structure to reduce backside silicon damage 有权
公开(公告)号：US09738516B2
公开(公告)日：2017-08-22
申请号：US14699094
申请日：2015-04-29
申请人： Taiwan Semiconductor Manufacturing Co., Ltd.
发明人： Chung-Yen Chou , Chih-Jen Chan , Chia-Shiung Tsai , Ru-Liang Lee , Yuan-Chih Hsieh
IPC分类号： B81C1/00 , B81B7/00
CPC分类号： B81C1/00595 , B81B7/007 , B81B2201/0235 , B81B2201/0242 , B81B2201/0264 , B81B2201/0271 , B81B2201/0292 , B81B2203/0109 , B81C1/00357 , B81C1/00801 , B81C2201/0132
摘要： A method of forming an IC (integrated circuit) device is provided. The method includes receiving a first wafer including a first substrate and including a plasma-reflecting layer disposed on an upper surface thereof. The plasma-reflecting layer is configured to reflect a plasma therefrom. A dielectric protection layer is formed on a lower surface of a second wafer, wherein the second wafer includes a second substrate. The second wafer is bonded to the first wafer, such that a cavity is formed between the plasma-reflecting layer and the dielectric protection layer. An etch process is performed with the plasma to form an opening extending from an upper surface of the second wafer and through the dielectric protection layer into the cavity. A resulting structure of the above method is also provided.

6. 发明授权

US09676617B2 Micro-electro-mechanical transducer having an optimized non-flat surface 有权
公开(公告)号：US09676617B2
公开(公告)日：2017-06-13
申请号：US14642521
申请日：2015-03-09
申请人： Kolo Technologies, Inc.
发明人： Yongli Huang
IPC分类号： B81C1/00 , H02N1/00 , H04R19/00 , B81B3/00 , H03H9/24 , H03H9/46 , H03H9/02 , H03H3/007
CPC分类号： B81C1/00626 , B81B3/0027 , B81C1/00158 , B81C1/00182 , B81C1/00357 , B81C1/00373 , B81C1/00523 , H01L2924/0002 , H02N1/006 , H03H3/0072 , H03H9/02259 , H03H9/2405 , H03H9/462 , H04R19/005 , H04R2201/003 , Y10T29/42 , Y10T29/49005 , H01L2924/00
摘要： A method for a capacitive micromachined ultrasound transducer (cMUT) is provided. The method grows and patterns a diffusion barrier layer over a surface of a base layer. The diffusion barrier layer have different areas that allow different levels of diffusion penetration. A diffusion process is performed over the diffusion barrier layer such that a diffusion reactivated material reaches different depths into the base layer below the different areas. A anchor is formed using the diffusion reactivated material. The anchor has a lower portion below a major surface of the base layer and an upper portion above the major surface of the base layer. A cover layer is placed over the anchor and the base layer. At least one of the cover layer and the base layer includes a flexible layer, such that the cMUT electrodes are movable relative to each other to cause a change of the gap width.

7. 发明授权

US09527724B2 Direct sealing of glass microstructures 有权
标题翻译：直接密封玻璃微结构
公开(公告)号：US09527724B2
公开(公告)日：2016-12-27
申请号：US13989897
申请日：2011-11-28
申请人： Thierry Luc Alain Dannoux , Paulo Gaspar Jorge Marques , Ronan Tanguy
发明人： Thierry Luc Alain Dannoux , Paulo Gaspar Jorge Marques , Ronan Tanguy
IPC分类号： B81C1/00 , B01L3/00 , C03B23/24
CPC分类号： B81C1/00119 , B01L3/502707 , B01L2200/12 , B01L2300/0887 , B81B2201/051 , B81C1/00357 , B81C2203/036 , C03B23/245
摘要： Embodiments of methods for sealing a glass microstructure assembly comprise providing one or more side retainer members on a base plate adjacent the glass microstructure assembly, the side retainer members having a height less than an uncompressed height defined by the glass microstructure assembly. The methods also comprise compressing the glass microstructure assembly via a load bearing top plate in intimate contact with the top glass layer while heating the glass microstructure assembly and the top plate to a glass sealing temperature, the glass sealing temperature being a temperature sufficient to make glass viscous, wherein the glass microstructure assembly is compressed until the load bearing top plate contacts the side retainer members, and wherein the lower surface of the top plate maintains adhesion to the upper surface of the top glass layer at the glass sealing temperature while the load bearing plate is supported by the side retainer members.
摘要翻译：用于密封玻璃微结构组件的方法的实施例包括在邻近玻璃微结构组件的基板上提供一个或多个侧面保持器构件，侧面保持构件的高度小于由玻璃微结构组件限定的未压缩高度。所述方法还包括通过与顶部玻璃层紧密接触的承载顶板压缩玻璃微结构组件，同时将玻璃微结构组件和顶板加热至玻璃密封温度，玻璃密封温度为足以制备玻璃的温度粘性，其中玻璃微结构组件被压缩直到承载顶板接触侧保持器构件，并且其中顶板的下表面在玻璃密封温度下保持与顶部玻璃层的上表面的粘附，而承载板由侧保持构件支撑。

8. 发明申请

US20160332873A1 DEVICES WITH THINNED WAFER 审中-公开
公开(公告)号：US20160332873A1
公开(公告)日：2016-11-17
申请号：US15223794
申请日：2016-07-29
申请人： Infineon Technologies AG
发明人： Andre Brockmeier , Christian Kalousek , Katharina Maier , Peter Zorn , Kai-Alexander Schreiber , Francesco Solazzi
IPC分类号： B81C1/00 , B81C99/00
CPC分类号： B81C1/00619 , B32B37/0046 , B32B38/08 , B32B38/10 , B32B2457/14 , B81B7/008 , B81C1/0015 , B81C1/00238 , B81C1/00357 , B81C1/00492 , B81C99/0005 , B81C99/001 , B81C2201/0111 , B81C2201/0136 , B81C2201/014 , B81C2201/053 , B81C2203/0109 , B81C2203/031 , B81C2203/0735 , B81C2900/00 , Y10T156/15
摘要： Methods, apparatuses and devices are described where a main wafer is irreversibly bonded to a carrier wafer and thinned to reduce a thickness of the main wafer, for example down to a thickness of 300 μm or below.

9. 发明申请

US20160318757A1 STRUCTURE TO REDUCE BACKSIDE SILICON DAMAGE 有权
标题翻译：结构减少背面的硅损坏
公开(公告)号：US20160318757A1
公开(公告)日：2016-11-03
申请号：US14699094
申请日：2015-04-29
申请人： Taiwan Semiconductor Manufacturing Co., Ltd.
发明人： Chung-Yen Chou , Chih-Jen Chan , Chia-Shiung Tsai , Ru-Liang Lee , Yuan-Chih Hsieh
IPC分类号： B81C1/00 , B81B7/00
CPC分类号： B81C1/00595 , B81B7/007 , B81B2201/0235 , B81B2201/0242 , B81B2201/0264 , B81B2201/0271 , B81B2201/0292 , B81B2203/0109 , B81C1/00357 , B81C1/00801 , B81C2201/0132
摘要： A method of forming an IC (integrated circuit) device is provided. The method includes receiving a first wafer including a first substrate and including a plasma-reflecting layer disposed on an upper surface thereof. The plasma-reflecting layer is configured to reflect a plasma therefrom. A dielectric protection layer is formed on a lower surface of a second wafer, wherein the second wafer includes a second substrate. The second wafer is bonded to the first wafer, such that a cavity is formed between the plasma-reflecting layer and the dielectric protection layer. An etch process is performed with the plasma to form an opening extending from an upper surface of the second wafer and through the dielectric protection layer into the cavity. A resulting structure of the above method is also provided.
摘要翻译：提供一种形成IC（集成电路）装置的方法。该方法包括接收包括第一基板的第一晶片，并且包括设置在其上表面上的等离子体反射层。等离子体反射层被配置为从其反射等离子体。介电保护层形成在第二晶片的下表面上，其中第二晶片包括第二基板。第二晶片被接合到第一晶片，使得在等离子体反射层和介电保护层之间形成空腔。用等离子体进行蚀刻工艺以形成从第二晶片的上表面延伸并通过介电保护层进入空腔的开口。还提供了上述方法的结果。

10. 发明申请

US20160304339A1 PRODUCTION PROCESS FOR DEVICE 有权
标题翻译：装置生产过程
公开(公告)号：US20160304339A1
公开(公告)日：2016-10-20
申请号：US15083995
申请日：2016-03-29
申请人： CANON KABUSHIKI KAISHA
发明人： Kazunori Kikuchi
IPC分类号： B81C1/00
CPC分类号： B81C1/00357 , B81B2207/07
摘要： A production process for a device in which a first substrate and a second substrate are bonded to each other with bonding surfaces thereof mutually bonded and the second substrate has a through-hole, the production process including the steps of bonding the first substrate and the second substrate to each other with the presence of a non-bonding region formed by a recessed shape portion recessed from at least one of the bonding surface of the first substrate and the bonding surface of the second substrate; and causing at least a part of a portion of the second substrate corresponding to the non-bonding region to pass through.
摘要翻译：一种其中第一基板和第二基板彼此接合的装置的制造方法，其接合面相互结合，并且第二基板具有通孔，该制造方法包括以下步骤：将第一基板和第二基板存在由从第一基板的接合表面和第二基板的接合表面中的至少一个凹陷的凹陷形状部分形成的非接合区域的存在; 并且使得与非结合区域对应的第二基板的至少一部分部分通过。

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