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    • 6. 发明授权
    • Semiconductor device fabrication using a photomask with assist features
    • 使用具有辅助功能的光掩模的半导体器件制造
    • US06421820B1
    • 2002-07-16
    • US09460034
    • 1999-12-13
    • Scott M. MansfieldLars W. LiebmannShahid ButtHenning Haffner
    • Scott M. MansfieldLars W. LiebmannShahid ButtHenning Haffner
    • G06F1750
    • G03F1/36G03F7/70441
    • A semiconductor device can be fabricated using a photomask that has been modified using an assist feature design method (see e.g., FIG. 4A) based on normalized feature spacing. Before the device can be fabricated, a layout of original shapes is designed (402). For at least some of the original shapes, the width of the shape and a distance to at least one neighboring shape are measured (404). A modified shape can then be generated by moving edges of the original shape based on the width and distance measurements (406). This modification can be performed on some or all of the original shapes (408). For each of the modified shapes, a normalized space and correct number of assist features can be computed (410). The layout is then modified by adding the correct number of assist features in a space between the modified shape and the neighboring shape (412). This modified layout can then be used in producing a photomask, which can in turn be used to produce a semiconductor device.
    • 可以使用已经基于归一化特征间隔使用辅助特征设计方法(参见例如图4A)修改的光掩模来制造半导体器件。 在可以制造设备之前,设计原始形状的布局(402)。 对于至少一些原始形状,测量形状的宽度和至少一个相邻形状的距离(404)。 然后可以通过基于宽度和距离测量来移动原始形状的边缘来生成修改的形状(406)。 可以对部分或全部原始形状执行该修改(408)。 对于每个修改的形状,可以计算归一化空间和正确数量的辅助特征(410)。 然后通过在修改的形状和相邻形状之间的空间中添加正确数量的辅助特征来修改布局(412)。 然后,该修改后的布局可用于制造光掩模,光掩模又可用于制造半导体器件。
    • 8. 发明授权
    • Mask layout formation
    • 面膜布局形成
    • US08875063B2
    • 2014-10-28
    • US12901595
    • 2010-10-11
    • Zachary BaumScott D. HalleHenning Haffner
    • Zachary BaumScott D. HalleHenning Haffner
    • G06F17/50G03F1/00G03F1/30
    • G03F1/30G03F1/0069
    • A method for forming a mask layout is described. A plurality of phase shapes are formed on either side of a critical feature of a design layout of an intergrated circuit chip having a plurality of critical features. A plurality of transition edges are identified from the edges of each phase shape. Each transition edge is parallel to critical feature. A transition space is identified as defined by one of the group including two transition edges and one transition edge. A transition polygon is formed by closing each transition space with at least one closing edge. Each transition polygon is transformed into a printing assist feature. A mask layout is formed from the printing assist features and critical features.
    • 描述了形成掩模布局的方法。 在具有多个关键特征的集成电路芯片的设计布局的关键特征的任一侧上形成多个相位形状。 从每个相位形状的边缘识别多个过渡边缘。 每个过渡边缘与关键特征平行。 识别由包括两个过渡边缘和一个过渡边缘的组之一所定义的过渡空间。 通过用至少一个关闭边缘关闭每个过渡空间来形成过渡多边形。 每个过渡多边形被转换成打印辅助功能。 从打印辅助功能和关键特征形成面罩布局。
    • 9. 发明申请
    • MASK LAYOUT FORMATION
    • 掩蔽布局形成
    • US20120089953A1
    • 2012-04-12
    • US12901595
    • 2010-10-11
    • Zachary BaumScott D. HalleHenning Haffner
    • Zachary BaumScott D. HalleHenning Haffner
    • G06F17/50
    • G03F1/30G03F1/0069
    • A method for mask layout formation including forming a plurality of phase shapes on either side of a critical feature of a design layout of an integrated circuit chip having a plurality of critical features, wherein each phase shape has an edge; identifying a plurality of transition edges from the edges, wherein each transition edge is parallel to a critical feature; identifying a transition space defined by one of a group including two transition edges, wherein the space is external to all phase shapes, and one transition edge, wherein the space is external to all phase shapes; forming a transition polygon by closing each transition space with at least one closing edge, wherein each closing edge is perpendicular to the plurality of transition edges; transforming each transition polygon into a printing assist feature; and forming a first mask layout or a second mask layout from the printing assist features and the critical features.
    • 一种用于掩模布局形成的方法,包括在具有多个关键特征的集成电路芯片的设计布局的关键特征的任一侧上形成多个相位形状,其中每个相位形状具有边缘; 从边缘识别多个过渡边缘,其中每个过渡边缘平行于关键特征; 识别由包括两个过渡边缘的组之一限定的过渡空间,其中所述空间在所有相位形状外部,以及一个过渡边缘,其中所述空间在所有相位形状外部; 通过用至少一个闭合边缘闭合每个过渡空间来形成过渡多边形,其中每个闭合边缘垂直于多个过渡边缘; 将每个过渡多边形变换为打印辅助特征; 以及从打印辅助特征和关键特征形成第一掩模布局或第二掩模布局。