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    • 5. 发明授权
    • Power semiconductor device having high breakdown voltage and method for fabricating the same
    • 具有高击穿电压的功率半导体器件及其制造方法
    • US06486512B2
    • 2002-11-26
    • US09790815
    • 2001-02-23
    • Chang-ki JeonJong-jib KimYoung-suk ChoiChang-seong ChoiMin-whan Kim
    • Chang-ki JeonJong-jib KimYoung-suk ChoiChang-seong ChoiMin-whan Kim
    • H01L2976
    • H01L29/0692H01L29/0696H01L29/7835
    • A power semiconductor device and a method for fabricating the same are provided. The power semiconductor device includes a source structure having a projected portion with a tip-shaped end portion on its center and formed so as to surround a predetermined region of right and left and upper portions of the projected portion. Two drain structures are formed in a predetermined region surrounded by the source structure. Extended drain structures are formed around the drain structures and the extended drain structures function as a channel with a field effect channel between sides of the projected portion of the source structure. Accordingly, since there are no drain structures on the tip of the projected portion of the source structure, although a radius of curvature of the tip of the projected portion is small, a decrease in a breakdown voltage of a device due to the small radius of curvature of the tip of the projected portion can be suppressed. As a result, a power semiconductor device having a small radius of curvature of the source structure and a high breakdown voltage can be provided.
    • 提供了功率半导体器件及其制造方法。 功率半导体器件包括源结构,其具有在其中心具有尖端形状的端部的突出部分并且形成为围绕突出部分的左右上部的预定区域。 在由源结构包围的预定区域中形成两个漏极结构。 在漏极结构周围形成扩展的漏极结构,并且延伸的漏极结构用作具有源结构的突出部分的侧面之间的场效应沟道的沟道。 因此,由于在源极结构的突出部分的尖端上没有漏极结构,尽管突出部分的尖端的曲率半径小,但是由于半径小的部件,器件的击穿电压降低 可以抑制突出部分的尖端的弯曲。 结果,可以提供具有较小的源结构曲率半径和高击穿电压的功率半导体器件。
    • 10. 发明授权
    • High voltage lateral DMOS transistor having low on-resistance and high breakdown voltage
    • 具有低导通电阻和高击穿电压的高电压横向DMOS晶体管
    • US06833585B2
    • 2004-12-21
    • US10120207
    • 2002-04-10
    • Min-hwan KimChang-ki JeonYoung-suk Choi
    • Min-hwan KimChang-ki JeonYoung-suk Choi
    • H01L2976
    • H01L29/7816H01L29/0634H01L29/7835
    • A high voltage lateral Double diffused Metal Oxide Semiconductor (DMOS) transistor includes a plurality of well regions of a first conductivity type formed to be spaced out within a well region of a second conductivity type between a channel region of the first conductivity type and a drain region of the second conductivity type. Most current is carried through some portions of the well region of the second conductivity type in which the well regions of the first conductivity do not appear so that the current carrying performance of the device is improved. When a bias voltage is applied to the drain region, the well region of the second conductivity type is completely depleted at other portions where the well region of the second conductivity type and the well regions of the first conductivity type alternately appear so that the breakdown voltage of the device can be increased. In addition, since the well region of the second conductivity type can be easily depleted, not only the breakdown voltage can be increased, but also the impurity concentration of the well region of the second conductivity type can be increased. Accordingly, the on-resistance of the device can be decreased.
    • 高压横向双扩散金属氧化物半导体(DMOS)晶体管包括多个第一导电类型的阱区,其形成为在第一导电类型的沟道区域和漏极之间的第二导电类型的阱区域内间隔开 第二导电类型的区域。 大多数电流通过第二导电类型的阱区的一些部分被携带,其中第一导电性的阱区不出现,从而提高了器件的载流性能。 当偏置电压施加到漏极区域时,第二导电类型的阱区域在第二导电类型的阱区域和第一导电类型的阱区域交替出现的其它部分完全耗尽,使得击穿电压 的设备可以增加。 此外,由于第二导电类型的阱区域容易耗尽,不仅可以提高击穿电压,而且能够提高第二导电型阱区的杂质浓度。 因此,可以降低器件的导通电阻。