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1. 发明授权

US08540832B2 Laminated ceramic electronic component and manufacturing method therefor 有权
标题翻译：层压陶瓷电子元件及其制造方法
公开(公告)号：US08540832B2
公开(公告)日：2013-09-24
申请号：US13004213
申请日：2011-01-11
申请人： Yosuke Hirata , Hideaki Tsuji , Nagato Omori , Hiroyuki Wada , Takashi Hiramatsu , Yoshito Saito
发明人： Yosuke Hirata , Hideaki Tsuji , Nagato Omori , Hiroyuki Wada , Takashi Hiramatsu , Yoshito Saito
IPC分类号： C03B29/00
CPC分类号： H01G4/005 , B32B18/00 , C04B35/4682 , C04B35/62685 , C04B2235/3206 , C04B2235/3215 , C04B2235/3224 , C04B2235/3236 , C04B2235/3262 , C04B2235/3418 , C04B2235/5445 , C04B2235/656 , C04B2235/6562 , C04B2235/6567 , C04B2235/6582 , C04B2235/6584 , C04B2235/6588 , C04B2235/721 , C04B2235/785 , C04B2235/786 , C04B2235/79 , C04B2237/346 , C04B2237/588 , C04B2237/704 , H01G4/012 , H01G4/12 , H01G4/1209 , H01G4/30
摘要： Changes in states giving rise to electrode breakage and ball formation are made less likely during firing step for sintering the laminated body, and the improvement in DC bias characteristics is achieved in laminated ceramic electronic components with a laminated body which has internal electrodes, even when ceramic layers and the internal electrodes are reduced in thickness. The laminated body is divided into a large grain region in which the ceramic has a relatively large grain diameter and a small grain region in which the ceramic has a relatively small grain diameter. The large grain region is located outside the small grain region, and a boundary surface between the large grain region and the small grain region is located inside the outer surface of the laminated body while surrounding a section in which the internal electrodes are present in the laminated body. In order to obtain the laminated body, a heat treatment is carried out in the firing step with a temperature profile in which the average rate of temperature increase from room temperature to the maximum temperature is 40° C./second or more.
摘要翻译：在烧结层叠体的烧成工序中，产生电极断裂和球形变化的状态的变化较少，在具有内部电极的层叠体的层叠陶瓷电子部件中，即使在陶瓷层和内部电极的厚度减小。层叠体分为陶瓷具有较大晶粒直径的大晶粒区域和陶瓷具有较小晶粒直径的小晶粒区域。大颗粒区域位于小颗粒区域外部，并且大颗粒区域和小颗粒区域之间的边界面位于层压体的外表面内部，同时围绕其中内部电极存在于层压体中的部分身体。为了获得层压体，在煅烧步骤中进行热处理，其中平均温度从室温升至最高温度的温度分布为40℃/秒以上。

2. 发明授权

US09183986B2 Laminated ceramic electronic component and manufacturing method therefor 有权
标题翻译：层压陶瓷电子元件及其制造方法
公开(公告)号：US09183986B2
公开(公告)日：2015-11-10
申请号：US13956616
申请日：2013-08-01
申请人： Yosuke Hirata , Hideaki Tsuji , Nagato Omori , Hiroyuki Wada , Takashi Hiramatsu , Yoshito Saito
发明人： Yosuke Hirata , Hideaki Tsuji , Nagato Omori , Hiroyuki Wada , Takashi Hiramatsu , Yoshito Saito
IPC分类号： H01G4/12 , H01G4/005 , B32B18/00 , C04B35/468 , C04B35/626 , H01G4/012 , H01G4/30
CPC分类号： H01G4/005 , B32B18/00 , C04B35/4682 , C04B35/62685 , C04B2235/3206 , C04B2235/3215 , C04B2235/3224 , C04B2235/3236 , C04B2235/3262 , C04B2235/3418 , C04B2235/5445 , C04B2235/656 , C04B2235/6562 , C04B2235/6567 , C04B2235/6582 , C04B2235/6584 , C04B2235/6588 , C04B2235/721 , C04B2235/785 , C04B2235/786 , C04B2235/79 , C04B2237/346 , C04B2237/588 , C04B2237/704 , H01G4/012 , H01G4/12 , H01G4/1209 , H01G4/30
摘要： A laminated body is divided into a large grain region and a small grain region. The large grain region is located outside the small grain region, and a boundary surface between the regions is located inside the outer surface of the laminated body while surrounding a section in which internal electrodes are present in the laminated body. To obtain the laminated body, firing is carried out with a profile in which the average rate of increase from room to the maximum temperature is 40° C./second or more.
摘要翻译：层叠体分为大颗粒区域和小颗粒区域。大颗粒区域位于小颗粒区域的外侧，并且区域之间的边界面位于层叠体的外表面内部，同时围绕层叠体中存在内部电极的部分。为了获得层叠体，以从平均室温到最高温度的平均增加率为40℃/秒以上的轮廓进行烧成。

3. 发明申请

US20110110014A1 LAMINATED CERAMIC ELECTRONIC COMPONENT AND MANUFACTURING METHOD THEREFOR 有权
标题翻译：层压陶瓷电子元件及其制造方法
公开(公告)号：US20110110014A1
公开(公告)日：2011-05-12
申请号：US13004213
申请日：2011-01-11
申请人： Yosuke Hirata , Hideaki Tsuji , Nagato Omori , Hiroyuki Wada , Takashi Hiramatsu , Yoshito Saito
发明人： Yosuke Hirata , Hideaki Tsuji , Nagato Omori , Hiroyuki Wada , Takashi Hiramatsu , Yoshito Saito
IPC分类号： H01G4/30 , C04B33/32 , B32B18/00
CPC分类号： H01G4/005 , B32B18/00 , C04B35/4682 , C04B35/62685 , C04B2235/3206 , C04B2235/3215 , C04B2235/3224 , C04B2235/3236 , C04B2235/3262 , C04B2235/3418 , C04B2235/5445 , C04B2235/656 , C04B2235/6562 , C04B2235/6567 , C04B2235/6582 , C04B2235/6584 , C04B2235/6588 , C04B2235/721 , C04B2235/785 , C04B2235/786 , C04B2235/79 , C04B2237/346 , C04B2237/588 , C04B2237/704 , H01G4/012 , H01G4/12 , H01G4/1209 , H01G4/30
摘要： Changes in states giving rise to electrode breakage and ball formation are made less likely during firing step for sintering the laminated body, and the improvement in DC bias characteristics is achieved in laminated ceramic electronic components with a laminated body which has internal electrodes, even when ceramic layers and the internal electrodes are reduced in thickness. The laminated body is divided into a large grain region in which the ceramic has a relatively large grain diameter and a small grain region in which the ceramic has a relatively small grain diameter. The large grain region is located outside the small grain region, and a boundary surface between the large grain region and the small grain region is located inside the outer surface of the laminated body while surrounding a section in which the internal electrodes are present in the laminated body. In order to obtain the laminated body, a heat treatment is carried out in the firing step with a temperature profile in which the average rate of temperature increase from room temperature to the maximum temperature is 40° C./second or more.
摘要翻译：在烧结层叠体的烧成工序中，产生电极断裂和球形变化的状态的变化较少，在具有内部电极的层叠体的层叠陶瓷电子部件中，即使在陶瓷层和内部电极的厚度减小。层叠体分为陶瓷具有较大晶粒直径的大晶粒区域和陶瓷具有较小晶粒直径的小晶粒区域。大颗粒区域位于小颗粒区域外部，并且大颗粒区域和小颗粒区域之间的边界面位于层压体的外表面内部，同时围绕其中内部电极存在于层压体中的部分身体。为了获得层压体，在煅烧步骤中进行热处理，其中平均温度从室温升至最高温度的温度分布为40℃/秒以上。

4. 发明授权

US06489257B1 Dielectric ceramic material and monolithic ceramic electronic element 有权
标题翻译：介电陶瓷材料和单片陶瓷电子元件
公开(公告)号：US06489257B1
公开(公告)日：2002-12-03
申请号：US09642194
申请日：2000-08-18
申请人： Takashi Hiramatsu , Jun Ikeda , Hiroyuki Wada , Yukio Hamaji
发明人： Takashi Hiramatsu , Jun Ikeda , Hiroyuki Wada , Yukio Hamaji
IPC分类号： C04B35468
CPC分类号： H01G4/1227
摘要： A dielectric ceramic material containing BaTiO3 as a primary component and a rare earth element as an additional component, wherein the material satisfies the relation 0.7≦M/N so as to make the density of the rare earth metal uniform between crystal grains, and the material satisfies the relation 0.8≦L/M so as to make the density of the rare earth metal uniform in a crystal grain. In these relations, M represents the number of crystal grains satisfying the relation 0.5≦Di/D; N represents the number of crystal grains constituting the ceramic material; and L represents the number of crystal grains satisfying the relations 0.5≦Di/D and Si/Di≦0.3, wherein Di represents the mean density of the rare earth element in an arbitrary crystal grain i, D represents the mean density of the rare earth element in the entirety of the ceramic material, and Si represents the standard deviation of the density of the rare earth element in the crystal grain i.
摘要翻译：以BaTiO 3为主成分的电介质陶瓷材料和作为附加成分的稀土元素，其中该材料满足关系0.7 <= M / N，以使稀土金属的密度在晶粒之间均匀，而材料满足0.8 <= L / M的关系，以使稀土金属的密度在晶粒中均匀。在这些关系中，M表示满足0.5 <= Di / D的关系的晶粒的数量; N表示构成陶瓷材料的晶粒数; L表示满足0.5 <= Di / D和Si / Di <= 0.3的关系的晶粒数，其中Di表示任意晶粒i中稀土元素的平均密度，D表示稀土元素在整个陶瓷材料中，Si表示稀土元素在晶粒i中的密度的标准偏差。

5. 发明申请

US20070142210A1 Dielectric ceramic and monolithic ceramic capacitor 有权
公开(公告)号：US20070142210A1
公开(公告)日：2007-06-21
申请号：US11657449
申请日：2007-01-25
申请人： Kazuo Muto , Tomoyuki Nakamura , Akira Kato , Harunobu Sano , Takehisa Sasabayashi , Takashi Hiramatsu
发明人： Kazuo Muto , Tomoyuki Nakamura , Akira Kato , Harunobu Sano , Takehisa Sasabayashi , Takashi Hiramatsu
IPC分类号： C04B35/468
CPC分类号： C04B35/49 , B32B2311/12 , B32B2311/22 , C04B35/4682 , C04B35/62665 , C04B35/6303 , C04B2235/3201 , C04B2235/3203 , C04B2235/3205 , C04B2235/3206 , C04B2235/3208 , C04B2235/3213 , C04B2235/3215 , C04B2235/3217 , C04B2235/3224 , C04B2235/3225 , C04B2235/3227 , C04B2235/3229 , C04B2235/3232 , C04B2235/3239 , C04B2235/3241 , C04B2235/3244 , C04B2235/3251 , C04B2235/3256 , C04B2235/3258 , C04B2235/3262 , C04B2235/3272 , C04B2235/3275 , C04B2235/3279 , C04B2235/3281 , C04B2235/3284 , C04B2235/3286 , C04B2235/3289 , C04B2235/3291 , C04B2235/3409 , C04B2235/3418 , C04B2235/6025 , C04B2235/656 , C04B2235/6582 , C04B2235/6584 , C04B2235/6588 , C04B2235/768 , C04B2235/785 , C04B2235/96 , C04B2237/346 , C04B2237/348 , C04B2237/405 , C04B2237/407 , H01B3/12 , H01G4/1227 , H01G4/30
摘要： The dielectric ceramic has a composition represented by general formula 100(Ba1-x-ySrxCay)m(Ti1-zZrz)O3+aBaO+bR2O3+cMgO+dMnO+eCuO+fV2O5+gXuOv (where R is a rare-earth element such as La, Ce or Pr; and XuOv is an oxide group including at least Si); and 0≦x≦0.05, 0≦y≦0.08 (preferably 0.02≦y≦0.08), 0≦z≦0.05, 0.990≦m, 100.2≦(100 m+a)≦102, 0.05≦b≦0.5, 0.05≦c≦2, 0.05≦d≦1.3, 0.1≦e≦1.0, 0.02≦f≦0.15, and 0.2≦g≦2. With this composition, a monolithic ceramic capacitor retaining good dielectric characteristics and temperature characteristics even if a high field strength voltage is applied by further thinning the dielectric layers thereof and having excellent reliability achieving good isolating property, dielectric strength, and high-temperature load life is obtained.

6. 发明授权

US06383323B1 Dielectric ceramic, method for producing the same, laminated ceramic electronic element, and method for producing the same 有权
标题翻译：介电陶瓷，其制造方法，层叠陶瓷电子元件及其制造方法
公开(公告)号：US06383323B1
公开(公告)日：2002-05-07
申请号：US09935611
申请日：2001-08-23
申请人： Nobuyuki Wada , Takashi Hiramatsu , Jun Ikeda , Yukio Hamaji
发明人： Nobuyuki Wada , Takashi Hiramatsu , Jun Ikeda , Yukio Hamaji
IPC分类号： B32B3126
CPC分类号： H01G4/1227 , C04B35/4682
摘要： A dielectric ceramic which exhibits small variation in dielectric constant, allows use of a base metal, can be fired in a reducing atmosphere and which is suitable for constituting a dielectric ceramic layer for, e.g., a laminated ceramic capacitor is obtained by firing barium titanate powder in which the c-axis/a-axis ratio in the perovskite structure is about 1.000 or more and less than about 1.003 and the amount of OH groups in the crystal lattice is about 2.0 wt. % or less. The barium titanate powder starting material preferably has a maximum particle size of about 0.3 &mgr;m or less and an average particle size of about 0.05-0.15 &mgr;m. Each particle of the barium titanate powder preferably comprises a low-crystallinity portion and a high-crystallinity portion, the diameter of the low-crystallinity portion being about 0.5 times or more the particle size of the powder. When sintered, the powder satisfies the ratio of (average grain size of the fired dielectric ceramic)/(average particle size of barium titanate powder starting material), R, of about 0.90-1.2, to thereby suppress considerable grain growth. A laminated ceramic electronic element including a laminate of a plurality of layers of the above-mentioned dielectric ceramic, as well as a method for producing the same, is described.
摘要翻译：介电常数变化小的电介质陶瓷可以使用贱金属，可在还原气氛中烧成，适用于构成电介质陶瓷层，例如通过烧结钛酸钡粉末得到层压陶瓷电容器其中钙钛矿结构中的c轴/ a轴比为约1.000以上且小于约1.003，并且晶格中的OH基的量为约2.0重量％。％或更少。钛酸钡粉末原料优选具有约0.3μm或更小的最大粒度和约0.05-0.15μm的平均粒度。钛酸钡粉末的每个颗粒优选包含低结晶度部分和高结晶度部分，低结晶度部分的直径为粉末粒径的约0.5倍以上。当烧结时，粉末满足（烧结的电介质陶瓷的平均粒径）/（平均粒径的钛酸钡粉末原料）的比例R为约0.90-1.2，从而抑制相当大的晶粒生长。描述了包括上述介电陶瓷的多层的叠层体的层压陶瓷电子元件及其制造方法。

7. 发明授权

US06225250B1 Dielectric ceramic composition 有权
标题翻译：介电陶瓷组合物
公开(公告)号：US06225250B1
公开(公告)日：2001-05-01
申请号：US09251663
申请日：1999-02-17
申请人： Nobuyuki Wada , Jun Ikeda , Takashi Hiramatsu , Yukio Hamaji
发明人： Nobuyuki Wada , Jun Ikeda , Takashi Hiramatsu , Yukio Hamaji
IPC分类号： C04B35468
CPC分类号： H01G4/1227 , H01G4/30
摘要： The present invention provides a dielectric ceramic composition whose electrostatic capacity has an excellently low temperature dependence; which can be fired in a reducing atmosphere; and which is advantageously used in a laminated ceramic capacitor having an internal electrode formed of a base metal such as nickel or nickel alloy. The dielectric ceramic composition is represented by the following formula: {Ba1−xCaxO}mTiO2+&agr;MgO+&bgr;MnO, wherein 0.001≦&agr;≦0.05; 0.001≦&bgr;≦0.025; 1.000
摘要翻译：本发明提供一种介电陶瓷组合物，其静电容量具有优异的低温依赖性; 可在还原气氛中燃烧; 并且其有利地用于具有由诸如镍或镍合金的贱金属形成的内部电极的层叠陶瓷电容器中。介电陶瓷组合物由下式表示：其中

8. 发明申请

US20080250379A1 LOGIC CIRCUIT SYNTHESIS DEVICE 审中-公开
标题翻译：逻辑电路合成器件
公开(公告)号：US20080250379A1
公开(公告)日：2008-10-09
申请号：US11947417
申请日：2007-11-29
申请人： Shoji TAKAOKA , Atsushi Yamamoto , Tomohiro Tsuda , Takashi Hiramatsu
发明人： Shoji TAKAOKA , Atsushi Yamamoto , Tomohiro Tsuda , Takashi Hiramatsu
IPC分类号： G06F17/50
CPC分类号： G06F17/505
摘要： In a logic circuit synthesis device, a library of cell preliminarily stores a condition concerning a property that should be satisfied by the net having the property. The logic circuit synthesis device selects, from a list of nets, a net that has a predetermined property. the logic circuit synthesis device performs logic synthesis in accordance with the condition stored in the library, for the selected net.
摘要翻译：在逻辑电路合成装置中，单元库预先存储有关具有该属性的网应满足的属性的条件。逻辑电路合成装置从网络列表中选择具有预定属性的网络。逻辑电路合成装置根据存储在库中的条件对所选网络进行逻辑合成。

9. 发明申请

US20070236865A1 Dielectric ceramic and multilayer ceramic capacitor 有权
标题翻译：介质陶瓷和多层陶瓷电容器
公开(公告)号：US20070236865A1
公开(公告)日：2007-10-11
申请号：US11806501
申请日：2007-05-31
申请人： Toshihiro Okamatsu , Takashi Hiramatsu , Harunobu Sano
发明人： Toshihiro Okamatsu , Takashi Hiramatsu , Harunobu Sano
IPC分类号： H01G4/06
CPC分类号： C04B35/4682 , B32B2311/22 , C04B35/49 , C04B35/6262 , C04B35/62665 , C04B35/62685 , C04B2235/3206 , C04B2235/3208 , C04B2235/3213 , C04B2235/3215 , C04B2235/3224 , C04B2235/3225 , C04B2235/3232 , C04B2235/3244 , C04B2235/3262 , C04B2235/3267 , C04B2235/3281 , C04B2235/3418 , C04B2235/5445 , C04B2235/656 , C04B2235/6582 , C04B2235/6584 , C04B2235/6588 , C04B2235/72 , C04B2235/782 , C04B2235/786 , C04B2235/85 , C04B2235/96 , C04B2237/346 , C04B2237/348 , C04B2237/405 , H01B3/12 , H01G4/1227
摘要： A dielectric ceramic is provided having a high relative dielectric constant, and in the case in which it is used for a multilayer ceramic capacitor, high insulating properties and superior reliability can be obtained even when the thickness of a dielectric ceramic layer is decreased. The dielectric ceramic used for forming the dielectric ceramic layer of a multilayer ceramic capacitor has a composition represented by 100 (Ba1−w−x−mCawSrxGdm)k(Ti1−y−z−nZryHfzMgn)O3+a+pMnO2+qSiO2+rCuO, in which 0.995≦k≦1.010, 0≦w
摘要翻译：提供具有高相对介电常数的电介质陶瓷，并且在其用于多层陶瓷电容器的情况下，即使当电介质陶瓷层的厚度减小时，也可以获得高绝缘性和优异的可靠性。用于形成多层陶瓷电容器的电介质陶瓷层的电介质陶瓷具有由100（Ba x 1-w x m Ca x Sr Sr x x）（Ti 1-z z）Zr（CH 3）m H z 0 3 + a + pMnO 2 + qSiO 2 + rCuO，其中0.995 <= k < = 1.010,0 <= w <0.04,0 <= x <= 0.04,0 <= y <= 0.10,0 <= z <= 0.05,0.015 <= m <= 0.035,0.015 <= n <= 0.035， 0.01 <= p <= 1.0,0.5 <= q <= 2.5，0.01 <= r <= 5.0。另外，a是相对于3的偏差选择的值，使得主要部件是电中性的。

10. 发明申请

US20060001434A1 Method of inspecting actual speed of semiconductor integrated circuit 审中-公开
标题翻译：检查半导体集成电路实际速度的方法
公开(公告)号：US20060001434A1
公开(公告)日：2006-01-05
申请号：US11128331
申请日：2005-05-13
申请人： Takashi Hiramatsu , Kinya Daio , Akiko Fukuda
发明人： Takashi Hiramatsu , Kinya Daio , Akiko Fukuda
IPC分类号： G01R27/00
CPC分类号： G01R31/318577
摘要： It is an object to comprehensively carry out an actual speed inspection without reducing an operating speed in a normal mode in a scan test for a semiconductor integrated circuit. In order to operate a circuit at a proper frequency in a shift operation, to operate the circuit in an actual operation time in a capture operation, and to effectively implement different duty ratios from each other for a group of circuits having different operating frequency characteristics in the capture operation, the duty ratios of respective clocks are changed in a shift operation cycle immediately before a capture operation cycle and the respective clocks are set to have an equal duty ratio in a capture operation cycle. In that case, an NT signal control circuit for generating an NT signal to specify the switching of the shift operation and the capture operation is provided in a semiconductor integrated circuit to execute an operation in response to the NT signal within one clock cycle.
摘要翻译：在半导体集成电路的扫描试验中，不会降低正常模式下的运行速度，而是全面地进行实际的速度检查。为了在移位操作中以适当的频率操作电路，在捕获操作中的实际操作时间内操作电路，并且为具有不同工作频率特性的一组电路有效地实现彼此不同的占空比在捕获操作周期之前的移位操作周期中，各个时钟的占空比被改变，并且在捕获操作周期中各个时钟被设置为具有相等的占空比。在这种情况下，在半导体集成电路中提供用于产生用于指定移位操作和捕捉操作的切换的NT信号的NT信号控制电路，以在一个时钟周期内响应于NT信号执行操作。

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