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    • 3. 发明授权
    • Semiconductor device and method of manufacturing the same
    • 半导体装置及其制造方法
    • US08062947B2
    • 2011-11-22
    • US12338345
    • 2008-12-18
    • Seiichi Iwasa
    • Seiichi Iwasa
    • H01L29/72
    • H01L21/823418H01L21/823412H01L21/823437H01L21/823456H01L21/823475H01L29/66636H01L29/66659H01L29/7834H01L29/7835H01L29/7848
    • The present invention relates to a method of manufacturing a semiconductor device having a shared contact for connection between a source/drain region and a gate electrode. After formation of a gate electrode via a gate insulating film on a semiconductor substrate, a top surface of the substrate is covered with a cover film. After removal of the cover film from at least one of sidewall surface of the gate electrode and a part of the top surface of the substrate adjacent to the sidewall surface, a semiconductor layer is epitaxially grown on a top surface of an exposed substrate to electrically connect the substrate and the at least one sidewall surface of the gate electrode. Then, a source/drain region is formed in a top surface part of the substrate or the semiconductor layer using the gate electrode as a mask.
    • 本发明涉及一种制造半导体器件的方法,该半导体器件具有用于在源/漏区和栅电极之间连接的共用接触。 在通过半导体衬底上的栅极绝缘膜形成栅极电极之后,用覆盖膜覆盖衬底的顶表面。 在从栅电极的侧壁表面和与侧壁表面相邻的衬底的顶表面的一部分中的至少一个去除覆盖膜之后,在暴露的衬底的顶表面上外延生长半导体层以电连接 基板和栅电极的至少一个侧壁表面。 然后,使用栅极电极作为掩模,在衬底或半导体层的顶表面部分中形成源极/漏极区域。