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1. 发明授权

US5100234A Method and apparatus for aligning two objects, and method and apparatus for providing a desired gap between two objects 失效
标题翻译：用于对准两个对象的方法和装置，以及用于在两个对象之间提供所希望的差距的方法和装置
公开(公告)号：US5100234A
公开(公告)日：1992-03-31
申请号：US538186
申请日：1990-06-13
申请人： Yoriyuki Ishibashi , Ryoichi Hirano , Kyoji Yamashita
发明人： Yoriyuki Ishibashi , Ryoichi Hirano , Kyoji Yamashita
IPC分类号： G03F9/00
CPC分类号： G03F9/7049 , G03F9/7023
摘要： A first diffraction grating is formed on a mask, and a second diffraction grating is formed on a wafer. Two light beams having slightly different frequencies interfere with each other and are diffracted as they travel through the first diffraction grating, are reflected by the second diffraction grating, and again pass through the first diffraction grating. As a result, they change into thrice diffracted light beams. The diffracted light beams are combined into a detection light beam which has a phase shift .phi..sub.A representing the displacement between the wafer and the mask, or a phase shift .phi..sub.G representing the gap between the wafer and the mask. The detection light beam is converted into a detection signal. The phase difference between the detection signal and a reference signal having no phase shifts are calculated, thus determining phase shift .phi..sub.A or .phi..sub.G. The displacement or the gap is determined from the phase shift. In accordance with the displacement or the gap, the wafer and the mask are aligned to each other, or the gap between them is adjusted to a desired value. Since the detection signal is generated from diffracted light beams, its S/N ratio is sufficiently great. Therefore, the displacement or the gap is determined with high precision. In addition, it is possible with the invention to perform the aligning of the wafer and the mask and the adjusting of the gap therebetween, simultaneously. Further, the incident light may be either circularly polarized light or non-polarized light.

2. 发明授权

US4988197A Method and apparatus for aligning two objects, and method and apparatus for providing a desired gap between two objects 失效
标题翻译：用于对准两个物体的方法和装置，以及用于在两个物体之间提供期望间隙的方法和装置
公开(公告)号：US4988197A
公开(公告)日：1991-01-29
申请号：US291276
申请日：1988-12-28
申请人： Yoriyuki Ishibashi , Ryoichi Hirano , Kyoji Yamashita
发明人： Yoriyuki Ishibashi , Ryoichi Hirano , Kyoji Yamashita
IPC分类号： G03F9/00
CPC分类号： G03F9/7049 , G03F9/7023
摘要： A first diffraction grating is formed on a mask, and a second diffraction grating is formed on a wafer. Two light beams having slightly different frequencies interfere with each other and are diffracted as they travel through the first diffraction grating, are reflected by the second diffraction grating, and again pass through the first diffraction grating. As a result, they change into thrice diffracted light beams. The diffracted light beams are combined into a detection light beam which has a phase shift .phi..sub.A representing the displacement between the wafer and the mask, or a phase shift .phi..sub.G representing the gap between the wafer and the mask. The detection light beam is converted into a detection signal. The phase difference between the detection signal and a reference signal having no phase shifts are calculated, thus determining phase shift .phi..sub.A or .phi..sub.G. The displacement or the gap is determined from the phase shift. In accordance with the displacement or the gap, the wafer and the mask are aligned to each other, or the gap between them is adjusted to a desired value. Since the detection signal is generated from diffracted light beams, its S/N ratio is sufficiently great. Therefore, the displacement or the gap is determined with high precision. In addition, it is possible with the invention to perform the aligning of the wafer and the mask and the adjusting of the gap therebetween, simultaneously.

3. 发明授权

US08233698B2 Pattern inspection apparatus, corrected image generation method, and computer-readable recording medium storing program 有权
标题翻译：图案检查装置，校正图像生成方法和计算机可读记录介质存储程序
公开(公告)号：US08233698B2
公开(公告)日：2012-07-31
申请号：US11971550
申请日：2008-01-09
申请人： Kyoji Yamashita
发明人： Kyoji Yamashita
IPC分类号： G06K9/00
CPC分类号： G06K9/32 , G01N21/95607 , G03F1/84 , G06T7/001 , G06T7/32 , G06T2207/10056 , G06T2207/30148
摘要： A pattern inspection apparatus includes a first unit configured to acquire an optical image of a target workpiece to be inspected, a second unit configured to generate a reference image to be compared, a third unit configured, by using a mathematical model in which a parallel shift amount, an expansion and contraction error coefficient, a rotation error coefficient, a gray-level offset and an image transmission loss ratio are parameters, to calculate each of the parameters by a least-squares method, a forth unit configured to generate a corrected image by shifting a position of the reference image by a displacement amount, based on the each of the parameters, and a fifth unit configured to compare the corrected image with the optical image.
摘要翻译：图案检查装置包括被配置为获取要检查的目标工件的光学图像的第一单元，被配置为生成要比较的参考图像的第二单元，第三单元，其被配置为使用数学模型，其中并行移位数量，膨胀和收缩误差系数，旋转误差系数，灰度偏移和图像传输损耗比是参数，以最小二乘法计算每个参数;第四单元，被配置为生成校正图像通过基于每个参数移动参考图像的位置位移量，以及被配置为将校正图像与光学图像进行比较的第五单元。

4. 发明授权

US07421109B2 Pattern inspection apparatus 失效
标题翻译：图案检验仪
公开(公告)号：US07421109B2
公开(公告)日：2008-09-02
申请号：US10642760
申请日：2003-08-19
申请人： Hideo Tsuchiya , Kyoji Yamashita , Toshiyuki Watanabe , Ikunao Isomura , Toru Tojo , Yasushi Sanada
发明人： Hideo Tsuchiya , Kyoji Yamashita , Toshiyuki Watanabe , Ikunao Isomura , Toru Tojo , Yasushi Sanada
IPC分类号： G06K9/00 , G01B11/00 , G01J1/10
CPC分类号： G06T7/0004 , G06T2207/30148
摘要： A pattern inspecting method, comprising preparing a sample having a first and a second inspection regions and an imaging device having a plurality of pixels, scanning the first inspection region to a first direction using the imaging device to obtain a first measurement pattern representing at least parts of the first inspection region, scanning the second inspection region to the first direction using the imaging device to obtain a second measurement pattern representing at least parts of the second inspection region, comparing the first measurement pattern and the second measurement pattern with each other to determine presence or absence of a defect formed on the sample, and controlling a scanning condition for scanning a pattern of the second inspection region by the imaging device so as to keep the same with the scanning condition when the pattern of the first inspection region is scanned by the imaging device.
摘要翻译：一种图案检查方法，包括准备具有第一和第二检查区域的样本和具有多个像素的成像装置，使用成像装置将第一检查区域扫描到第一方向，以获得表示至少部分的第一测量图案使用所述成像装置将所述第二检查区域扫描到所述第一方向，以获得表示所述第二检查区域的至少一部分的第二测量图案，将所述第一测量图案和所述第二测量图案彼此进行比较，以确定存在或不存在形成在样品上的缺陷，以及控制用于通过成像装置扫描第二检查区域的图案的扫描条件，以便当第一检查区域的图案被扫描时与扫描条件保持相同成像装置。

5. 发明申请

US20080142898A1 Semiconductor integrated circuit 有权
标题翻译：半导体集成电路
公开(公告)号：US20080142898A1
公开(公告)日：2008-06-19
申请号：US11979669
申请日：2007-11-07
申请人： Shinji Watanabe , Daisaku Ikoma , Kyoji Yamashita , Katsuhiro Ootani
发明人： Shinji Watanabe , Daisaku Ikoma , Kyoji Yamashita , Katsuhiro Ootani
IPC分类号： H01L27/092
CPC分类号： H01L27/0207 , H01L21/82385 , H01L21/823892 , H01L27/0922
摘要： An integrated circuit includes: a first well of a first conductivity type; a second well of a second conductivity type coming into contact with the first well at a well boundary extending in a gate length direction; a first transistor having a first active region of the second conductivity type provided in the first well; and a second transistor which has a second active region of the second conductivity type provided in the first well and differing from the first active region in length in a gate width direction. The center location of the first active region in the gate width direction is aligned with the center location of the second active region in the gate width direction with reference to the well boundary.
摘要翻译：集成电路包括：第一导电类型的第一阱; 第二导电类型的第二阱在沿栅极长度方向延伸的阱边界处与第一阱接触; 第一晶体管，具有设置在第一阱中的第二导电类型的第一有源区; 以及第二晶体管，其具有设置在第一阱中的第二导电类型的第二有源区，并且与栅极宽度方向上的第一有源区的长度不同。第一有源区域在栅极宽度方向上的中心位置与第二有源区域相对于阱边界在栅极宽度方向上的中心位置对准。

6. 发明申请

US20080042214A1 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US20080042214A1
公开(公告)日：2008-02-21
申请号：US11892053
申请日：2007-08-20
申请人： Daisaku Ikoma , Atsuhiro Kajiya , Katsuhiro Ootani , Kyoji Yamashita
发明人： Daisaku Ikoma , Atsuhiro Kajiya , Katsuhiro Ootani , Kyoji Yamashita
IPC分类号： H01L27/092 , H01L29/78
CPC分类号： H01L21/76895 , H01L21/823475 , H01L27/0207
摘要： A semiconductor device includes a semiconductor substrate; a diffusion region which is formed in the semiconductor substrate and serves as a region for the formation of a MIS transistor; an element isolation region surrounding the diffusion region; at least one gate conductor film which is formed across the diffusion region and the element isolation region, includes a gate electrode part located on the diffusion region and a gate interconnect part located on the element isolation region, and has a constant dimension in the gate length direction; and an interlayer insulating film covering the gate electrode. The semiconductor device further includes a gate contact which passes through the interlayer insulating film, is connected to the gate interconnect part, and has the dimension in the gate length direction larger than the gate interconnect part.
摘要翻译：半导体器件包括半导体衬底; 扩散区，其形成在半导体衬底中并用作用于形成MIS晶体管的区域; 围绕扩散区域的元件隔离区域; 形成在扩散区域和元件隔离区域两侧的至少一个栅极导体膜包括位于扩散区域上的栅极电极部分和位于元件隔离区域上的栅极互连部件，并且栅极长度具有恒定的尺寸方向; 以及覆盖所述栅电极的层间绝缘膜。半导体器件还包括通过层间绝缘膜的栅极接触，连接到栅极互连部分，并且具有大于栅极互连部分的栅极长度方向的尺寸。

7. 发明申请

US20070100807A1 DATA SEARCHING SYSTEM, METHOD OF SYNCHRONIZING METADATA AND DATA SEARCHING APPARATUS 有权
标题翻译：数据搜索系统，同步方法和数据搜索设备
公开(公告)号：US20070100807A1
公开(公告)日：2007-05-03
申请号：US11553711
申请日：2006-10-27
申请人： Kazuko Abe , Junichi Yamamoto , Rei Yano , Masataka Yamada , Yasuhide Kurosaki , Michiyo Ikegami , Kyoji Yamashita , Kouji Gouda
发明人： Kazuko Abe , Junichi Yamamoto , Rei Yano , Masataka Yamada , Yasuhide Kurosaki , Michiyo Ikegami , Kyoji Yamashita , Kouji Gouda
IPC分类号： G06F17/30
CPC分类号： G06F17/30964 , Y10S707/99933 , Y10S707/99936 , Y10S707/99953
摘要： A data searching unit 12 of a data searching apparatus 10 obtains according to a searching request including a search condition specified by a data searching application 16, metadata which satisfy the search condition from a data storage unit 11, and instructs an external communication unit 15 to request searching of data to a data providing apparatus 20 with the same search condition.
摘要翻译：数据搜索装置10的数据搜索单元12根据包括由数据搜索应用16指定的搜索条件的搜索请求获得满足来自数据存储单元11的搜索条件的元数据，并且指示外部通信单元15 请求搜索具有相同搜索条件的数据到数据提供装置20。

8. 发明申请

US20060282249A1 Circuit simulation method and circuit simulation apparatus 审中-公开
标题翻译：电路仿真方法及电路仿真装置
公开(公告)号：US20060282249A1
公开(公告)日：2006-12-14
申请号：US11349077
申请日：2006-02-08
申请人： Daisaku Ikoma , Kyoji Yamashita , Katsuhiro Ootani
发明人： Daisaku Ikoma , Kyoji Yamashita , Katsuhiro Ootani
IPC分类号： G06F17/50
CPC分类号： G06F17/5036
摘要： In designing a semiconductor integrated circuit, circuit information used for circuit simulation is extracted from measurement values of electric characteristics of a device included in TEG and parameters included in a netlist are modified using the measurement values and simulation values. Circuit simulation is carried out using the thus modified netlist to lead to a decrease in error in the circuit simulation which is caused due to difference between design dimension and actual finished dimension, thereby preventing an increase in design margin and a yield lowering by malfunction.
摘要翻译：在设计半导体集成电路时，从包含在TEG中的设备的电特性的测量值中提取用于电路仿真的电路信息，并且使用测量值和模拟值来修改网表中包括的参数。使用如此修改的网表进行电路仿真，导致由于设计尺寸和实际成品尺寸之间的差异导致的电路仿真中的误差减小，从而防止设计裕度增加和故障产生降低。

9. 发明授权

US06982555B2 Semiconductor device 失效
标题翻译：半导体器件
公开(公告)号：US06982555B2
公开(公告)日：2006-01-03
申请号：US10777068
申请日：2004-02-13
申请人： Kyoji Yamashita , Tatsuya Kunikiyo , Tetsuya Watanabe , Toshiki Kanamoto
发明人： Kyoji Yamashita , Tatsuya Kunikiyo , Tetsuya Watanabe , Toshiki Kanamoto
IPC分类号： G01R31/08 , G01R31/28
CPC分类号： G01R31/2884 , G01R31/2853
摘要： PMISFETs and NMISFETs are placed in a capacitance measuring circuit. Each of interconnects is connected via the corresponding PMISFET through a charging voltage supply part to a power supply pad and via the corresponding NMISFET through a current sampling part to a current-monitoring pad. A current I can be measured by bringing a probe of an ammeter into contact with the current-monitoring pad.
摘要翻译： PMISFET和NMISFET放置在电容测量电路中。每个互连通过相应的PMISFET通过充电电压供应部分连接到电源焊盘，并通过相应的NMISFET通过电流采样部分连接到电流监测焊盘。可以通过将电流表的探头与电流监测板接触来测量电流。

10. 发明授权

US06894520B2 Semiconductor device and capacitance measurement method 失效
标题翻译：半导体器件和电容测量方法
公开(公告)号：US06894520B2
公开(公告)日：2005-05-17
申请号：US10355068
申请日：2003-01-31
申请人： Kyoji Yamashita , Hiroyuki Umimoto , Mutsumi Kobayashi , Katsuhiro Ohtani , Tatsuya Kunikiyo , Katsumi Eikyu
发明人： Kyoji Yamashita , Hiroyuki Umimoto , Mutsumi Kobayashi , Katsuhiro Ohtani , Tatsuya Kunikiyo , Katsumi Eikyu
IPC分类号： G01R27/26 , G01R31/27 , G01R31/28 , G01R31/312 , H01L21/66 , H01L21/822 , H01L27/04 , G01R31/26
CPC分类号： G01R31/275 , G01R31/312
摘要： A CBCM measurement device includes a PMIS transistor, an NMIS transistor, a first reference conductor section connected to a first node, a second reference conductor section, with a dummy capacitor being formed between the first and second reference conductor sections, a first test conductor section connected to a second node, and a second test conductor section, with a test capacitor being formed between the first and second test conductor sections. The transistors are turned ON/OFF by using control voltages V1 and V2, and the capacitance of a target capacitor in the test capacitor is measured based on currents flowing through the first and second nodes. The capacitance measurement precision is improved by, for example, increasing a dummy capacitance.
摘要翻译： CBCM测量装置包括PMIS晶体管，NMIS晶体管，连接到第一节点的第一参考导体部分，在第一和第二参考导体部分之间形成有虚拟电容器的第二参考导体部分，第一测试导体部分连接到第二节点和第二测试导体部分，其中测试电容器形成在第一和第二测试导体部分之间。通过使用控制电压V 1和V 2将晶体管导通/截止，并且基于流过第一和第二节点的电流来测量测试电容器中的目标电容器的电容。通过例如增加虚拟电容来提高电容测量精度。

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