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1. 发明授权

US5905277A Field-effect transistor and method of manufacturing the same 失效
标题翻译：场效应晶体管及其制造方法
公开(公告)号：US5905277A
公开(公告)日：1999-05-18
申请号：US81054
申请日：1998-05-19
申请人： Yorito Ota , Hiroyuki Masato , Shigeru Morimoto , Junko Iwanaga
发明人： Yorito Ota , Hiroyuki Masato , Shigeru Morimoto , Junko Iwanaga
IPC分类号： H01L21/285 , H01L21/335 , H01L21/338 , H01L29/10 , H01L29/812 , H01L21/328 , H01L21/336 , H01L21/72 , H01L31/109
CPC分类号： H01L29/66462 , H01L21/28593 , H01L29/1075 , H01L29/8128
摘要： A channel layer made of n-type GaAs doped with Si, a hole absorption layer made of InGaAs having a valance band higher in energy level than that of GaAs, and an undoped layer made of GaAs are formed sequentially on a semi-insulating substrate made of GaAs. A gate recess region having a pair of sidewall portions each consisting of an upper sidewall composed of the undoped layer and a lower sidewall composed of the hole absorption layer is formed on the channel region. The channel region is exposed in the gate recess region. An indent having an undercut configuration is formed in the lower sidewall of the gate recess region. A gate electrode is formed to extend over a stepped portion composed of the sidewall portion of the gate recess region closer to a drain electrode.
摘要翻译：在半绝缘性基板上依次形成由掺杂有Si的n型GaAs构成的沟道层，由InGaAs制成的空穴吸收层，其能级高于GaAs的能级，以及由GaAs构成的未掺杂层的GaAs。在通道区域上形成具有一对侧壁部分的栅极凹部区域，每个侧壁部分由由未掺杂层构成的上侧壁和由空穴吸收层组成的下侧壁组成。沟道区域在栅极凹部区域露出。具有底切构造的凹口形成在栅极凹陷区域的下侧壁中。栅极形成为在靠近漏电极的栅极凹部的侧壁部分构成的阶梯部分上延伸。

2. 发明授权

US5925903A Field-effect transistors and method of manufacturing the same 失效
标题翻译：场效应晶体管及其制造方法
公开(公告)号：US5925903A
公开(公告)日：1999-07-20
申请号：US991635
申请日：1997-12-16
申请人： Junko Iwanaga , Yorito Ota , Tadayoshi Nakatsuka , Hiroyuki Masato , Katsuhiko Kawashima
发明人： Junko Iwanaga , Yorito Ota , Tadayoshi Nakatsuka , Hiroyuki Masato , Katsuhiko Kawashima
IPC分类号： H01L21/285 , H01L21/338 , H01L29/08 , H01L29/812 , H01L29/80
CPC分类号： H01L29/66863 , H01L21/28587 , H01L29/0891 , H01L29/8128
摘要： A conductive layer made of n-type GaAs is formed on a semi-insulating substrate made of GaAs. A pair of contact regions made of n.sup.+ -type GaAs are formed on the conductive layer. A source electrode is formed on the left-hand contact region, while a drain electrode is formed on the right-hand contact region. A gate recessed region is formed in the region of the conductive layer located between the pair of contact regions so that a gate electrode is formed on the gate recessed region. A depressed portion is formed in the gate recessed region of the conductive layer. The wall face of the depressed portion closer to the gate electrode is flush with or protruding from the side face of the gate electrode facing the drain electrode.
摘要翻译：在由GaAs制成的半绝缘衬底上形成由n型GaAs制成的导电层。在导电层上形成由n +型GaAs构成的一对接触区域。源极电极形成在左侧接触区域上，而漏电极形成在右侧接触区域上。在位于一对接触区域之间的导电层的区域中形成栅极凹陷区域，使得栅极电极形成在栅极凹入区域上。凹陷部形成在导电层的栅极凹陷区域中。靠近栅电极的凹陷部分的壁面与面对漏电极的栅电极的侧面齐平或突出。

3. 发明授权

US06710380B2 Diode, method for fabricating the diode, and coplanar waveguide 失效
标题翻译：二极管，制造二极管的方法和共面波导
公开(公告)号：US06710380B2
公开(公告)日：2004-03-23
申请号：US10147806
申请日：2002-05-20
申请人： Junko Iwanaga , Yorito Ota , Mitsuru Tanabe
发明人： Junko Iwanaga , Yorito Ota , Mitsuru Tanabe
IPC分类号： H01L31109
CPC分类号： H01L29/868
摘要： The diode of the present invention includes: a cathode electrode and an anode electrode that are disposed on a semiconductor substrate and are spaced apart from each other; and a shielding metal member placed between the cathode and anode electrodes.
摘要翻译：本发明的二极管包括：阴极电极和阳极电极，其设置在半导体衬底上并彼此间隔开; 以及放置在阴极和阳极之间的屏蔽金属构件。

4. 发明授权

US06417527B1 Diode, method for fabricating the diode, and coplanar waveguide 失效
标题翻译：二极管，制造二极管的方法和共面波导
公开(公告)号：US06417527B1
公开(公告)日：2002-07-09
申请号：US09686909
申请日：2000-10-12
申请人： Junko Iwanaga , Yorito Ota , Mitsuru Tanabe
发明人： Junko Iwanaga , Yorito Ota , Mitsuru Tanabe
IPC分类号： H01L29861
CPC分类号： H01L29/868
摘要： The diode of the present invention includes: a cathode electrode and an anode electrode that are disposed on a semi-conductor substrate and are spaced apart from each other; and a shielding metal member placed between the cathode and anode electrodes.
摘要翻译：本发明的二极管包括：阴极电极和阳极电极，其设置在半导体基板上并彼此间隔开; 以及放置在阴极和阳极之间的屏蔽金属构件。

5. 发明授权

US5901042A Package and semiconductor device 失效
标题翻译：封装和半导体器件
公开(公告)号：US5901042A
公开(公告)日：1999-05-04
申请号：US62752
申请日：1998-04-20
申请人： Yorito Ota , Masahiro Maeda , Shigeru Morimoto , Morio Nakamura
发明人： Yorito Ota , Masahiro Maeda , Shigeru Morimoto , Morio Nakamura
IPC分类号： H01L23/12 , H01L23/36 , H01L23/66 , H01L25/16 , H05K7/20
CPC分类号： H01L25/165 , H01L23/36 , H01L23/66 , H01L24/49 , H01L25/162 , H01L2223/6644 , H01L2224/48091 , H01L2224/48237 , H01L2224/49175 , H01L24/48 , H01L2924/00014 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01029 , H01L2924/01031 , H01L2924/01033 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/10329 , H01L2924/13063 , H01L2924/15153 , H01L2924/1517 , H01L2924/3011 , H01L2924/30111
摘要： A semiconductor chip is mounted on the central portion of a metal heat radiator. A pair of metal projecting members are provided on the heat radiator externally of the pair of opposed sides of the semiconductor chip to extend therealong beyond both ends of the semiconductor chip. A circuit board is mounted on the side of each of the pair of projecting members opposed to the semiconductor chip. The top surface of the semiconductor chip and the top surface of each of the projecting members are connected to each other by a third bonding wire for grounding.
摘要翻译：半导体芯片安装在金属散热器的中心部分上。一对金属突出构件设置在半导体芯片的一对相对侧的外部的散热器上，以延伸超过半导体芯片的两端。电路板安装在与半导体芯片相对的一对突出构件中的每一个的侧面上。半导体芯片的顶表面和每个突出构件的顶表面通过用于接地的第三接合线彼此连接。

6. 发明授权

US06555900B1 Package, semiconductor device and method for fabricating the semiconductor device 失效
标题翻译：采用定位控制板的半导体封装
公开(公告)号：US06555900B1
公开(公告)日：2003-04-29
申请号：US09413759
申请日：1999-10-06
申请人： Shigeru Morimoto , Yorito Ota , Masahiro Maeda
发明人： Shigeru Morimoto , Yorito Ota , Masahiro Maeda
IPC分类号： H01L23495
CPC分类号： H01L24/85 , H01L23/057 , H01L23/13 , H01L23/16 , H01L24/32 , H01L24/48 , H01L24/49 , H01L24/83 , H01L2223/6644 , H01L2224/29111 , H01L2224/32245 , H01L2224/48091 , H01L2224/48137 , H01L2224/48175 , H01L2224/48247 , H01L2224/49175 , H01L2224/73265 , H01L2224/83101 , H01L2224/8319 , H01L2224/83801 , H01L2224/85 , H01L2224/92247 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01029 , H01L2924/01047 , H01L2924/0105 , H01L2924/01079 , H01L2924/0132 , H01L2924/014 , H01L2924/15747 , H01L2924/15787 , H01L2924/3011 , H01L2924/30111 , H01L2224/78 , H01L2924/00 , H01L2224/45099 , H01L2224/05599
摘要： A package according to the present invention includes: a support for mounting a semiconductor component on the upper surface thereof; a positioning control plate, which is secured to the support and includes an opening or a notch; and a lead provided on the support for establishing electrical continuity between the semiconductor component mounted on the support and an external component. The positioning control plate houses at least a lower part of the semiconductor component inside the opening or the notch, thereby controlling a position of the semiconductor component on the support.
摘要翻译：根据本发明的封装包括：用于在其上表面上安装半导体部件的支撑件; 定位控制板，其固定到支撑件并且包括开口或凹口; 以及设置在支撑件上的引线，用于在安装在支撑件上的半导体部件与外部部件之间建立电连续性。定位控制板在开口或凹口内容纳至少半导体部件的下部，从而控制半导体部件在支撑体上的位置。

7. 发明授权

US06274889B1 Method for forming ohmic electrode, and semiconductor device 失效
标题翻译：用于形成欧姆电极的方法和半导体器件
公开(公告)号：US06274889B1
公开(公告)日：2001-08-14
申请号：US09400192
申请日：1999-09-21
申请人： Yorito Ota , Hiroyuki Masato , Yasuhito Kumabuchi , Makoto Kitabatake
发明人： Yorito Ota , Hiroyuki Masato , Yasuhito Kumabuchi , Makoto Kitabatake
IPC分类号： H01L310312
CPC分类号： H01L29/6606 , H01L21/0485 , H01L21/0495 , H01L21/268 , H01L21/8258 , H01L29/66068 , Y10S438/931
摘要： A semiconductor device having a single substrate made of silicon carbide; an epitaxial film made of AlxInyGa(1−x−y)N which is selectively formed on the single substrate; an amplifier section including a gate formed on the single substrate and a source layer and a drain layer which are formed within the single substrate; and another amplifier section formed on the epitaxial film.
摘要翻译：具有由碳化硅制成的单个基板的半导体器件; 在单个衬底上选择性地形成由Al x In y Ga（1-x-y）N制成的外延膜; 放大器部分，包括形成在单个基板上的栅极和形成在单个基板内的源极层和漏极层; 和形成在外延膜上的另一个放大器部分。

8. 发明授权

US5824575A Semiconductor device and method of manufacturing the same 失效
标题翻译：半导体装置及其制造方法
公开(公告)号：US5824575A
公开(公告)日：1998-10-20
申请号：US517854
申请日：1995-08-22
申请人： Hiromasa Fujimoto , Hiroyuki Masato , Yorito Ota , Tomoya Uda
发明人： Hiromasa Fujimoto , Hiroyuki Masato , Yorito Ota , Tomoya Uda
IPC分类号： H01L21/338 , H01L29/10 , H01L29/808 , H01L29/812
CPC分类号： H01L29/66863 , H01L29/1029 , H01L29/1058 , H01L29/66878 , H01L29/808 , H01L29/812 , H01L29/8128
摘要： After forming an n-type active layer, an n.sup.+ -type source region and an n.sup.+ -type drain region at predetermined regions of a GaAs substrate, a silicon oxide film and a silicon nitride film are deposited, and then source and drain electrodes are formed. By effecting overetching on the silicon nitride film using a resist mask formed on the silicon nitride film, an upper layer portion of the silicon oxide film at a gate electrode formation region is removed, and a carrier concentration at the active layer immediately under the gate electrode is reduced. This improves a gate/drain breakdown voltage. Thereafter, a lower layer portion of the silicon oxide film at the gate formation region is removed by wet etching, and the gate electrode is formed at this removed region. A drain breakdown voltage is improved owing to reduction of the carrier concentration only at the surface region of the active layer immediately under the gate electrode.
摘要翻译：在形成n型有源层之后，沉积在GaAs衬底，氧化硅膜和氮化硅膜的预定区域处的n +型源极区域和n +型漏极区域，然后形成源极和漏极电极。通过使用形成在氮化硅膜上的抗蚀剂掩模对氮化硅膜进行过蚀刻，去除在栅电极形成区域处的氧化硅膜的上层部分，并且在栅电极正下方的有源层上的载流子浓度降低了。这提高了栅/漏击穿电压。此后，通过湿蚀刻除去栅极形成区域处的氧化硅膜的下层部分，并且在该去除区域处形成栅电极。由于仅在栅电极正下方的有源层的表面区域减小载流子浓度，所以提高了漏极击穿电压。

9. 发明授权

US6110813A Method for forming an ohmic electrode 失效
标题翻译：形成欧姆电极的方法
公开(公告)号：US6110813A
公开(公告)日：2000-08-29
申请号：US54498
申请日：1998-04-03
申请人： Yorito Ota , Hiroyuki Masato , Yasuhito Kumabuchi , Makoto Kitabatake
发明人： Yorito Ota , Hiroyuki Masato , Yasuhito Kumabuchi , Makoto Kitabatake
IPC分类号： H01L21/04 , H01L21/8258 , H01L21/3205
CPC分类号： H01L29/6606 , H01L21/0485 , H01L21/0495 , H01L21/8258 , H01L29/66068 , H01L21/268 , Y10S438/931
摘要： A first metal film and a second metal film, both of which are made of Ni or the like, are deposited on the upper surface of a substrate made of SiC. In such a state, the interface between the first metal film and the substrate and the interface between the second metal film and the substrate both form a Schottky contact. Next, laser light is irradiated from above the upper surface of the substrate only onto the first metal film on the substrate after the diameter of the top end of the laser light has been reduced. Thus, since the metal-semiconductor interface between the first metal film and the substrate is turned into an alloy owing to the energy of the laser light without heating the entire substrate, an ohmic contact can be formed in the interface between the first metal film and the substrate. As a result, an ohmic electrode can be constituted by the first metal film.
摘要翻译：由Ni等制成的第一金属膜和第二金属膜沉积在由SiC制成的基板的上表面上。在这种状态下，第一金属膜与衬底之间的界面以及第二金属膜与衬底之间的界面都形成肖特基接触。接下来，激光的顶端的直径减小之后，从基板的上表面的上方仅将激光照射到基板上的第一金属膜上。因此，由于第一金属膜和基板之间的金属 - 半导体界面由于激光的能量而变为合金，而不加热整个基板，因此可以在第一金属膜与第一金属膜之间的界面中形成欧姆接触底物。结果，可以由第一金属膜构成欧姆电极。

10. 发明授权

US5585655A Field-effect transistor and method of manufacturing the same 失效
标题翻译：场效应晶体管及其制造方法
公开(公告)号：US5585655A
公开(公告)日：1996-12-17
申请号：US517435
申请日：1995-08-21
申请人： Yorito Ota , Katsunori Nishii , Mitsuru Nishitsuji , Hiroyuki Masato , Hiromasa Fujimoto
发明人： Yorito Ota , Katsunori Nishii , Mitsuru Nishitsuji , Hiroyuki Masato , Hiromasa Fujimoto
IPC分类号： H01L21/335 , H01L29/10 , H01L29/47 , H01L29/812 , H01L29/80
CPC分类号： H01L29/66462 , H01L29/1029 , H01L29/475 , H01L29/8128
摘要： On a semi-insulating substrate is formed a conductive layer and an undoped layer. On specified regions of the conductive layer are formed ohmic electrodes, each serving as a source electrode or a drain electrode, via a pair of square contact regions. The circumferential edges of the contact regions are undercut beneath the ohmic electrodes. Between the pair of contact regions on the conductive layer is formed a gate electrode by self alignment using the ohmic electrodes as a mask. The gate electrode has extended in the direction of gate width and the extended portion serves as a withdrawn portion of the gate electrode. Upper electrodes are formed by self alignment in the same process in which the gate electrode is formed.
摘要翻译：在半绝缘基板上形成导电层和未掺杂层。在导电层的指定区域上形成欧姆电极，每个电极用作源电极或漏电极，经由一对正方形接触区域。接触区域的圆周边缘在欧姆电极之下被切下。通过使用欧姆电极作为掩模的自对准，在导电层上的一对接触区域之间形成栅电极。栅电极在栅极宽度方向上延伸，并且延伸部分用作栅电极的退出部分。上电极通过在其中形成栅电极的相同工艺中的自对准形成。

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