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1. 发明授权

US5973047A Moisture-curing sealing and bonding compound 失效
标题翻译：水分固化密封和粘合剂
公开(公告)号：US5973047A
公开(公告)日：1999-10-26
申请号：US952246
申请日：1997-10-15
申请人： Wolfgang Ernst , Martin Majolo , Johann Klein , Michael Dziallas , Tore Podola
发明人： Wolfgang Ernst , Martin Majolo , Johann Klein , Michael Dziallas , Tore Podola
IPC分类号： C08L75/00 , C09D5/34 , C09J127/06 , C09J175/04 , C09K3/10 , C08K5/11 , C09J4/00
CPC分类号： C09K3/1021 , C09D5/34 , C09J127/06 , C09J175/04 , C08L75/00 , C09K2200/0447 , C09K2200/0635 , C09K2200/0682 , C09K2200/0685
摘要： Described is a moisture-curing sealing and bonding compound made from completely synthetic polymers, the compound containing, to improve its non-sag properties, a triglyceride, either as the sole non-sag agent or in addition to prior art agents. The triglyceride should have a melting point over 40.degree. C., preferably over 50.degree. C., and be derived from saturated fatty acids with 8 to 26 C-atoms. Even without using thixotropic agents, compounds can be obtained which do not sag at temperatures over 40.degree. C. Such joint sealants can be used to fill joints more than 35 mm wide without sagging.
摘要翻译： PCT No.PCT / EP96 / 01512 Sec。 371日期：1997年10月15日 102（e）1997年10月15日PCT PCT 1996年4月9日PCT公布。公开号WO96 / 33249 日期1996年10月24日描述的是由完全合成的聚合物制成的湿固化密封和粘结化合物，该化合物含有为了改善其不起伏性能，甘油三酸酯作为唯一的非起泡剂或除现有技术之外代理商甘油三酸酯应具有超过40℃，优选超过50℃的熔点，并且衍生自具有8至26个C原子的饱和脂肪酸。即使不使用触变剂，也可以获得在40℃以上不起伏的化合物。这种接头密封剂可用于填充超过35毫米宽的接缝而不会下垂。

2. 发明授权

US06790903B1 Dispersions of silyl-terminated polymers with a high solids content, their production and their use 有权
标题翻译：具有高固体含量的甲硅烷基封端的聚合物的分散体，它们的生产及其用途
公开(公告)号：US06790903B1
公开(公告)日：2004-09-14
申请号：US09857933
申请日：2001-06-11
申请人： Martin Majolo , Wolfgang Klauck , Johann Klein , Wolfgang Ernst , Gaby Schilling , Helmut Loth
发明人： Martin Majolo , Wolfgang Klauck , Johann Klein , Wolfgang Ernst , Gaby Schilling , Helmut Loth
IPC分类号： C08L7504
CPC分类号： C08J3/03 , C08G18/289 , C08G18/718 , C08J2300/108 , C09D5/34 , C09D201/10 , C09J201/10 , C09K3/1021
摘要： The invention relates to a polymer dispersion containing water and at least 60 wt. % of an organic polymer which has at least one group of general formula (I) A—Si(Z)n(OH)3-n. The invention also relates to a composition containing at least one organic polymer which has at least one group of general formula (I), and at least one other organic polymer or a mixture of two or more other organic polymers.
摘要翻译：本发明涉及含有水和至少60wt。％具有至少一个通式（I）A-Si（Z）n（OH）3-n的基团的有机聚合物。本发明还涉及含有至少一种具有至少一个通式（I）的基团的有机聚合物和至少一种其它有机聚合物或两种或更多种其它有机聚合物的混合物的组合物。

3. 发明授权

US4910242A Storable joint sealing compound 失效
标题翻译：可储存接头密封胶
公开(公告)号：US4910242A
公开(公告)日：1990-03-20
申请号：US230802
申请日：1988-08-10
申请人： Tore Podola , Wolfgang Ernst , Winfried Emmerling
发明人： Tore Podola , Wolfgang Ernst , Winfried Emmerling
IPC分类号： C09K3/10 , C08G18/10 , C08G18/62 , C08G18/64 , C08K5/00 , C08K5/01 , C08L75/00 , C08L75/04 , C09D5/34
CPC分类号： C09D5/34 , C08G18/10 , C08K5/0016 , C08K5/01 , C08L75/04 , C08G2190/00
摘要： Moisture-hardening joint sealing compositions based on polyurethane prepolymers, swellable polymer powders, plasticizers and other auxiliaries have increased stability in storage when they contain C.sub.8 -C.sub.20 olefins as stabilizers.
摘要翻译：基于聚氨酯预聚物，可溶胀聚合物粉末，增塑剂和其它助剂的水分硬化接头密封组合物当它们含有C8-C20烯烃作为稳定剂时，具有增加的储存稳定性。

4. 发明授权

US07062690B2 System for testing fast synchronous digital circuits, particularly semiconductor memory chips 失效
公开(公告)号：US07062690B2
公开(公告)日：2006-06-13
申请号：US09907786
申请日：2001-07-18
申请人： Wolfgang Ernst , Gunnar Krause , Justus Kuhn , Jens Lüpke , Jochen Müller , Peter Pöchmüller , Michael Schittenhelm
发明人： Wolfgang Ernst , Gunnar Krause , Justus Kuhn , Jens Lüpke , Jochen Müller , Peter Pöchmüller , Michael Schittenhelm
IPC分类号： G01R31/28
CPC分类号： G11C29/48 , G01R31/31905 , G11C29/56
摘要： A system and a method for testing fast synchronous digital circuit with an additional built outside self test semiconductor chip disposed between a test device and circuit under test. The chip has a switching/detection unit that tests the chip based on external criteria between a first normal operating mode in which the chip tests the circuit to be tested, and a second operating mode in which programmable registers of the register unit of a receiver of the chip are programmed by the external test device. The registers store constants and variables for generating the test signals and for evaluating them. The chip generates test signals and transceiver for sending the test signals and receiving response signals generated thereby.

5. 发明授权

US06862702B2 Address counter for addressing synchronous high-frequency digital circuits, in particular memory devices 失效
标题翻译：地址计数器用于寻址同步高频数字电路，特别是存储器件
公开(公告)号：US06862702B2
公开(公告)日：2005-03-01
申请号：US09907776
申请日：2001-07-18
申请人： Wolfgang Ernst , Gunnar Krause , Justus Kuhn , Jens Lüpke , Jochen Müller , Peter Pöchmüller , Michael Schittenhelm
发明人： Wolfgang Ernst , Gunnar Krause , Justus Kuhn , Jens Lüpke , Jochen Müller , Peter Pöchmüller , Michael Schittenhelm
IPC分类号： G11C29/56 , G11C29/00
CPC分类号： G11C29/56
摘要： The novel address counter can be used in combination with an existing test unit—serving for testing digital circuits—for addressing synchronous high-frequency digital circuits, in particular fast memory devices. Address offset values are provided in programmable offset registers, with a multiplexer circuit and a selection and combination circuit, on the basis of input signals which are fed in at low frequency and in parallel by the test unit. Simple address changes and address jumps can be realized at a high clock frequency in a very flexible manner.
摘要翻译：新颖的地址计数器可以与用于测试数字电路的现有测试单元结合使用 - 用于寻址同步高频数字电路，特别是快速存储器件。在可编程偏移寄存器中提供地址偏移值，其中多路复用器电路和选择和组合电路基于由测试单元以低频和并联馈送的输入信号。可以以非常灵活的方式在高时钟频率下实现简单的地址改变和地址跳转。

6. 发明授权

US06865707B2 Test data generator 失效
标题翻译：测试数据生成器
公开(公告)号：US06865707B2
公开(公告)日：2005-03-08
申请号：US10109657
申请日：2002-04-01
申请人： Wolfgang Ernst , Gunnar Krause , Justus Kuhn , Jens Luepke , Jochen Mueller , Peter Poechmueller , Michael Schittenhelm
发明人： Wolfgang Ernst , Gunnar Krause , Justus Kuhn , Jens Luepke , Jochen Mueller , Peter Poechmueller , Michael Schittenhelm
IPC分类号： G01R31/3183 , G11C29/14 , G11C29/36 , G01R31/28 , G06F11/00
CPC分类号： G11C29/14 , G01R31/3183 , G11C29/36
摘要： Test data generator for generating test data patterns for the testing of a circuit having a frequency multiplication circuit, which increases a low clock frequency of an input clock signal received by a test unit with a specific clock frequency multiplication factor. Also provided is a plurality of data registers for storing test data words read from the data registers, and multiplexer that switches through a test data word read from a data register with the high clock frequency of the output clock signal to a data bus in a way dependent on a register selection control datum of a multi-position register selection control data vector.
摘要翻译：用于产生用于测试具有倍频电路的电路的测试数据模式的测试数据发生器，其增加由测试单元以特定时钟倍频因子接收的输入时钟信号的低时钟频率。还提供了多个数据寄存器，用于存储从数据寄存器读取的测试数据字，以及多路复用器，以一种方式将通过从输出时钟信号的高时钟频率从数据寄存器读取的测试数据字切换到数据总线取决于多位置寄存器选择控制数据向量的寄存器选择控制基准。

7. 发明授权

US06556492B2 System for testing fast synchronous semiconductor circuits 失效
公开(公告)号：US06556492B2
公开(公告)日：2003-04-29
申请号：US09907695
申请日：2001-07-18
申请人： Wolfgang Ernst , Gunnar Krause , Justus Kuhn , Jens Lüpke , Jochen Müller , Peter Pöchmüller , Michael Schittenhelm
发明人： Wolfgang Ernst , Gunnar Krause , Justus Kuhn , Jens Lüpke , Jochen Müller , Peter Pöchmüller , Michael Schittenhelm
IPC分类号： G11C700
CPC分类号： G11C29/56
摘要： The system enables testing fast synchronous semiconductor circuits, particularly semiconductor memory chips. Various test signals such as test data, data strobe signals, control/address signals are combined to form signal groups and controllable transmit driver and receiver elements allocated to them are in each case jointly activated or, respectively, driven by timing reference signals generated by programmable DLL delay circuits. A clock signal generated in a clock generator in the BOST semiconductor circuit is picked up at a tap in the immediate vicinity of the semiconductor circuit chip to be tested and fed back to a DLL circuit in the BOST chip where it is used for eliminating delay effects in the lines leading to the DUT and back to the BOST.

8. 发明授权

US10711279B2 Promoter sequences 有权
公开(公告)号：US10711279B2
公开(公告)日：2020-07-14
申请号：US13518152
申请日：2010-12-22
申请人： Wolfgang Ernst , Jens Pontiller , Friedemann Hesse , Haruthai Thaisuchat
发明人： Wolfgang Ernst , Jens Pontiller , Friedemann Hesse , Haruthai Thaisuchat
IPC分类号： C12N15/85
摘要： The present invention relates to new promoter sequences and uses thereof, in particular expression cassettes, vectors, and methods of expressing genes using the new promoters.

9. 发明申请

US20130258700A1 COLOR-MIXING CONVERGENT OPTICAL SYSTEM 有权
标题翻译：彩色混合光学系统
公开(公告)号：US20130258700A1
公开(公告)日：2013-10-03
申请号：US13989356
申请日：2011-11-17
申请人： Michael Schuch , Wolfgang Ernst , Alexander Otto
发明人： Michael Schuch , Wolfgang Ernst , Alexander Otto
IPC分类号： F21V8/00
CPC分类号： G02B6/0005 , G02B6/0006 , G02B6/0068 , G02B6/4298 , G09F9/305
摘要： Optical systems for focused light emission, which can be used as full color-capable pixels in grid assemblies, such as variable message signs and outdoor electronic display boards. The optical systems may include a light source that is a commercially available full-color LED in SMD design having a red, a green, and a blue LED crystal, which may be disposed at an inlet surface of a light-guiding rod having a constant cross-section and a jacket surface made of planes adjacent to each other at sharp edges. The light-guiding rod thereby captures the light substantially completely and completely mixes the different colors and brightnesses efficiently without scattering. The light output of the light-guiding rod lies at the focus of a convergent lens, which focuses the exiting light.
摘要翻译：用于聚焦光发射的光学系统，其可以用作网格组件中的全彩色像素，例如可变消息标志和户外电子显示板。光学系统可以包括光源，其是具有红色，绿色和蓝色LED晶体的SMD设计的市售全色LED，其可以设置在具有恒定的导光棒的入口表面横截面和由锐利边缘彼此相邻的平面制成的护套表面。因此，导光杆基本上完全地捕获光，并且不会飞散地有效地将不同的颜色和亮度完全混合。导光杆的光输出位于会聚透镜的焦点，聚焦透镜聚焦出射光。

10. 发明授权

US06721904B2 System for testing fast integrated digital circuits, in particular semiconductor memory modules 失效
标题翻译：用于测试快速集成数字电路的系统，特别是半导体存储器模块
公开(公告)号：US06721904B2
公开(公告)日：2004-04-13
申请号：US09907693
申请日：2001-07-18
申请人： Wolfgang Ernst , Gunnar Krause , Justus Kuhn , Jens Lüpke , Jochen Müller , Peter Pöchmüller , Michael Schittenhelm
发明人： Wolfgang Ernst , Gunnar Krause , Justus Kuhn , Jens Lüpke , Jochen Müller , Peter Pöchmüller , Michael Schittenhelm
IPC分类号： H02H305
CPC分类号： G11C29/12015 , G11C29/48 , G11C29/56012
摘要： The invention relates to a system for testing fast integrated digital circuits, in particular semiconductor modules, such as for example SDRAMs. In order to achieve the necessary chronological precision in the testing even of DDR-SDRAMs, with at the same time the high degree of parallelism of the test system required for mass production, an additional semiconductor circuit module (BOST module) is inserted into the signal path between a standard testing device and the SDRAM to be tested. This additional module is set up so as to multiply the relatively slow clock frequency of the conventional testing device, and to determine the signal sequence for control signals, addresses, and data background with which the SDRAM module is tested, dependent on signals of the testing device and also on register contents, programmed before the test, in the BOST module.
摘要翻译：本发明涉及一种用于测试快速集成数字电路，特别是半导体模块（例如SDRAM）的系统。为了在DDR-SDRAM的测试中实现必要的按时间顺序的精度，同时大规模生产所需的测试系统的高度并行性，将额外的半导体电路模块（BOST模块）插入到信号中标准测试设备和要测试的SDRAM之间的路径。该附加模块被设置为乘以常规测试设备的相对较慢的时钟频率，并且根据测试信号来确定用于测试SDRAM模块的控制信号，地址和数据背景的信号序列设备以及在测试前编程的寄存器内容，在BOST模块中。

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