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    • 1. 发明申请
    • Wide wavelength range silicon electroluminescence device
    • 宽波长范围的硅电致发光器件
    • US20060180816A1
    • 2006-08-17
    • US11058505
    • 2005-02-14
    • Tingkai LiWei GaoYoshi OnoSheng Hsu
    • Tingkai LiWei GaoYoshi OnoSheng Hsu
    • H01L29/26
    • H05B33/145
    • A method is provided for forming a Si electroluminescence (EL) device for emitting light at short wavelengths. The method comprises: providing a substrate; forming a first insulator layer overlying the substrate; forming a silicon-rich silicon oxide (SRSO) layer overlying the first insulator layer, embedded with nanocrystalline Si having a size in the range of 0.5 to 5 nm; forming a second insulator layer overlying the SRSO layer; and, forming a top electrode. Typically, the SRSO has a Si richness in the range of 5 to 40%. In one aspect, the SRSO layer is formed using a DC sputtering process. In another aspect, the SRSO formation step includes a rapid thermal annealing (RTA) process subsequent to depositing the SRSO. Likewise, thermal oxidation or plasma oxidation can be performed subsequent to the SRSO layer deposition. The size of Si nanocrystals is decreased in response to above-mentioned deposition, annealing, and oxidation processes.
    • 提供一种用于形成用于发射短波长的光的Si电致发光(EL)装置的方法。 该方法包括:提供衬底; 形成覆盖所述衬底的第一绝缘体层; 形成覆盖在第一绝缘体层上的富硅氧化物(SRSO)层,其中嵌入尺寸在0.5至5nm范围内的纳米晶体Si; 形成覆盖所述SRSO层的第二绝缘体层; 并形成顶部电极。 通常,SRSO的Si浓度范围为5〜40%。 在一个方面,使用DC溅射工艺形成SRSO层。 另一方面,SRSO形成步骤包括在沉积SRSO之后的快速热退火(RTA)工艺。 同样地,可以在SRSO层沉积之后进行热氧化或等离子体氧化。 响应于上述沉积,退火和氧化过程,Si纳米晶体的尺寸减小。
    • 4. 发明申请
    • Rare earth element-doped silicon oxide film electroluminescence device
    • 稀土元素掺杂氧化硅膜电致发光器件
    • US20080035946A1
    • 2008-02-14
    • US11973525
    • 2007-10-09
    • Wei GaoTingkai LiRobert BarrowcliffYoshi OnoSheng Hsu
    • Wei GaoTingkai LiRobert BarrowcliffYoshi OnoSheng Hsu
    • H01L33/00H01L23/58
    • H05B33/145H01L21/3115H01L31/03046Y02E10/544
    • A method is provided for forming a rare earth (RE) element-doped silicon (Si) oxide film with nanocrystalline (nc) Si particles. The method comprises: providing a first target of Si, embedded with a first rare earth element; providing a second target of Si; co-sputtering the first and second targets; forming a Si-rich Si oxide (SRSO) film on a substrate, doped with the first rare earth element; and, annealing the rare earth element-doped SRSO film. The first target is doped with a rare earth element such as erbium (Er), ytterbium (Yb), cerium (Ce), praseodymium (Pr), or terbium (Tb). The sputtering power is in the range of about 75 to 300 watts (W). Different sputtering powers are applied to the two targets. Also, deposition can be controlled by varying the effective areas of the two targets. For example, one of the targets can be partially covered.
    • 提供了一种用于形成具有纳米晶体(nc)Si颗粒的稀土(RE)元素掺杂硅(Si)氧化物膜的方法。 该方法包括:提供嵌入有第一稀土元素的Si的第一靶; 提供Si的第二个目标; 共溅射第一和第二个目标; 在掺杂有第一稀土元素的衬底上形成富Si氧化硅(SRSO)膜; 并对稀土元素掺杂的SRSO膜退火。 第一靶用铒(Er),镱(Yb),铈(Ce),镨(Pr)或铽(Tb)等稀土元素掺杂。 溅射功率在约75至300瓦(W)的范围内。 不同的溅射功率被应用于两个目标。 此外,可以通过改变两个目标的有效面积来控制沉积。 例如,其中一个目标可以被部分覆盖。
    • 5. 发明申请
    • High-luminescence silicon electroluminescence device
    • 高发光硅电致发光器件
    • US20060189014A1
    • 2006-08-24
    • US11066713
    • 2005-02-24
    • Tingkai LiPooran JoshiWei GaoYoshi OnoSheng Hsu
    • Tingkai LiPooran JoshiWei GaoYoshi OnoSheng Hsu
    • H01L21/00
    • H01L31/03046Y02E10/544Y02P70/521
    • A method for forming a high-luminescence Si electroluminescence (EL) phosphor is provided, with an EL device made from the Si phosphor. The method comprises: depositing a silicon-rich oxide (SRO) film, with Si nanocrystals, having a refractive index in the range of 1.5 to 2.1, and a porosity in the range of 5 to 20%; and, post-annealing the SRO film in an oxygen atmosphere. DC-sputtering or PECVD processes can be used to deposit the SRO film. In one aspect the method further comprises: HF buffered oxide etching (BOE) the SRO film; and, re-oxidizing the SRO film, to form a SiO2 layer around the Si nanocrystals in the SRO film. In one aspect, the SRO film is re-oxidized by annealing in an oxygen atmosphere. In this manner, a layer of SiO2 is formed around the Si nanocrystals having a thickness in the range of 1 to 5 nanometers (nm).
    • 提供一种用于形成高发光Si电致发光(EL)荧光体的方法,其具有由Si荧光体制成的EL器件。 该方法包括:用Si纳米晶体沉积富含氧的氧化物(SRO)膜,折射率在1.5至2.1范围内,孔隙率在5至20%的范围内; 并且在氧气氛中对SRO膜进行后退火。 DC溅射或PECVD工艺可用于沉积SRO膜。 在一个方面,该方法还包括:HF缓冲氧化物蚀刻(BOE)SRO膜; 并且再次氧化SRO膜,以在SRO膜中的Si纳米晶体周围形成SiO 2层。 在一个方面,SRO膜通过在氧气气氛中退火再次氧化。 以这种方式,在具有1至5纳米(nm)范围内的厚度的Si纳米晶体周围形成SiO 2层。
    • 7. 发明申请
    • Low power flash memory cell and method
    • 低功耗闪存单元和方法
    • US20050088898A1
    • 2005-04-28
    • US10976596
    • 2004-10-29
    • Sheng HsuYoshi Ono
    • Sheng HsuYoshi Ono
    • H01L21/28H01L21/336H01L21/762H01L21/8234H01L21/8247H01L27/115H01L29/51H01L29/788H01L29/792G11C7/00
    • H01L21/28194H01L21/76224H01L21/823481H01L27/115H01L27/11521H01L29/40114H01L29/51H01L29/517H01L29/518H01L29/66825H01L29/7883Y10S438/975
    • Flash memory cells are provided with a high-k material interposed between a floating polysilicon gate and a control gate. A tunnel oxide is interposed between the floating polysilicon gate and a substrate. Methods of forming flash memory cells are also provided comprising forming a first polysilicon layer over a substrate. Forming a trench through the first polysilicon layer and into the substrate, and filling the trench with an oxide layer. Depositing a second polysilicon layer over the oxide, such that the bottom of the second polysilicon layer within the trench is above the bottom of the first polysilicon layer, and the top of the second polysilicon layer within the trench is below the top of the first polysilicon layer. The resulting structure may then be planarized using a CMP process. A high-k dielectric layer may then be deposited over the first polysilicon layer. A third polysilicon layer may then be deposited over the high-k dielectric layer and patterned using photoresist to form a flash memory gate structure. During patterning, exposed second polysilicon layer is etched. An etch stop is detected at the completion of removal of the second polysilicon layer. A thin layer of the first polysilicon layer remains, to be carefully removed using a subsequent selective etch process. The high-k dielectric layer may be patterned to allow for formation of non-memory transistors in conjunction with the process of forming the flash memory cells.
    • 闪存单元设置有插入在浮置多晶硅栅极和控制栅极之间的高k材料。 在浮置多晶硅栅极和衬底之间插入隧道氧化物。 还提供了形成闪存单元的方法,包括在衬底上形成第一多晶硅层。 通过第一多晶硅层形成沟槽并进入衬底,并用氧化物层填充沟槽。 在氧化物上沉积第二多晶硅层,使得沟槽内的第二多晶硅层的底部高于第一多晶硅层的底部,并且沟槽内的第二多晶硅层的顶部低于第一多晶硅的顶部 层。 然后可以使用CMP工艺将得到的结构平坦化。 然后可以在第一多晶硅层上沉积高k电介质层。 然后可以在高k电介质层上沉积第三多晶硅层,并使用光致抗蚀剂图案化以形成闪存栅极结构。 在图案化期间,蚀刻暴露的第二多晶硅层。 在完成去除第二多晶硅层时检测到蚀刻停止。 保留第一多晶硅层的薄层,使用随后的选择性蚀刻工艺小心地去除。 结合形成闪速存储器单元的过程,高k电介质层可以被图案化以允许形成非存储晶体管。
    • 9. 发明申请
    • Multilayered barrier metal thin-films
    • 多层阻隔金属薄膜
    • US20060091554A1
    • 2006-05-04
    • US11311546
    • 2005-12-19
    • Wei PanYoshi OnoDavid EvansSheng Hsu
    • Wei PanYoshi OnoDavid EvansSheng Hsu
    • H01L23/48
    • H01L21/28562H01L21/76841H01L2221/1078
    • A multi-layered barrier metal thin film is deposited on a substrate by atomic layer chemical vapor deposition (ALCVD). The multi-layer film may comprise several different layers of a single chemical species, or several layers each of distinct or alternating chemical species. In a preferred embodiment, the multi-layer barrier thin film comprises a Tantalum Nitride layer on a substrate, with a Titanium Nitride layer deposited thereon. The thickness of the entire multi-layer film may be approximately fifty Angstroms. The film has superior film characteristics, such as anti-diffusion capability, low resistivity, high density, and step coverage, when compared to films deposited by conventional chemical vapor deposition (CVD). The multi-layered barrier metal thin film of the present invention has improved adhesion characteristics and is particularly suited for metallization of a Copper film thereon.
    • 通过原子层化学气相沉积(ALCVD)将多层阻挡金属薄膜沉积在衬底上。 多层膜可以包括单个化学物质的几个不同层,或者各个不同的或交替的化学物质的几个层。 在优选实施例中,多层阻挡薄膜包括在衬底上的氮化钽层,其上沉积有氮化钛层。 整个多层膜的厚度可以是大约50埃。 当与通过常规化学气相沉积(CVD)沉积的膜相比时,该膜具有优异的膜特性,例如抗扩散能力,低电阻率,高密度和台阶覆盖。 本发明的多层阻挡金属薄膜具有改善的粘合特性,特别适用于其上的铜膜的金属化。