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1. 发明授权

US07254676B2 Processor cache memory as RAM for execution of boot code 有权
标题翻译：处理器缓存内存作为执行启动代码的RAM
公开(公告)号：US07254676B2
公开(公告)日：2007-08-07
申请号：US10295406
申请日：2002-11-15
申请人： Sham M. Datta , Vincent J. Zimmer , Kushagra V. Vaid , William A. Stevens , Amy Lynn Santoni
发明人： Sham M. Datta , Vincent J. Zimmer , Kushagra V. Vaid , William A. Stevens , Amy Lynn Santoni
IPC分类号： G06F12/00
CPC分类号： G06F12/126 , G06F9/4403 , G06F12/0862 , G06F2212/2515
摘要： In one embodiment, a computer boot method allows choosing a predetermined data block alignment for a cache that has multiple cross processor interactions. A cache RAM column of a cache as RAM system is loaded with a tag to prevent unintended cache line evictions, and boot code is executed, with the preloaded cache RAM appearing to the executing boot code stream as a memory store.
摘要翻译：在一个实施例中，计算机引导方法允许为具有多个交叉处理器交互的高速缓存选择预定数据块对齐。作为RAM系统的缓存的高速缓存RAM列被加载有标签以防止意外的高速缓存行驱逐，并且执行引导代码，其中预先加载的高速缓存RAM作为存储器存储器显示在执行的引导代码流中。

2. 发明授权

US07392371B2 Method and apparatus for using a volume top file to boot firmware modules 有权
标题翻译：使用卷顶文件引导固件模块的方法和装置
公开(公告)号：US07392371B2
公开(公告)日：2008-06-24
申请号：US10032141
申请日：2001-12-20
申请人： Vincent J. Zimmer , Kirk D. Brannock , Sham M. Datta
发明人： Vincent J. Zimmer , Kirk D. Brannock , Sham M. Datta
IPC分类号： G06F9/00
CPC分类号： G06F9/4401
摘要： A boot routine is initialized in a computer by bootstrapping a volume top file (VTF) located in a first addressable location accessible upon the initializing of the boot routine and the volume top file bootstrapping a set of firmware modules.
摘要翻译：引导例程在计算机中通过引导位于第一可寻址位置的卷顶部文件（VTF）来初始化，该第一可寻址位置可以在初始化引导例程和卷顶部文件引导一组固件模块时访问。

3. 发明授权

US06775728B2 Method and system for concurrent handler execution in an SMI and PMI-based dispatch-execution framework 有权
标题翻译：在SMI和基于PMI的调度执行框架中执行并发处理程序的方法和系统
公开(公告)号：US06775728B2
公开(公告)日：2004-08-10
申请号：US10011233
申请日：2001-11-15
申请人： Vincent J. Zimmer , Sham M. Datta
发明人： Vincent J. Zimmer , Sham M. Datta
IPC分类号： G06F1324
CPC分类号： G06F9/4812
摘要： A method and system that enables concurrent event handler execution in a system management interrupt (SMI) and processor management interrupt (PMI)-based dispatch-execution framework to service an SMI or PMI event. A plurality of event handlers are loaded into a hidden memory space that is accessible to a hidden execution mode supported by each of a plurality of processors in a multiprocessor computer system but is not accessible to other operating modes of those processors. The event handlers are then dispatched to two or more processors in response to the hidden execution mode event and concurrently executed to service the event. Various embodiments include use of a single event handler to service the event, multiple event handlers that perform different tasks, and multiple event handler instances that concurrently perform a single task. The invention also provides a resource locking mechanism to prevent resource access conflicts.
摘要翻译：一种在系统管理中断（SMI）和基于处理器管理中断（PMI）的调度执行框架中执行并发事件处理程序的服务SMI或PMI事件的方法和系统。多个事件处理程序被加载到可由多处理器计算机系统中的多个处理器中的每一个支持的隐藏执行模式可访问的隐藏存储器空间中，但是对于这些处理器的其它操作模式是不可访问的。然后响应于隐藏的执行模式事件将事件处理程序分派到两个或多个处理器，并且并发执行以对该事件进行服务。各种实施例包括使用单个事件处理程序来服务事件，执行不同任务的多个事件处理程序以及同时执行单个任务的多个事件处理程序实例。本发明还提供了一种防止资源访问冲突的资源锁定机制。

4. 发明授权

US09958926B2 Method and system for providing instant responses to sleep state transitions with non-volatile random access memory 有权
公开(公告)号：US09958926B2
公开(公告)日：2018-05-01
申请号：US13976903
申请日：2011-12-13
申请人： Leena K. Puthiyedath , Raj K. Ramanujan , Michael Rothman , Blaise Fanning , Vincent J. Zimmer
发明人： Leena K. Puthiyedath , Raj K. Ramanujan , Michael Rothman , Blaise Fanning , Vincent J. Zimmer
IPC分类号： G06F1/32
CPC分类号： G06F1/3234 , G06F1/3275 , Y02D10/13 , Y02D10/14
摘要： A non-volatile random access memory (NVRAM) is used in a computer system to provide instant responses to sleep state transitions. The computer system includes a processor coupled to an NVRAM, which is accessible by the processor without passing through an I/O subsystem. The NVRAM is byte-rewritable and byte-erasable by the processor. In response to a request to enter a powered sleep state, the computer system converts the powered sleep state into a powered-off sleep state with system memory context stored in the NVRAM. The powered sleep state is defined as a state in which power is supplied to volatile random access memory in the computer system, and the powered-off sleep state is defined as a state in which power is removed from the volatile random access memory. In response to a wake event, the computer system resumes working state operations using the system memory context stored in the NVRAM.

5. 发明申请

US20170185207A1 Technologies for dynamic display with a transformable display 审中-公开
公开(公告)号：US20170185207A1
公开(公告)日：2017-06-29
申请号：US14998314
申请日：2015-12-26
申请人： Rajesh Poornachandran , Vincent J. Zimmer , Nicholas J. Adams , Nithyananda S. Jeganathan , Gunner D. Danneels
发明人： Rajesh Poornachandran , Vincent J. Zimmer , Nicholas J. Adams , Nithyananda S. Jeganathan , Gunner D. Danneels
IPC分类号： G06F3/041 , G06F1/16
CPC分类号： G06F3/0416 , G06F1/1652 , G06F3/0412 , G06F9/44505
摘要： Technologies for dynamic display include a mobile compute device that comprises a display transformable between at least two different physical topologies. The mobile compute device determines a current physical topology of the display and retrieves a policy based on the determined current physical topology. The policy identifies a corresponding action to occur in response to each of one or more user inputs to the mobile compute device while the display has the current physical topology. The mobile compute device processes a user input based on the retrieved policy.

6. 发明申请

US20170177395A1 EMBEDDED ARCHITECTURE BASED ON PROCESS VIRTUAL MACHINE 审中-公开
公开(公告)号：US20170177395A1
公开(公告)日：2017-06-22
申请号：US14976936
申请日：2015-12-21
申请人： Mingqiu Sun , Vincent J. Zimmer , Rajesh Poornachandran , Gopinatth Selvaraje
发明人： Mingqiu Sun , Vincent J. Zimmer , Rajesh Poornachandran , Gopinatth Selvaraje
IPC分类号： G06F9/455 , G06F9/50
CPC分类号： G06F9/45558 , G06F9/5038 , G06F2009/4557 , G06F2009/45575 , G06F2009/45587
摘要： A system on a chip (SoC) may comprise at least one processor with at least one core and a storage device comprising a first system virtual machine configured to be executed on the at least one processor. The storage device may comprise a second system virtual machine configured to be executed by the at least one processor. The second system virtual machine may include at least one process virtual machine; a modem configured as one of the at least one process virtual machine; and a real-time operating system (RTOS) to schedule execution of the at least one process virtual machine on the at least one processor.

7. 发明申请

US20160070932A1 Providing A Trusted Execution Environment Using A Processor 有权
标题翻译：使用处理器提供可信赖的执行环境
公开(公告)号：US20160070932A1
公开(公告)日：2016-03-10
申请号：US14482136
申请日：2014-09-10
申请人： Vincent J. Zimmer , Peter J. Barry , Rajesh Poornachandran , Arjan Van De Ven , Peter A. Dice , Gopinatth Selvaraje , Julien Carreno , Lee G. Rosenbaum
发明人： Vincent J. Zimmer , Peter J. Barry , Rajesh Poornachandran , Arjan Van De Ven , Peter A. Dice , Gopinatth Selvaraje , Julien Carreno , Lee G. Rosenbaum
IPC分类号： G06F21/72 , G06F21/79 , G06F21/57 , H04L9/08
CPC分类号： G06F21/575 , G06F9/4406 , G06F21/53 , G06F21/72 , G06F21/79 , G06F2221/033 , G06F2221/2107 , G06F2221/2111 , H04L9/0861 , H04L9/0894 , H04L9/14 , H04L9/302 , H04L2209/60
摘要： In an embodiment, a system on a chip includes: a single core to execute a legacy instruction set, the single core configured to enter a system management mode (SMM) to provide a trusted execution environment to perform at least one secure operation; and a memory controller coupled to the single core, the memory controller to interface with a system memory, where a portion of the system memory comprises a secure memory for the SMM, and the single core is to authenticate and execute a boot firmware, and pass control to the SMM to obtain a key pair from a protected storage and store the key pair in the secure memory. Other embodiments are described and claimed.
摘要翻译：在一个实施例中，芯片上的系统包括：执行遗留指令集的单个核心，所述单个核心被配置为进入系统管理模式（SMM）以提供可信赖执行环境以执行至少一个安全操作; 以及耦合到所述单个核的存储器控制器，所述存储器控制器与系统存储器接口，其中所述系统存储器的一部分包括用于所述SMM的安全存储器，并且所述单个核心将认证并执行引导固件，并且传递控制到SMM以从受保护的存储器获取密钥对，并将密钥对存储在安全存储器中。描述和要求保护其他实施例。

8. 发明授权

US09210148B2 Trusted application migration across computer nodes 有权
标题翻译：跨计算机节点的可信应用程序迁移
公开(公告)号：US09210148B2
公开(公告)日：2015-12-08
申请号：US13995511
申请日：2011-12-30
申请人： Mallik Bulusu , Robert Bahnsen , Vincent J. Zimmer , Robert S. Gittins , Robert C. Swanson
发明人： Mallik Bulusu , Robert Bahnsen , Vincent J. Zimmer , Robert S. Gittins , Robert C. Swanson
IPC分类号： H04L29/06 , G06F21/00
CPC分类号： H04L63/0876 , G06F21/00 , H04L63/08 , H04W12/06 , H04W12/08
摘要： An embodiment includes a secure and stable method for sending information across a compute continuum. For example, the method may include executing an application (e.g., video player) on a first node (e.g., tablet) with a desire to perform “context migration” to a second node (e.g., desktop). This may allow a user to watch a movie on the tablet, stop watching the movie, and then resume watching the movie from the desktop. To do so in a secure and stable manner, the first node may request security and performance credentials from the second node. If both credential sets satisfy thresholds, the first node may transfer content (e.g., encrypted copy of a movie) and state information (e.g., placeholder indicating where the movie was when context transfer began). The second node may then allow the user to resume his or her movie watching from the desktop. Other embodiments are described herein.
摘要翻译：一个实施例包括用于在计算连续体上发送信息的安全且稳定的方法。例如，该方法可以包括在第一节点（例如，平板电脑）上执行应用（例如，视频播放器），期望执行到第二节点（例如桌面）的“上下文迁移”。这可能允许用户在平板电脑上观看电影，停止观看电影，然后从桌面恢复观看电影。为了以安全和稳定的方式这样做，第一节点可以从第二节点请求安全性和性能凭证。如果两个凭证组都满足阈值，则第一节点可以传送内容（例如，电影的加密副本）和状态信息（例如，当上下文传送开始时，指示电影在哪里的占位符）。然后，第二节点可以允许用户从桌面恢复他或她的电影观看。本文描述了其它实施例。

9. 发明申请

US20150278068A1 INITIALIZATION TRACE OF A COMPUTING DEVICE 审中-公开
标题翻译：计算机设备的初始化跟踪
公开(公告)号：US20150278068A1
公开(公告)日：2015-10-01
申请号：US14226612
申请日：2014-03-26
申请人： Robert C. Swanson , C. Brendan Traw , Vincent J. Zimmer , Mallik Bulusu , John R. Lindsley , Mahesh S. Natu , Dimitrios Ziakas , Robert W. Cone , Madhusudhan Rangarajan , Babak Nikjou , Kirk D. Brannock , Russell J. Wunderlich , Miles F. Schwartz , Stephen S. Pawlowski
发明人： Robert C. Swanson , C. Brendan Traw , Vincent J. Zimmer , Mallik Bulusu , John R. Lindsley , Mahesh S. Natu , Dimitrios Ziakas , Robert W. Cone , Madhusudhan Rangarajan , Babak Nikjou , Kirk D. Brannock , Russell J. Wunderlich , Miles F. Schwartz , Stephen S. Pawlowski
IPC分类号： G06F11/34 , G06F9/44
CPC分类号： G06F11/3476 , G06F9/4403 , G06F9/4416 , G06F11/1417 , G06F21/575 , G06F2201/84
摘要： Platform controller, computer-readable storage media, and methods associated with initialization of a computing device. In embodiments, a platform controller may comprise a boot controller and one or more non-volatile memory modules, coupled with the boot controller. In embodiments, the one or more non-volatile memory modules may have first instructions and second instructions stored thereon. The first instructions may, when executed by a processor of a computing device hosting the platform controller, cause initialization of the computing device. The second instructions, when executed by the boot controller, may cause the boot controller to monitor at least a portion of the execution of the first instructions by the computing device and may generate a trace of the monitored portion of the execution of the first instructions. In embodiments, the trace may be stored in the one or more non-volatile memory modules. Other embodiments may be described and/or claimed.
摘要翻译：平台控制器，计算机可读存储介质以及与计算设备的初始化相关联的方法。在实施例中，平台控制器可以包括与引导控制器耦合的引导控制器和一个或多个非易失性存储器模块。在实施例中，一个或多个非易失性存储器模块可以具有存储在其上的第一指令和第二指令。当由托管平台控制器的计算设备的处理器执行时，第一指令可以引起计算设备的初始化。第二指令在由引导控制器执行时可能导致引导控制器监视计算设备执行第一指令的至少一部分，并且可以生成第一指令的执行的监视部分的跟踪。在实施例中，迹线可以存储在一个或多个非易失性存储器模块中。可以描述和/或要求保护其他实施例。

10. 发明授权

US09135470B2 Data security 有权
标题翻译：数据安全
公开(公告)号：US09135470B2
公开(公告)日：2015-09-15
申请号：US12772365
申请日：2010-05-03
申请人： Vincent J. Zimmer , Michael A. Rothman
发明人： Vincent J. Zimmer , Michael A. Rothman
IPC分类号： G06F21/71 , G06F21/57 , G06F21/72 , G06F21/80
CPC分类号： H04L63/0823 , G06F13/4068 , G06F21/575 , G06F21/71 , G06F21/72 , G06F21/80 , G06F2221/2107 , G06F2221/2115 , H04L9/3268 , H04L63/0435 , H04L63/061 , H04L63/08
摘要： In one embodiment, a method is provided that may include one or more operations. One of these operations may include, in response, at least in part, to a request to store input data in storage, encrypting, based least in part upon one or more keys, the input data to generate output data to store in the storage. The one or more keys may be authorized by a remote authority. Alternatively or additionally, another of these operations may include, in response, at least in part, to a request to retrieve the input data from the storage, decrypting, based at least in part upon the at least one key, the output data. Many modifications, variations, and alternatives are possible without departing from this embodiment.
摘要翻译：在一个实施例中，提供了可以包括一个或多个操作的方法。这些操作中的一个可以至少部分地包括存储输入数据的请求，至少部分地基于一个或多个密钥加密输入数据，以生成输出数据以存储在存储器中。一个或多个键可以由远程机构授权。或者或另外，这些操作中的另一个可以至少部分地包括从存储器检索输入数据的请求，至少部分地基于至少一个密钥来解密输出数据。在不脱离本实施例的情况下，可以进行许多修改，变型和替换。

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