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1. 发明申请

US20060207188A1 Ceria abrasive for cmp 审中-公开
标题翻译：二氧化铈磨料为cmp
公开(公告)号：US20060207188A1
公开(公告)日：2006-09-21
申请号：US10550804
申请日：2004-05-14
申请人： Un-Gyu Paik , Jea-Gun Park , Sang-Kyun Kim , Takeo Katoh , Yong-Kook Park
发明人： Un-Gyu Paik , Jea-Gun Park , Sang-Kyun Kim , Takeo Katoh , Yong-Kook Park
IPC分类号： C09K3/14
CPC分类号： C09G1/02 , C09K3/1463 , H01L21/31053
摘要： The present invention relates to a CMP abrasive comprising a ceria slurry and a chemical additive having two or more functional groups by mixing and synthesizing a polymeric molecule and a monomer. Also, the present invention relates to a method for a manufacturing CMP abrasive by providing a ceria slurry, manufacturing a chemical additive having two or more functional groups by mixing and synthesizing of the polymeric molecule and the monomer in a reactor, and mixing said slurry and said chemical additive. Therefore, when the abrasive according to the present invention is used as an STI CMP abrasive, it is possible to apply the abrasive to the patterning process required in the very large scale integration semiconductor process. Furthermore, the CMP abrasive of the present invention has a superior removal rate, superior polishing selectivity, superior within wafer non-uniformity (WIWNU), and minimized occurrence of micro scratches.
摘要翻译：本发明涉及通过混合和合成聚合物分子和单体，其包含二氧化铈浆料和具有两个或更多个官能团的化学添加剂的CMP磨料。另外，本发明涉及通过提供二氧化铈浆料制造CMP研磨剂的方法，通过在反应器中混合和合成聚合物分子和单体制备具有两个或多个官能团的化学添加剂，并将所述浆料和说化学添加剂。因此，当将根据本发明的研磨剂用作STI CMP研磨剂时，可以将磨料施加到非常大规模的集成半导体工艺中所需的图案化工艺。此外，本发明的CMP磨料具有优异的去除速度，优异的抛光选择性，在晶片不均匀性（WIWNU）内优异，并且微小划痕的发生最小化。

2. 发明授权

US07833908B2 Slurry composition for chemical-mechanical polishing capable of compensating nanotopography effect and method for planarizing surface of semiconductor device using the same 有权
标题翻译：用于补偿纳米形貌效果的化学机械抛光的浆料组合物及使用其的半导体器件的平坦化表面的方法
公开(公告)号：US07833908B2
公开(公告)日：2010-11-16
申请号：US10556377
申请日：2004-05-11
申请人： Jea Gun Park , Takeo Katoh , Won Mo Lee , Hyun Goo Kang , Sung Jun Kim , Un Gyu Paik
发明人： Jea Gun Park , Takeo Katoh , Won Mo Lee , Hyun Goo Kang , Sung Jun Kim , Un Gyu Paik
IPC分类号： H01L21/302
CPC分类号： C09G1/02 , H01L21/31053
摘要： A slurry composition for chemical-mechanical polishing capable of compensating nanotopography effect present on the surface of a wafer, and a method for planarizing the surface of a semiconductor device that utilizes the same are disclosed. The slurry composition of the present invention is aimed at compensating the nanotopography effect during chemical mechanical polishing process of the oxide layer formed on the surface of the wafer, and contains abrasive particles and an additive, wherein the size of the abrasive particles and the concentration of the additive are controlled within predetermined ranges in order to control the deviation of thickness (OTD) of the oxide layer below a certain level after the chemical mechanical polishing process.
摘要翻译：公开了一种能够补偿晶片表面上存在的纳米形貌效应的用于化学机械抛光的浆料组合物，以及用于平面化利用其的半导体器件的表面的方法。本发明的浆料组合物旨在补偿在晶片表面形成的氧化物层的化学机械抛光过程中的纳米形貌作用，并且包含磨料颗粒和添加剂，其中磨料颗粒的尺寸和浓度将添加剂控制在预定范围内，以便在化学机械抛光处理之后控制氧化物层的厚度（OTD）低于一定水平的偏差。

3. 发明授权

US07491342B2 Bonded semiconductor substrate manufacturing method thereof 有权
标题翻译：其半导体衬底的制造方法
公开(公告)号：US07491342B2
公开(公告)日：2009-02-17
申请号：US10550761
申请日：2004-04-02
申请人： Eiji Kamiyama , Takeo Katoh , Jea Gun Park
发明人： Eiji Kamiyama , Takeo Katoh , Jea Gun Park
IPC分类号： B44C1/22 , C03C15/00 , C03C25/68 , H01L21/30 , H01L21/46
CPC分类号： H01L21/30608 , H01L21/76254
摘要： The present invention provides a bonded substrate fabricated to have its final active layer thickness of 200 nm or lower by performing the etching by only 1 nm to 1 μm with a solution having an etching effect on a surface of an active layer of a bonded substrate which has been prepared by bonding two substrates after one of them having been ion-implanted and then cleaving off a portion thereof by heat treatment. SC-1 solution is used for performing the etching. A polishing, a hydrogen annealing and a sacrificial oxidation may be respectively applied to the active layer before and/or after the etching. The film thickness of this active layer can be made uniform over the entire surface area and the surface roughness of the active layer can be reduced as well.
摘要翻译：本发明提供了一种键合衬底，其通过用键合衬底的有源层的表面上具有蚀刻效果的溶液进行仅1nm至1μm的蚀刻而使其最终有源层厚度为200nm以下的结合衬底，已经通过在其中一个被离子注入之后将两个基板接合，然后通过热处理来分离其一部分来制备。 SC-1溶液用于进行蚀刻。在蚀刻之前和/或之后，可以在有源层上分别施加抛光，氢退火和牺牲氧化。该有源层的膜厚度可以在整个表面积上均匀，并且活性层的表面粗糙度也可以降低。

4. 发明申请

US20090042390A1 ETCHANT FOR SILICON WAFER SURFACE SHAPE CONTROL AND METHOD FOR MANUFACTURING SILICON WAFERS USING THE SAME 审中-公开
标题翻译：用于硅晶片表面形状控制的蚀刻和使用其制造硅波的方法
公开(公告)号：US20090042390A1
公开(公告)日：2009-02-12
申请号：US11836493
申请日：2007-08-09
申请人： Sakae Koyata , Takeo Katoh , Tomohiro Hashii , Katsuhiko Murayama , Kazushige Takaishi
发明人： Sakae Koyata , Takeo Katoh , Tomohiro Hashii , Katsuhiko Murayama , Kazushige Takaishi
IPC分类号： H01L21/302 , C09K13/08
CPC分类号： H01L21/30608 , C09K13/02 , C09K13/08 , H01L21/02019
摘要： It is possible to reduce workloads of a both-side simultaneous polishing process or a single-side polishing process, and to achieve both of the maintenance of the wafer flatness and the reduction in wafer front side roughness upon completing a flattening process. A method for manufacturing silicon wafers according to the present invention includes a flattening process 13 of grinding or lapping front and back sides of a thin disc-shaped silicon wafer obtained by slicing a silicon single crystal ingot, an etching process of immersing the silicon wafer in an etchant for controlling a silicon wafer surface shape in which a fluorochemical surfactant is uniformly mixed in an alkaline aqueous solution to etch the front and back sides of the silicon wafer, and a both-side simultaneous polishing process 16 of simultaneously polishing the front and back sides of the etched silicon wafer or a single-side polishing process of polishing the front and back sides of the etched wafer for every side, in this order.
摘要翻译：可以减少双面同时抛光工艺或单面抛光工艺的工作量，并且在完成平坦化处理时实现晶片平整度的维持和晶片正面粗糙度的降低。根据本发明的硅晶片的制造方法包括：通过对硅单晶锭进行切片而得到的薄片状硅晶片的正面和背面进行研磨或研磨的平坦化工艺13，将硅晶片浸入的蚀刻工艺用于控制硅晶片表面形状的蚀刻剂，其中含氟表面活性剂在碱性水溶液中均匀混合以蚀刻硅晶片的正面和背面;以及双面同时抛光工艺16，同时抛光前后蚀刻的硅晶片的侧面或者对于每一侧抛光蚀刻后的晶片的正面和背面的单面抛光工艺。

5. 发明申请

US20070298614A1 Apparatus for etching wafer by single-wafer process and single wafer type method for etching wafer 失效
标题翻译：用于通过单晶片工艺蚀刻晶片的装置和用于蚀刻晶片的单晶片型方法
公开(公告)号：US20070298614A1
公开(公告)日：2007-12-27
申请号：US11893538
申请日：2007-08-15
申请人： Sakae Koyata , Tomohiro Hashii , Katsuhiko Murayama , Kazushige Takaishi , Takeo Katoh
发明人： Sakae Koyata , Tomohiro Hashii , Katsuhiko Murayama , Kazushige Takaishi , Takeo Katoh
IPC分类号： H01L21/306
CPC分类号： H01L21/6708 , H01L21/67075 , Y10S134/902
摘要： An apparatus for etching a wafer by a single-wafer process comprises a fluid supplying device which feeds an etching fluid on a wafer, and a wafer-chuck for horizontally holding the wafer. The wafer-chuck is equipped with a gas injection device for injecting a gas to the wafer, a first fluid-aspirating device, and a second fluid-aspirating device. The etching fluid supplied on the wafer is spread by a rotation of the wafer. The etching fluid is scattered by a centrifugal force, or flows down over an edge portion of the wafer and is blown-off by the gas injected from the gas injection unit, and is aspirated by the first fluid-aspirating device or the second fluid-aspirating device.
摘要翻译：用于通过单晶片工艺蚀刻晶片的设备包括：向晶片上供给蚀刻流体的流体供应装置和用于水平保持晶片的晶片卡盘。晶片卡盘配备有用于向晶片注入气体的气体注入装置，第一流体抽吸装置和第二流体抽吸装置。提供在晶片上的蚀刻流体通过晶片的旋转而扩展。蚀刻流体通过离心力而被散射，或者向下流过晶片的边缘部分，并且被从气体注入单元注入的气体吹出，并且被第一流体抽吸装置或第二流体吸入装置抽吸，吸气装置

6. 发明授权

US08379196B2 Method for judging whether semiconductor wafer is non-defective wafer by using laser scattering method 有权
标题翻译：通过使用激光散射法判断半导体晶片是否为缺陷晶片的方法
公开(公告)号：US08379196B2
公开(公告)日：2013-02-19
申请号：US12792148
申请日：2010-06-02
申请人： Eiji Kamiyama , Takashi Nakayama , Takeo Katoh
发明人： Eiji Kamiyama , Takashi Nakayama , Takeo Katoh
IPC分类号： G01N21/00
CPC分类号： G01N21/9501
摘要： A semiconductor wafer whose number of LPDs per wafer is equal to or smaller than a predetermined number is sorted out, and a judgment as to whether a semiconductor wafer is a non-defective wafer is made visually based on a haze map of the semiconductor wafer subjected to the sorting. Moreover, a semiconductor wafer whose number of LPDs per wafer is equal to or smaller than a predetermined number is sorted out. Then, from the semiconductor wafers subjected to the sorting, a semiconductor wafer whose in-plane standard deviation and in-plane average value of the haze signals in a wafer plane have a specific relationship is sorted out, and this semiconductor wafer is judged to be a non-defective wafer. In this way, a method for judging whether a semiconductor wafer is a non-defective wafer or a defective wafer, the method that can make a judgment more uniform and accurate without dependence on the difference in the S/N ratio between inspection apparatuses using a laser scattering method, is provided.
摘要翻译：对每个晶片的LPD的数量等于或小于预定数量的半导体晶片进行整理，并且根据半导体晶片的雾度图来视觉地判断半导体晶片是否为非缺陷晶片到排序。此外，整理出每个晶片的LPD的数量等于或小于预定数量的半导体晶片。然后，从进行分选的半导体晶片中，将晶片面内的雾度信号的面内标准偏差和面内平均值具有特定关系的半导体晶片整理出来，将该半导体晶片判定为无缺陷晶片。以这种方式，用于判断半导体晶片是否为缺陷晶片或缺陷晶片的方法，可以使得判断更均匀和准确而不依赖于使用a的检查装置之间的S / N比的差异的方法提供激光散射法。

7. 发明申请

US20100309461A1 METHOD FOR JUDGING WHETHER SEMICONDUCTOR WAFER IS NON-DEFECTIVE WAFER BY USING LASER SCATTERING METHOD 有权
标题翻译：通过使用激光散射方法判断半导体波形是非缺陷波形的方法
公开(公告)号：US20100309461A1
公开(公告)日：2010-12-09
申请号：US12792148
申请日：2010-06-02
申请人： Eiji Kamiyama , Takashi Nakayama , Takeo Katoh
发明人： Eiji Kamiyama , Takashi Nakayama , Takeo Katoh
IPC分类号： G01N21/00
CPC分类号： G01N21/9501
摘要： A semiconductor wafer whose number of LPDs per wafer is equal to or smaller than a predetermined number is sorted out, and a judgment as to whether a semiconductor wafer is a non-defective wafer is made visually based on a haze map of the semiconductor wafer subjected to the sorting. Moreover, a semiconductor wafer whose number of LPDs per wafer is equal to or smaller than a predetermined number is sorted out. Then, from the semiconductor wafers subjected to the sorting, a semiconductor wafer whose in-plane standard deviation and in-plane average value of the haze signals in a wafer plane have a specific relationship is sorted out, and this semiconductor wafer is judged to be a non-defective wafer. In this way, a method for judging whether a semiconductor wafer is a non-defective wafer or a defective wafer, the method that can make a judgment more uniform and accurate without dependence on the difference in the S/N ratio between inspection apparatuses using a laser scattering method, is provided.
摘要翻译：对每个晶片的LPD的数量等于或小于预定数量的半导体晶片进行整理，并且根据半导体晶片的雾度图来视觉地判断半导体晶片是否为非缺陷晶片到排序。此外，整理出每个晶片的LPD的数量等于或小于预定数量的半导体晶片。然后，从进行分选的半导体晶片中，将晶片面内的雾度信号的面内标准偏差和面内平均值具有特定关系的半导体晶片整理出来，将该半导体晶片判定为无缺陷晶片。以这种方式，用于判断半导体晶片是否为缺陷晶片或缺陷晶片的方法，可以使得判断更均匀和准确而不依赖于使用a的检查装置之间的S / N比的差异的方法提供激光散射法。

8. 发明授权

US07601644B2 Method for manufacturing silicon wafers 失效
标题翻译：硅片制造方法
公开(公告)号：US07601644B2
公开(公告)日：2009-10-13
申请号：US11597169
申请日：2005-09-02
申请人： Sakae Koyata , Tomohiro Hashii , Katsuhiko Murayama , Kazushige Takaishi , Takeo Katoh
发明人： Sakae Koyata , Tomohiro Hashii , Katsuhiko Murayama , Kazushige Takaishi , Takeo Katoh
IPC分类号： H01L21/311
CPC分类号： B24B37/042 , H01L21/02019 , H01L21/30604
摘要： This silicon wafer production process comprises in the order indicated a planarization step, in which the front surface and the rear surface of a wafer are ground or lapped, a single-wafer acid etching step, in which an acid etching liquid is supplied to the surface of the wafer while spinning and the entire wafer surface is etched to control the surface roughness Ra to 0.20 μm or less, and a double-sided simultaneous polishing step, in which the front surface and the rear surface of the acid etched wafer are polished simultaneously. The process may comprise a single-sided polishing step, in which the top and bottom of the acid etched wafer are polished in turn, instead of the double-sided simultaneously polishing step.
摘要翻译：该硅晶片制造方法按照顺序包括将晶片的前表面和后表面研磨或研磨的平坦化步骤，单晶片酸蚀刻步骤，其中将酸蚀刻液体供应到表面并且整个晶片表面被蚀刻以将表面粗糙度Ra控制到0.20μm或更小，以及双面同时抛光步骤，其中酸蚀刻晶片的前表面和后表面被同时抛光。该方法可以包括单面抛光步骤，其中依次抛光酸蚀晶片的顶部和底部，而不是双面同时抛光步骤。

9. 发明申请

US20090053894A1 Method for Manufacturing Epitaxial Wafer 有权
标题翻译：制造外延晶片的方法
公开(公告)号：US20090053894A1
公开(公告)日：2009-02-26
申请号：US12162732
申请日：2007-01-24
申请人： Sakae Koyata , Kazushige Takaishi , Tomohiro Hashii , Katsuhiko Murayama , Takeo Katoh
发明人： Sakae Koyata , Kazushige Takaishi , Tomohiro Hashii , Katsuhiko Murayama , Takeo Katoh
IPC分类号： H01L21/302
CPC分类号： H01L21/30604 , C30B25/02 , C30B25/18 , C30B29/06 , H01L21/02008 , H01L21/02019 , H01L21/02381 , H01L21/02532 , H01L21/02634 , H01L21/02658
摘要： A method for manufacturing an epitaxial wafer that can reduce occurrence of a surface defect or a slip formed on an epitaxial layer is provided. The manufacturing method is characterized by comprising: a smoothing step of controlling application of an etchant to a wafer surface in accordance with a surface shape of a silicon wafer to smooth the wafer surface; and an epitaxial layer forming step of forming an epitaxial layer formed of a silicon single crystal on the surface of the wafer based on epitaxial growth.
摘要翻译：提供一种制造能够减少在外延层上形成的表面缺陷或滑动的发生的外延晶片的方法。该制造方法的特征在于包括：平滑步骤，根据硅晶片的表面形状控制蚀刻剂对晶片表面的施加，以平滑晶片表面; 以及基于外延生长在晶片的表面上形成由硅单晶形成的外延层的外延层形成步骤。

10. 发明授权

US07488400B2 Apparatus for etching wafer by single-wafer process 失效
标题翻译：用于通过单晶片工艺蚀刻晶片的装置
公开(公告)号：US07488400B2
公开(公告)日：2009-02-10
申请号：US11582880
申请日：2006-10-17
申请人： Sakae Koyata , Tomohiro Hashii , Katsuhiko Murayama , Kazushige Takaishi , Takeo Katoh
发明人： Sakae Koyata , Tomohiro Hashii , Katsuhiko Murayama , Kazushige Takaishi , Takeo Katoh
IPC分类号： H01L21/306 , H01L21/302
CPC分类号： H01L21/6708 , H01L21/67075 , Y10S134/902
摘要： An apparatus for etching a wafer by a single-wafer process comprises a fluid supplying device which feeds an etching fluid on a wafer, and a wafer-chuck for horizontally holding the wafer. The wafer-chuck is equipped with a gas injection device for injecting a gas to the wafer, a first fluid-aspirating device, and a second fluid-aspirating device. The etching fluid supplied on the wafer is spread by a rotation of the wafer. The etching fluid is scattered by a centrifugal force, or flows down over an edge portion of the wafer and is blown-off by the gas injected from the gas injection unit, and is aspirated by the first fluid-aspirating device or the second fluid-aspirating device.
摘要翻译：用于通过单晶片工艺蚀刻晶片的设备包括：向晶片上供给蚀刻流体的流体供应装置和用于水平保持晶片的晶片卡盘。晶片卡盘配备有用于向晶片注入气体的气体注入装置，第一流体抽吸装置和第二流体抽吸装置。提供在晶片上的蚀刻流体通过晶片的旋转而扩展。蚀刻流体通过离心力而被散射，或者向下流过晶片的边缘部分，并且被从气体注入单元注入的气体吹出，并且被第一流体抽吸装置或第二流体吸入装置抽吸，吸气装置

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