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    • 5. 发明授权
    • Method of fabricating a nickel silicide on a substrate
    • 在衬底上制造硅化镍的方法
    • US06720258B2
    • 2004-04-13
    • US10319313
    • 2002-12-12
    • Jer-shen MaaDouglas J. TweetYoshi OnoFengyan ZhangSheng Teng Hsu
    • Jer-shen MaaDouglas J. TweetYoshi OnoFengyan ZhangSheng Teng Hsu
    • H01L2144
    • H01L21/28518H01L29/456
    • An integrated circuit device, and a method of manufacturing the same, comprises an epitaxial nickel silicide on (100) Si, or a stable nickel silicide on amorphous Si, fabricated with a cobalt interlayer. In one embodiment the method comprises depositing a cobalt (Co) interface layer between the Ni and Si layers prior to the silicidation reaction. The cobalt interlayer regulates the flux of the Ni atoms through the cobalt/nickel/silicon alloy layer formed from the reaction of the cobalt interlayer with the nickel and the silicon so that the Ni atoms reach the Si interface at a similar rate, i.e., without any orientation preference, so as to form a uniform layer of nickel silicide. The nickel silicide may be annealed to form a uniform crystalline nickel disilicide. Accordingly, a single crystal nickel silicide on (100) Si or on amorphous Si is achieved wherein the nickel silicide has improved stability and may be utilized in ultra-shallow junction devices.
    • 集成电路器件及其制造方法包括在(100)Si上的外延硅化镍,或者由钴中间层制造的在非晶Si上的稳定的硅化镍。 在一个实施方案中,该方法包括在硅化反应之前在Ni和Si层之间沉积钴(Co)界面层。 钴中间层通过由钴中间层与镍和硅的反应形成的钴/镍/硅合金层调节Ni原子的通量,使得Ni原子以相似的速率到达Si界面,即没有 任何取向偏好,从而形成均匀的硅化镍层。 可以将镍硅化物退火以形成均匀的结晶二硅化镍。 因此,实现了(100)Si或非晶Si上的单晶硅化镍,其中硅化镍具有改进的稳定性并可用于超浅结结器件中。
    • 6. 发明授权
    • Iridium conductive electrode/barrier structure and method for same
    • 铱导电电极/屏障结构及方法相同
    • US06682995B2
    • 2004-01-27
    • US10317742
    • 2002-12-11
    • Fengyan ZhangJer-shen MaaSheng Teng Hsu
    • Fengyan ZhangJer-shen MaaSheng Teng Hsu
    • H01L213205
    • H01L29/456H01L21/28291H01L28/55H01L28/65
    • A conductive barrier, useful as a ferroelectric capacitor electrode, having high temperature stability has been provided. This conductive barrier permits the use of iridium (Ir) metal in IC processes involving annealing. Separating silicon substrate from Ir film with an intervening, adjacent, tantalum (Ta) film has been found to very effective in suppressing diffusion between layers. The Ir prevents the interdiffusion of oxygen into the silicon during annealing. A Ta or TaN layer prevents the diffusion of Ir into the silicon. This Ir/TaN structure protects the silicon interface so that adhesion, conductance, hillock, and peeling problems are minimized. The use of Ti overlying the Ir/TaN structure also helps prevent hillock formation during annealing. A method of forming a multilayer Ir conductive structure and Ir ferroelectric electrode are also provided.
    • 已经提供了具有高温稳定性的导电阻挡层,其可用作铁电电容器电极。 该导电屏障允许在涉及退火的IC工艺中使用铱(Ir)金属。 已经发现,分离硅衬底与Ir膜与中间相邻的钽(Ta)膜非常有效地抑制层之间的扩散。 Ir防止退火过程中氧进入硅的相互扩散。 Ta或TaN层防止Ir扩散到硅中。 这种Ir / TaN结构保护了硅界面,从而使粘附,电导,小丘和剥离问题最小化。 使用覆盖Ir / TaN结构的Ti也有助于防止退火过程中的小丘形成。 还提供了形成多层Ir导电结构和Ir铁电电极的方法。
    • 7. 发明授权
    • Process integration of Si1-xGex CMOS with Si1-xGex relaxation after STI formation
    • STI形成后Si1-xGex CMOS与Si1-xGex弛豫过程的整合
    • US06583000B1
    • 2003-06-24
    • US10072183
    • 2002-02-07
    • Sheng Teng HsuJong-Jan LeeJer-shen MaaDouglas James Tweet
    • Sheng Teng HsuJong-Jan LeeJer-shen MaaDouglas James Tweet
    • H01L218238
    • H01L21/823807H01L21/76224H01L21/823878
    • A method of forming a CMOS device includes preparing a silicon substrate, including forming plural device regions on the substrate; epitaxially forming a strained SiGe layer on the substrate, wherein the SiGe layer has a germanium content of between about 20% and 40%; forming a silicon cap layer epitaxially on the SiGe layer; depositing a gate oxide layer; depositing a first polysilicon layer; implanting H+ ions to a depth below the SiGe layer; forming a trench by shallow trench isolation which extends into the substrate; annealing the structure at a temperature of between about 700° C. to 900° C. for between about five minutes to sixty minutes; depositing an oxide layer and a second polysilicon layer, thereby filling the trench; planarizing the structure to the top of the level of the portion of the second polysilicon layer which is located in the trench; and completing the CMOS device.
    • 形成CMOS器件的方法包括制备硅衬底,包括在衬底上形成多个器件区域; 在衬底上外延地形成应变SiGe层,其中SiGe层的锗含量在约20%和40%之间; 在SiGe层上外延地形成硅帽层; 沉积栅氧化层; 沉积第一多晶硅层; 将H +离子注入SiGe层以下的深度; 通过延伸到衬底中的浅沟槽隔离形成沟槽; 在约700℃至900℃的温度下退火结构约5分钟至60分钟; 沉积氧化物层和第二多晶硅层,从而填充沟槽; 将结构平面化到位于沟槽中的第二多晶硅层的部分的顶部的顶部; 并完成CMOS设备。
    • 8. 发明授权
    • Composite iridium-metal-oxygen barrier structure with refractory metal companion barrier and method for same
    • 复合铱金属 - 氧阻隔结构与难熔金属伴侣屏障及其方法相同
    • US06190963B1
    • 2001-02-20
    • US09316661
    • 1999-05-21
    • Fengyan ZhangSheng Teng HsuJer-shen MaaWei-Wei Zhuang
    • Fengyan ZhangSheng Teng HsuJer-shen MaaWei-Wei Zhuang
    • H01L218242
    • H01L28/75H01L21/28568H01L28/55
    • An Ir—M—O composite film has been provided that is useful in forming an electrode of a ferroelectric capacitor, where M includes a variety of refractory metals. The Ir combination film is resistant to high temperature annealing in oxygen environments. When used with an underlying barrier layer made from the same variety of M transition metals, the resulting conductive barrier also suppresses to diffusion of Ir into any underlying Si substrates. As a result, Ir silicide products are not formed, which degrade the electrode interface characteristics. That is, the Ir combination film remains conductive, not peeling or forming hillocks, during high temperature annealing processes, even in oxygen. The Ir—M—O conductive electrode/barrier structures are useful in nonvolatile FeRAM devices, DRAMs, capacitors, pyroelectric infrared sensors, optical displays, optical switches, piezoelectric transducers, and surface acoustic wave devices. A method for forming an Ir—M—O composite film barrier layer and an Ir—M—O composite film ferroelectric electrode are also provided.
    • 已经提供了可用于形成铁电电容器的电极的Ir-M-O复合膜,其中M包括各种难熔金属。 Ir组合膜在氧气环境中耐高温退火。 当与由相同种类的M过渡金属制成的底层阻挡层一起使用时,所得到的导电屏障还抑制Ir扩散到任何下面的Si衬底中。 结果,不形成铱硅化物产物,这降低了电极界面的特性。 也就是说,即使在氧气中,Ir组合膜在高温退火过程中仍保持导电性,不会剥离或形成小丘。 Ir-M-O导电电极/屏障结构可用于非易失性FeRAM器件,DRAM,电容器,热释电红外传感器,光学显示器,光开关,压电换能器和表面声波器件。 还提供了形成Ir-M-O复合膜阻挡层和Ir-M-O复合膜铁电电极的方法。