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    • 7. 发明授权
    • Semiconductor memory device
    • 半导体存储器件
    • US5703817A
    • 1997-12-30
    • US748779
    • 1996-11-14
    • Shinichiro ShiratakeDaisaburo TakashimaKenji TsuchidaTsuneo Inaba
    • Shinichiro ShiratakeDaisaburo TakashimaKenji TsuchidaTsuneo Inaba
    • H01L21/82G11C11/401G11C17/00G11C29/00G11C29/04G11C29/44H01L21/8242H01L27/10H01L27/108G11C7/00
    • G11C29/785G11C29/44G11C29/804G11C29/808
    • A plurality of memory cells are arranged at crosspoints between a plurality of word lines and a plurality of bit lines. The memory cells include not only normal cells but also spare cells for saving defects. The saving of the defect is effected by replacing the word line or bit line connected to the normal cell with the word line or bit line connected to the spare cell. The replacement is effected by a corresponding pair of fuse circuit and deciding circuit, that is, the fuse circuit for storing the address of a word line or bit line to be replaced and the deciding circuit for, based on the address, deciding whether or not an accessed word line or bit line be replaced. As such a pair use is made of a plurality of pairs and a plurality of kinds are provided as the word lines or bit lines for replacement and can be used in accordance with the size of defects. It is, therefore, possible to effectively save the defective word line or bit line, while avoiding any uneffective replacement.
    • 多个存储单元被布置在多个字线和多个位线之间的交叉点处。 存储单元不仅包括正常单元格,还包括用于保存缺陷的备用单元。 通过用连接到备用单元的字线或位线替换连接到正常单元的字线或位线来实现缺陷的保存。 该替换由对应的熔丝电路和判定电路对,即用于存储要替换的字线或位线的地址的熔丝电路和基于该地址的判定电路来决定是否 访问的字线或位线被替换。 这样一对使用由多对构成,并且提供多种类型作为用于替换的字线或位线,并且可以根据缺陷的尺寸使用。 因此,可以有效地保存有缺陷的字线或位线,同时避免任何不必要的更换。
    • 9. 发明申请
    • SPIN INJECTION WRITE TYPE MAGNETIC MEMORY DEVICE
    • 旋转注射式磁性记忆装置
    • US20070206406A1
    • 2007-09-06
    • US11673241
    • 2007-02-09
    • Yoshihiro UedaKenji TsuchidaTsuneo InabaKiyotaro Itagaki
    • Yoshihiro UedaKenji TsuchidaTsuneo InabaKiyotaro Itagaki
    • G11C11/00
    • G11C11/16Y10S977/935
    • A spin injection write type magnetic memory device includes memory cells which have a magnetoresistance effect element and a select transistor. The magnetoresistance effect element has one end connected to a first node. The select transistor has a first diffusion area connected to another end of the magnetoresistance effect element and a second diffusion area connected to a second node. A select line extends along a first direction and is connected to a gate electrode of the select transistor. A first interconnect extends along a second direction and is connected to the first node. A second interconnect extends along the second direction and is connected to the second node. Two of the memory cells adjacent along the first direction share the first node. Two of the memory cells adjacent along the second direction share the second node.
    • 自旋注入写入型磁存储器件包括具有磁阻效应元件和选择晶体管的存储单元。 磁阻效应元件的一端连接到第一节点。 选择晶体管具有连接到磁阻效应元件的另一端的第一扩散区域和连接到第二节点的第二扩散区域。 选择线沿着第一方向延伸并连接到选择晶体管的栅电极。 第一互连沿着第二方向延伸并连接到第一节点。 第二互连沿着第二方向延伸并且连接到第二节点。 沿着第一方向相邻的两个存储单元共享第一节点。 沿着第二方向相邻的两个存储单元共享第二节点。