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1. 发明授权

US09257635B2 Memory element and memory device 有权
标题翻译：存储器元件和存储器件
公开(公告)号：US09257635B2
公开(公告)日：2016-02-09
申请号：US14752126
申请日：2015-06-26
申请人： Sony Corporation
发明人： Hiroyuki Ohmori , Masanori Hosomi , Kazuhiro Bessho , Yutaka Higo , Kazutaka Yamane , Hiroyuki Uchida , Tetsuya Asayama
IPC分类号： G11C11/00 , H01L43/10 , H01L43/02 , H01L43/08
CPC分类号： H01L43/10 , G11C11/161 , H01L43/02 , H01L43/08 , Y10S977/933 , Y10S977/935
摘要： Spin transfer torque memory elements and memory devices are provided. In one embodiment, the spin transfer torque memory element includes a first portion including CoFeB, a second portion including CoFeB, an intermediate portion interposed between the first and second portions, a third portion adjoining the second portion opposite the intermediate portion, and a fourth portion adjoining the third portion opposite the second portion. The intermediate portion includes MgO. The third portion includes at least one of Ag, Au, Cr, Cu, Hf, Mo, Nb, Os, Re, Ru, Ta, W, and Zr. The fourth portion includes at least alloy of CoPt, FePt, and Ru.
摘要翻译：提供自旋转矩记忆元件和存储器件。在一个实施例中，自旋转移转矩存储元件包括包括CoFeB的第一部分，包括CoFeB的第二部分，介于第一和第二部分之间的中间部分，邻接与中间部分相对的第二部分的第三部分，以及第四部分邻接与第二部分相对的第三部分。中间部分包括MgO。第三部分包括Ag，Au，Cr，Cu，Hf，Mo，Nb，Os，Re，Ru，Ta，W和Zr中的至少一种。第四部分至少包括CoPt，FePt和Ru的合金。

2. 发明授权

US09129893B2 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US09129893B2
公开(公告)日：2015-09-08
申请号：US14504392
申请日：2014-10-01
申请人： RENESAS ELECTRONICS CORPORATION
发明人： Fumihiko Nitta
IPC分类号： H01L27/22 , G11C11/14 , H01L43/02 , H01L29/82 , H01L43/12 , H01L43/08 , B82Y10/00
CPC分类号： H01L27/228 , B82Y10/00 , G11C11/14 , G11C11/161 , G11C11/1655 , G11C11/1659 , G11C11/1675 , H01L27/222 , H01L27/226 , H01L29/82 , H01L43/02 , H01L43/08 , H01L43/12 , Y10S977/935
摘要： A semiconductor device includes: a spin torque written in-plane magnetization magnetoresistive element, placed over the main surface of a semiconductor substrate, whose magnetization state can be changed according to the direction of a current flow; and a first wiring electrically coupled with the magnetoresistive element and extended toward the direction along the main surface. The aspect ratio of the magnetoresistive element as viewed in a plane is a value other than 1. In a memory cell area where multiple memory cells in which the magnetoresistive element and a switching element are electrically coupled with each other are arranged, the following measure is taken: multiple magnetoresistive elements adjoining to each other in the direction of length of each magnetoresistive element as viewed in a plane are so arranged that they are not on an identical straight line extended in the direction of length.
摘要翻译：半导体器件包括：写入面内磁化磁阻元件的自旋转矩，放置在半导体衬底的主表面上，其磁化状态可以根据电流方向改变; 以及与磁阻元件电耦合并沿着主表面的方向延伸的第一布线。在平面中观察的磁阻元件的纵横比是除了1以外的值。在其中布置有磁阻元件和开关元件彼此电耦合的多个存储单元的存储单元区域中，以下措施是采取：在平面中看到的每个磁阻元件的长度方向上彼此相邻的多个磁阻元件被布置成使得它们不在长度方向上延伸的相同的直线上。

3. 发明授权

US09030866B1 Initialization method of a perpendicular magnetic random access memory (MRAM) device 有权
公开(公告)号：US09030866B1
公开(公告)日：2015-05-12
申请号：US14595059
申请日：2015-01-12
申请人： Avalanche Technology, Inc.
发明人： Yuchen Zhou , Yiming Huai
IPC分类号： G11C11/00 , G11C11/16
CPC分类号： G11C11/16 , G11C11/161 , G11C11/5607 , G11C2013/0083 , Y10S977/933 , Y10S977/935
摘要： Methods using a sequence of externally generated magnetic fields to initialize the magnetization directions of each of the layers in perpendicular MTJ MRAM elements for data and reference bits when the required magnetization directions are anti-parallel are described. The coercivity of the fixed pinned and reference layers can be made unequal so that one of them can be switched by a magnetic field that will reliably leave the other one unswitched. Embodiments of the invention utilize the different effective coercivity fields of the pinned, reference and free layers to selectively switch the magnetization directions using a sequence of magnetic fields of decreasing strength. Optionally the chip or wafer can be heated to reduce the required field magnitude. It is possible that the first magnetic field in the sequence can be applied during an annealing step in the MRAM manufacture process.

4. 发明授权

US09007820B2 Device consisting of various thin films and use of such a device 有权
标题翻译：由各种薄膜组成的装置和使用这种装置
公开(公告)号：US09007820B2
公开(公告)日：2015-04-14
申请号：US14006809
申请日：2012-03-23
申请人： Manuel Bibes
发明人： Manuel Bibes
IPC分类号： G11C11/00 , G11C11/16 , H01L43/08 , G11C11/22 , H01L43/02
CPC分类号： G11C11/1675 , G11C11/161 , G11C11/221 , H01L43/02 , H01L43/08 , Y10S977/933 , Y10S977/935
摘要： A device comprising: an assembly consisting of two, respectively upper and lower thin layers each forming a ferromagnetic element and separated by a thin layer forming a non magnetic element, said assembly being made up so that the layers forming the ferromagnetic elements are magnetically coupled through the layer forming a non magnetic element; an electrode, a layer forming a ferroelectric element in which the polarization may be oriented in several directions by applying an electric voltage through said layer, said layer forming a ferroelectric element being positioned between the layer forming a lower ferromagnetic element and the electrode; said device being configured so as to allow control of the magnetic configuration of the layers forming ferromagnetic elements by the direction of the polarization in the layer forming a ferroelectric element.
摘要翻译：一种装置，包括：由两个分别上部和下部薄层组成的组件，每个薄层各自形成铁磁元件并由形成非磁性元件的薄层分隔开，所述组件构成使得形成铁磁性元件的层通过所述层形成非磁性元件; 电极，形成铁电体元件的层，其中极化可以通过施加电压通过所述层在多个方向取向，所述层形成铁电元件位于形成下铁磁元件的层与电极之间; 所述器件被配置为允许通过形成铁电元件的层中的极化方向来控制形成铁磁元件的层的磁性构造。

5. 发明授权

US09001574B2 Spin logic based on persistent spin helices 有权
标题翻译：基于持续旋转螺旋的旋转逻辑
公开(公告)号：US09001574B2
公开(公告)日：2015-04-07
申请号：US13898589
申请日：2013-05-21
申请人： International Business Machines Corporation
发明人： Andreas Fuhrer , Gian R Salis
IPC分类号： G11C11/14 , G11C11/16 , H01L29/66
CPC分类号： G11C11/1673 , G11C11/1675 , H01L29/66984 , H03K19/23 , Y10S977/933 , Y10S977/935
摘要： A spin logic device which includes an electron confinement layer confining an electron gas in a two-dimensional area (2DEG) subtended by a direction x and a direction y, the latter perpendicular to the former. The spin logic device is configured for the 2DEG to support a persistent spin helix (PSH) formed therein with a given spin component oscillating with periodicity λ along direction x but not oscillating along direction y. Majority logic circuit of the spin logic device includes: at least one input device energizable to create respective local spin-polarizations of the 2DEG in first regions of the confinement layer. The input device is configured to detect in a second region of the confinement layer an average spin-polarization of the 2DEG diffused through resulting PSHs, wherein a projection of a distance between the second region and first regions onto direction x is equal to nλ/a, n integer, a equal to 2 or 4.
摘要翻译：一种自旋逻辑器件，其包括电子限制层，该电子限制层将电子气体限制在由方向x和方向y对准的二维区域（2DEG）中，后者垂直于前者。自旋逻辑器件配置用于2DEG支持其中形成的持续自旋螺旋（PSH），其中给定的旋转分量以沿方向x的周期性λ振荡但不沿着y方向振荡。自旋逻辑器件的多数逻辑电路包括：至少一个输入装置，其能够激发以在约束层的第一区域中产生2DEG的相应的局部自旋极化。输入装置被配置为在限制层的第二区域中检测通过所得PSH扩散的2DEG的平均自旋极化，其中第二区域和第一区域之间在方向x上的距离的投影等于nλ/ a ，n整数，等于2或4。

6. 发明授权

US08982600B2 Magnetic memory including magnetic nanowire and write method therein 有权
标题翻译：磁记忆体，包括磁纳米线及其中的写入方法
公开(公告)号：US08982600B2
公开(公告)日：2015-03-17
申请号：US14044089
申请日：2013-10-02
申请人： Kabushiki Kaisha Toshiba
发明人： Shiho Nakamura , Tsuyoshi Kondo , Hirofumi Morise , Takuya Shimada
IPC分类号： G11C19/00 , H01L43/02 , G11C11/16 , H01L43/08 , H01L27/22 , B82Y99/00
CPC分类号： H01L43/02 , B82Y25/00 , G11C11/161 , G11C11/1673 , G11C11/1675 , G11C11/18 , H01F1/0072 , H01L27/222 , H01L43/08 , Y10S977/933 , Y10S977/935
摘要： A magnetic memory according to an embodiment includes: a magnetic nanowire; a first electrode and a second electrode provided to different locations of the magnetic nanowire; a third electrode including a magnetic layer, the third electrode being provided to a location of the magnetic nanowire between the first electrode and the second electrode; an intermediate layer provided between the magnetic nanowire and the third electrode, the intermediate layer being in contact with the magnetic nanowire and the third electrode; a fourth electrode of a nonmagnetic material provided onto the magnetic nanowire and being on the opposite side of the magnetic wire from the third electrode; and an insulating layer provided between the magnetic nanowire and the fourth electrode, the insulating layer being in contact with the magnetic nanowire and the fourth electrode.
摘要翻译：根据实施例的磁存储器包括：磁性纳米线; 设置在所述磁性纳米线的不同位置的第一电极和第二电极; 包括磁性层的第三电极，所述第三电极设置在所述第一电极和所述第二电极之间的所述磁性纳米线的位置; 设置在所述磁性纳米线与所述第三电极之间的中间层，所述中间层与所述磁性纳米线和所述第三电极接触; 设置在所述磁性纳米线上并且位于与所述第三电极相对的所述磁性线的相反侧的非磁性材料的第四电极; 以及设置在所述磁性纳米线与所述第四电极之间的绝缘层，所述绝缘层与所述磁性纳米线和所述第四电极接触。

7. 发明授权

US08976578B2 Memory element and memory apparatus 有权
标题翻译：存储器元件和存储器件
公开(公告)号：US08976578B2
公开(公告)日：2015-03-10
申请号：US13675725
申请日：2012-11-13
申请人： Sony Corporation
发明人： Yutaka Higo , Masanori Hosomi , Hiroyuki Ohmori , Kazuhiro Bessho , Tetsuya Asayama , Kazutaka Yamane , Hiroyuki Uchida
IPC分类号： G11C11/00 , G11C11/16
CPC分类号： G11C11/161 , Y10S977/933 , Y10S977/935
摘要： A memory element has a layered configuration, including a memory layer in which a magnetization direction is changed corresponding to information; the magnetization direction being changed by applying a current in a lamination direction of the layered configuration to record the information in the memory layer, a magnetization-fixed layer in which a magnetization direction is fixed, an intermediate layer that is formed of a non-magnetic material and is provided between the memory layer and the magnetization-fixed layer, and a perpendicular magnetic anisotropy inducing layer, the memory layer including a first ferromagnetic layer, a first bonding layer, a second ferromagnetic layer, a second bonding layer and a third ferromagnetic layer laminated in the stated order.
摘要翻译：存储元件具有分层结构，包括其中磁化方向根据信息而改变的存储层; 通过在分层结构的叠层方向上施加电流来改变磁化方向，以将信息记录在存储层中，磁化方向固定的磁化固定层，由非磁性材料形成的中间层材料，并且设置在存储层和磁化固定层之间，以及垂直磁各向异性诱导层，所述存储层包括第一铁磁层，第一结合层，第二铁磁层，第二结合层和第三铁磁性层层以所述顺序层压。

8. 发明授权

US08976577B2 High density magnetic random access memory 有权
标题翻译：高密度磁随机存取存储器
公开(公告)号：US08976577B2
公开(公告)日：2015-03-10
申请号：US13554467
申请日：2012-07-20
申请人： Tom A. Agan , Alexander Mikhailovich Shukh
发明人： Tom A. Agan , Alexander Mikhailovich Shukh
IPC分类号： G11C11/00 , G11C11/16
CPC分类号： G11C11/161 , G11C11/1675 , Y10S977/933 , Y10S977/935
摘要： One embodiment of a magnetic memory device comprises a substrate and a plurality of planar memory arrays stacked on the substrate, each memory array includes a plurality of parallel first conductive lines, each first conductive line includes a ferromagnetic cladding, a plurality of parallel second conductive lines overlapping the first conductive lines at a plurality of intersection regions, a plurality of magnetic tunnel junctions, each magnetic tunnel junction has a controllable electrical resistance, is disposed at an intersection region and electrically coupled to one of the first conductive lines at its first end and to one of the second conductive lines at its second end. The electrical resistance of the magnetic tunnel junction is controlled by a joint effect of a spin-polarized current running between the first and second ends and a bias magnetic field applied simultaneously to said each magnetic tunnel junction. Other embodiments are described and shown.
摘要翻译：磁存储器件的一个实施例包括衬底和堆叠在衬底上的多个平面存储器阵列，每个存储器阵列包括多个平行的第一导电线，每个第一导线包括铁磁包层，多个平行的第二导线在多个交叉区域中重叠第一导线，每个磁性隧道结具有可控电阻的多个磁性隧道结，设置在交叉区域处，并在其第一端电耦合到第一导线之一，到其第二端的第二导线之一。磁隧道结的电阻通过在第一和第二端之间运行的自旋极化电流和与所述每个磁性隧道结同时施加的偏置磁场的联合效应来控制。描述和示出了其他实施例。

9. 发明授权

US08860006B2 Spin transistor having multiferroic gate dielectric 有权
标题翻译：具有多栅极电介质的自旋晶体管
公开(公告)号：US08860006B2
公开(公告)日：2014-10-14
申请号：US13071934
申请日：2011-03-25
申请人： Kang-Lung Wang , Ajey Poovannummoottil , Faxian Xiu
发明人： Kang-Lung Wang , Ajey Poovannummoottil , Faxian Xiu
IPC分类号： H01L43/00 , B82Y10/00 , H01L29/66 , H01L29/51 , H01L29/12 , H01L29/423 , H01L29/06
CPC分类号： H01L29/517 , B82Y10/00 , H01L29/0673 , H01L29/122 , H01L29/42356 , H01L29/66984 , Y10S977/935
摘要： A carrier-mediated magnetic phase change spin transistor is disclosed. In general, the spin transistor includes a Dilute Magnetic Semiconductor (DMS) channel and a gate stack formed on the DMS channel. The gate stack includes a multiferroic gate dielectric on the DMS channel, and a gate contact on a surface of the multiferroic gate dielectric opposite the DMS channel. The multiferroic gate dielectric is formed of a multiferroic material that exhibits a cross-coupling between magnetic and electric orders (i.e., magnetoelectric coupling), which in one embodiment is BiFeO3 (BFO). As a result, the multiferroic material layer enables an electrically modulated magnetic exchange bias that enhances paramagnetic to ferromagnetic switching of the DMS channel. The DMS channel is formed of a DMS material, which in one embodiment is Manganese Germanium (MnGe). In one embodiment, the DMS channel is a nanoscale DMS channel.
摘要翻译：公开了载体介导的磁相变自旋晶体管。通常，自旋晶体管包括稀疏磁性半导体（DMS）通道和形成在DMS通道上的栅极堆叠。栅极堆叠包括在DMS通道上的多铁栅极电介质，以及与DMS沟道相对的多铁栅极电介质的表面上的栅极接触。多铁栅极电介质由表现出磁和电顺序（即磁电耦合）之间的交叉耦合的多铁性材料形成，在一个实施例中是BiFeO 3（BFO）。结果，多铁性材料层能够实现电磁调节的磁性交换偏置，其增强DMS通道的顺磁性到铁磁性切换。 DMS通道由DMS材料形成，在一个实施方案中，其为锰锗（MnGe）。在一个实施例中，DMS信道是纳米级DMS信道。

10. 发明申请

US20140169080A1 THERMAL SPIN TORQURE TRANSFER MAGNETORESISTIVE RANDOM ACCESS MEMORY 有权
公开(公告)号：US20140169080A1
公开(公告)日：2014-06-19
申请号：US13717079
申请日：2012-12-17
申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION
发明人： Daniel C. Worledge , Guohan Hu
IPC分类号： G11C11/16 , H01L29/82
CPC分类号： G11C11/16 , G11C11/161 , G11C11/1675 , H01L43/08 , Y10S977/933 , Y10S977/935
摘要： A thermal spin torque transfer magnetoresistive random access memory (MRAM) apparatus includes a magnetic tunnel junction and a tunnel junction programming circuit. The magnetic tunnel junction includes a reference layer having a fixed magnetic polarity, a tunnel barrier layer, and a free layer on an opposite side of the tunnel barrier layer from the reference layer. The free layer includes a first layer having a first Curie temperature and a second layer having a second Curie temperature different from the first Curie temperature. The tunnel junction programming circuit is configured to apply a current through the magnetic tunnel junction to generate a write temperature in the magnetic tunnel junction and to write to the free layer of the magnetic tunnel junction.

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