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1. 发明授权

US07095059B2 Group III nitride compound semiconductor device 失效
标题翻译： III族氮化物化合物半导体器件
公开(公告)号：US07095059B2
公开(公告)日：2006-08-22
申请号：US10220878
申请日：2001-05-06
申请人： Toshiya Uemura , Atsuo Hirano , Shigemi Horiuchi
发明人： Toshiya Uemura , Atsuo Hirano , Shigemi Horiuchi
IPC分类号： H01L33/00
CPC分类号： H01L33/40 , H01L29/2003 , H01L29/452 , H01L33/32 , H01L33/38
摘要： The present invention provides a Group III nitride compound semiconductor device in which the amount of a current allowed to be applied on a p-type pad electrode can be increased.That is, in the Group III nitride compound semiconductor device according to the present invention, a portion of a translucent electrode coming in contact with a circumferential surface of the p-type pad electrode is formed as a thick port ion to thereby increase the area of contact between the circumferential surface and the translucent electrode to thereby increase the current allowed to be applied on the p-type pad electrode. In addition, the use of the thick portion prevents cracking from occuring between the translucent electrode and the circumferential surface of the pad electrode.
摘要翻译：本发明提供了可以增加允许施加在p型焊盘电极上的电流量的III族氮化物化合物半导体器件。也就是说，在根据本发明的III族氮化物化合物半导体器件中，形成与p型焊盘电极的圆周表面接触的透光性电极的一部分作为厚端口离子，从而增加在圆周表面和透光电极之间接触，从而增加允许施加在p型焊盘电极上的电流。此外，使用厚壁部可防止在透光性电极与焊盘电极的周面之间发生龟裂。

2. 发明申请

US20070141806A1 Method for producing group III nitride based compound semiconductor device 审中-公开
标题翻译：制备III族氮化物基化合物半导体器件的方法
公开(公告)号：US20070141806A1
公开(公告)日：2007-06-21
申请号：US11633619
申请日：2006-12-05
申请人： Toshiya Uemura , Shigemi Horiuchi
发明人： Toshiya Uemura , Shigemi Horiuchi
IPC分类号： H01L21/30 , H01L21/46
CPC分类号： H01L33/40 , H01L33/32
摘要： The present invention relates to method for producing a group III nitride based compound semiconductor device. A plurality of group III nitride based compound semiconductor layers are epitaxially grown on a first substrate. An electrode is formed on the uppermost layer of the group III nitride based compound semiconductor layers, the electrode being formed of a first multi-layer including at least a layer for preventing migration of tin contained in a solder. A second multi-layer including at least a layer for preventing migration of tin contained in a solder is formed on a second substrate on which a semiconductor device is to be placed. The surface of the first substrate on which the electrode has been formed is joined to the surface of the second substrate on which the multi-layer has been formed by means of a solder containing at least tin. the first substrate removed from the group III nitride based compound semiconductor layers.
摘要翻译：本发明涉及制备III族氮化物基化合物半导体器件的方法。在第一基板上外延生长多个III族氮化物基化合物半导体层。在III族氮化物基化合物半导体层的最上层形成电极，该电极由至少包含防止锡中所含锡迁移的第一多层形成。在其上放置半导体器件的第二基板上形成至少包括用于防止焊料中所含锡迁移的层的多层。已经形成有电极的第一基板的表面通过至少含有锡的焊料接合到已经形成多层的第二基板的表面上。从III族氮化物基化合物半导体层去除第一衬底。

3. 发明申请

US20070141753A1 Group III nitride based compound semiconductor device and producing method for the same 审中-公开
标题翻译： III族氮化物基化合物半导体器件及其制备方法
公开(公告)号：US20070141753A1
公开(公告)日：2007-06-21
申请号：US11633623
申请日：2006-12-05
申请人： Toshiya Uemura , Shigemi Horiuchi
发明人： Toshiya Uemura , Shigemi Horiuchi
IPC分类号： H01L21/00
CPC分类号： H01L33/0095 , H01L21/78
摘要： The present invention relates to method for producing a group III nitride based compound semiconductor device, including separating the device into individual chips by means of a dicing blade. A portion of an epitaxial layer where a dicing blade is to be positioned is partially or totally removed through etching, to thereby form a trench. An insulating film is formed on the bottom and on the side surfaces of the trench. A wafer is diced into chips in such a manner that the bottom of the trench is removed by means of the dicing blade without completely removing the side surfaces of the insulating film. The insulting film is formed on the side surfaces of the trench such that the film covers a p-type layer to an n-type layer included in group III nitride based compound semiconductor layers so as to prevent short circuit between the p-type layer and the n-type layer.
摘要翻译：本发明涉及一种用于制造III族氮化物基化合物半导体器件的方法，包括通过切割刀片将器件分离成单独的芯片。通过蚀刻部分地或完全地去除其中定位切割刀片的外延层的一部分，从而形成沟槽。绝缘膜形成在沟槽的底部和侧表面上。将晶片切成芯片，使得通过切割刀片去除沟槽的底部，而不会完全去除绝缘膜的侧表面。绝缘膜形成在沟槽的侧表面上，使得膜覆盖p型层到包含在III族氮化物基化合物半导体层中的n型层，以防止p型层和 n型层。

4. 发明授权

US07109529B2 Light-emitting semiconductor device using group III nitride compound 失效
标题翻译：使用III族氮化物化合物的发光半导体器件
公开(公告)号：US07109529B2
公开(公告)日：2006-09-19
申请号：US10864495
申请日：2004-06-10
申请人： Toshiya Uemura , Shigemi Horiuchi
发明人： Toshiya Uemura , Shigemi Horiuchi
IPC分类号： H01L29/22 , H01L31/072
CPC分类号： H01L33/405 , H01L33/32
摘要： A flip chip type of light-emitting semiconductor device using group III nitride compound includes a thick positive electrode. The positive electrode, which is made of at least one of silver (Ag), rhodium (Rh), ruthenium (Ru), platinum (Pt) and palladium (Pd), and an alloy including at least one of these metals, is adjacent to a p-type semiconductor layer, and reflect light toward a sapphire substrate. Accordingly, a positive electrode having a high reflectivity and a low contact resistance can be obtained. A first thin-film metal layer, which is made of cobalt (Co) and nickel (Ni), or any combinations of including at least one of these metals, formed between the p-type semiconductor layer and the thick electrode, can improve an adhesion between an contact layer and the thick positive electrode. A thickness of the first thin-film metal electrode should be preferably in the range of 2 Å to 200 Å, more preferably 5 Å to 50 Å. A second thin-film metal layer made of gold (Au) can further improve the adhesion.
摘要翻译：使用III族氮化物化合物的倒装芯片型发光半导体器件包括厚的正电极。由银（Ag），铑（Rh），钌（Ru），铂（Pt）和钯（Pd）中的至少一种以及包含这些金属中的至少一种的合金制成的正极是相邻的到p型半导体层，并且朝向蓝宝石衬底反射光。因此，可以获得具有高反射率和低接触电阻的正极。由p型半导体层和厚电极之间形成的由钴（Co）和镍（Ni）构成的第一薄膜金属层或包含这些金属中的至少一种的任意组合可以改善接触层与厚正电极之间的粘合。第一薄膜金属电极的厚度应优选在2埃至200埃的范围内，更优选在5埃至50埃的范围内。由金（Au）制成的第二薄膜金属层可以进一步提高粘附性。

5. 发明授权

US06734468B2 Devices related to electrode pads for p-type group III nitride compound semiconductors 失效
标题翻译：与p型III族氮化物半导体的电极焊盘相关的器件
公开(公告)号：US06734468B2
公开(公告)日：2004-05-11
申请号：US08866129
申请日：1997-05-30
申请人： Toshiya Uemura , Naoki Shibata , Shizuyo Noiri , Shigemi Horiuchi
发明人： Toshiya Uemura , Naoki Shibata , Shizuyo Noiri , Shigemi Horiuchi
IPC分类号： H01L3300
CPC分类号： H01L24/05 , H01L24/03 , H01L24/06 , H01L29/452 , H01L2224/05073 , H01L2224/05155 , H01L2224/05644 , H01L2224/05655 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01007 , H01L2924/0101 , H01L2924/01012 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01018 , H01L2924/01022 , H01L2924/01023 , H01L2924/01024 , H01L2924/01025 , H01L2924/01028 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/01039 , H01L2924/01047 , H01L2924/01049 , H01L2924/01073 , H01L2924/01077 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/05042 , H01L2924/1033 , H01L2924/12041 , H01L2924/12042 , H01L2924/3025 , H01L2924/00014 , H01L2924/00
摘要： An electrode pad for a Group III nitride compound semiconductor having p-type conduction includes a triple layer structure having first, second, and third metal layers, formed on an electrode layer. A protection film with a window exposing a central portion of the third metal layer is formed by etching on the third metal layer and covers the sides of the first, second, and third metal layers. The second metal layer is made of gold (Au). The first metal layer is made of an element which has ionization potential lower than gold (Au). The third metal is made of an element which has adhesiveness to the protection film stronger than that of gold (Au). Consequently, this structure of the electrode pad improves the adhesive strength between the protection layer and the third meal layer and prevents the etching of the sides of the protection film. Furthermore, the contact resistance between the semiconductor and the electrode pad is lowered and, thus, ohmic characteristic of the electrode pad is improved.
摘要翻译：具有p型导电的III族氮化物化合物半导体的电极焊盘包括形成在电极层上的具有第一，第二和第三金属层的三层结构。通过在第三金属层上蚀刻并覆盖第一，第二和第三金属层的侧面，形成具有暴露第三金属层的中心部分的窗口的保护膜。第二金属层由金（Au）制成。第一金属层由电离电位低于金（Au）的元素制成。第三金属由对金（Au）的保护膜具有更强的粘合性的元素制成。因此，电极焊盘的这种结构提高了保护层和第三层之间的粘合强度，并且防止了保护膜的侧面的蚀刻。此外，半导体和电极焊盘之间的接触电阻降低，因此提高了电极焊盘的欧姆特性。

6. 发明授权

US07646036B2 Electrode and Group III nitride-based compound semiconductor light-emitting device having the electrode 有权
标题翻译：具有电极的电极和III族氮化物系化合物半导体发光元件
公开(公告)号：US07646036B2
公开(公告)日：2010-01-12
申请号：US12068247
申请日：2008-02-04
申请人： Takahiro Kozawa , Kazuyoshi Tomita , Toshiya Uemura , Shigemi Horiuchi
发明人： Takahiro Kozawa , Kazuyoshi Tomita , Toshiya Uemura , Shigemi Horiuchi
IPC分类号： H01L33/00
CPC分类号： H01L33/405 , H01L33/32 , H01L33/42
摘要： An object of the invention is to prevent migration of silver contained in an electrode of a Group III nitride-based compound semiconductor light-emitting device. A positive electrode is formed on a p-type layer. In the positive electrode, an ITO light-transmitting electrode layer, a silver alloy reflecting electrode layer, a diffusion-preventing layer in which a Ti layer and a Pt layer are stacked, and a gold thick-film electrode are sequentially stacked on the p-type layer. The reflecting electrode layer made of a silver alloy contains palladium (Pd) and copper (Cu) as additives and also contains oxygen (O). By virtue of this structure, migration of silver from the silver alloy reflecting electrode layer and blackening of the interface between the silver alloy layer and the ITO light-transmitting electrode layer disposed thereunder are prevented, whereby light extraction efficiency can be enhanced.
摘要翻译：本发明的目的是防止在III族氮化物系化合物半导体发光元件的电极中含有的银的迁移。正电极形成在p型层上。在正极中，将ITO透光电极层，银合金反射电极层，层叠有Ti层和Pt层的扩散防止层和金厚膜电极依次层叠在p 型层。由银合金制成的反射电极层包含钯（Pd）和铜（Cu）作为添加剂，并且还含有氧（O）。由于这种结构，防止银从银合金反射电极层的迁移以及布置在其上的银合金层和ITO透光电极层之间的界面变黑，从而可以提高光提取效率。

7. 发明授权

US07541262B2 Method for producing semiconductor device 失效
标题翻译：半导体器件的制造方法
公开(公告)号：US07541262B2
公开(公告)日：2009-06-02
申请号：US11633622
申请日：2006-12-05
申请人： Masanobu Ando , Toshiya Uemura , Shigemi Horiuchi
发明人： Masanobu Ando , Toshiya Uemura , Shigemi Horiuchi
IPC分类号： H01L21/30
CPC分类号： H01L33/0079 , H01L33/32 , H01L33/38 , H01L33/40
摘要： The present invention contemplates preventing clogging of a dicer for forming separation trenches in a semiconductor wafer, and as well improving the yield of a semiconductor device cut out of the semiconductor wafer. A second adhesive to be charged into spaces contains an epoxy material as a base material. Silica filler particles (diameter: about 2 to about 4 μm) are added to the base material in an appropriate amount. Charging of the second adhesive may be performed by adding the adhesive dropwise to a side wall of a semiconductor wafer, or by immersing an edge of the semiconductor wafer in the adhesive in the form of liquid. When a liquid-form epoxy material of low viscosity is employed, the spaces can be evenly filled with the second adhesive by capillary action. An n-electrode is formed on an exposed surface of an n-type layer through vapor deposition employing a resist mask. Separation trenches are formed through half-cut dicing from the exposed surface of the n-type layer toward the second adhesive.
摘要翻译：本发明考虑防止用于在半导体晶片中形成分离沟槽的切割机的堵塞，并且还提高从半导体晶片切出的半导体器件的产量。要填充到空间中的第二粘合剂包含环氧树脂材料作为基材。将二氧化硅填料颗粒（直径：约2至约4μm）以适当的量加入到基材中。第二粘合剂的充电可以通过将粘合剂滴加到半导体晶片的侧壁，或者通过将半导体晶片的边缘以液体的形式浸入粘合剂中来进行。当使用低粘度的液态环氧材料时，可以通过毛细作用将间隙均匀地填充第二粘合剂。通过使用抗蚀剂掩模的气相沉积在n型层的暴露表面上形成n电极。通过从n型层的暴露表面朝向第二粘合剂的半切割切割形成分离沟槽。

8. 发明授权

US06955936B2 Methods and devices related to electrode pads for p-type Group III nitride compound semiconductors 失效
标题翻译：与p型III族氮化物半导体的电极焊盘相关的方法和装置
公开(公告)号：US06955936B2
公开(公告)日：2005-10-18
申请号：US10670518
申请日：2003-09-26
申请人： Toshiya Uemura , Naoki Shibata , Shizuyo Noiri , Shigemi Horiuchi
发明人： Toshiya Uemura , Naoki Shibata , Shizuyo Noiri , Shigemi Horiuchi
IPC分类号： H01L21/28 , H01L23/485 , H01L29/45 , H01L33/32 , H01L33/40 , H01L33/62 , H01L21/00
CPC分类号： H01L24/05 , H01L24/03 , H01L24/06 , H01L29/452 , H01L2224/05073 , H01L2224/05155 , H01L2224/05644 , H01L2224/05655 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01007 , H01L2924/0101 , H01L2924/01012 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01018 , H01L2924/01022 , H01L2924/01023 , H01L2924/01024 , H01L2924/01025 , H01L2924/01028 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/01039 , H01L2924/01047 , H01L2924/01049 , H01L2924/01073 , H01L2924/01077 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/05042 , H01L2924/1033 , H01L2924/12041 , H01L2924/12042 , H01L2924/3025 , H01L2924/00014 , H01L2924/00
摘要： An electrode pad for a Group III nitride compound semiconductor having p-type conduction includes a triple layer structure having first, second, and third metal layers, formed on an electrode layer. A protection film with a window exposing a central portion of the third metal layer is formed by etching on the third metal layer and covers the sides of the first, second, and third metal layers. The second metal layer is made of gold (Au). The first metal layer is made of an element which has ionization potential lower than gold (Au). The third metal is made of an element which has adhesiveness to the protection film stronger than that of gold (Au). Consequently, this structure of the electrode pad improves the adhesive strength between the protection layer and the third meal layer and prevents the etching of the sides of the protection film. Furthermore, the contact resistance between the semiconductor and the electrode pad is lowered and, thus, ohmic characteristic of the electrode pad is improved.
摘要翻译：具有p型导电的III族氮化物化合物半导体的电极焊盘包括形成在电极层上的具有第一，第二和第三金属层的三层结构。通过在第三金属层上蚀刻并覆盖第一，第二和第三金属层的侧面，形成具有暴露第三金属层的中心部分的窗口的保护膜。第二金属层由金（Au）制成。第一金属层由电离电位低于金（Au）的元素制成。第三金属由对金（Au）的保护膜具有更强的粘合性的元素制成。因此，电极焊盘的这种结构提高了保护层和第三层之间的粘合强度，并且防止了保护膜的侧面的蚀刻。此外，半导体和电极焊盘之间的接触电阻降低，因此提高了电极焊盘的欧姆特性。

9. 发明授权

US06521999B1 Transparent electrode film and group III nitride semiconductor device 失效
标题翻译：透明电极膜和III族氮化物半导体器件
公开(公告)号：US06521999B1
公开(公告)日：2003-02-18
申请号：US09604678
申请日：2000-06-27
申请人： Toshiya Uemura , Shigemi Horiuchi
发明人： Toshiya Uemura , Shigemi Horiuchi
IPC分类号： H01L2348
CPC分类号： H01L33/42 , H01L33/32
摘要： A transparent electrode film containing gold for covering the uppermost layer of a group III nitride semiconductor device has a first layer formed on the uppermost layer and not thicker than 15 Å, and a second layer formed on the first layer and containing gold. The first layer contains a first metal having an ionization potential lower than that of gold, and the second layer further contains a second metal having an ionization potential lower than that of gold.
摘要翻译：包含用于覆盖III族氮化物半导体器件的最上层的金的透明电极膜具有形成在最上层且不厚于第一层的第一层，以及形成在第一层上并含有金的第二层。第一层含有电离电位低于金的电离电位的第一金属，第二层还含有电离电位低于金的电离电位的第二金属。

10. 发明授权

US07781241B2 Group III-V semiconductor device and method for producing the same 有权
标题翻译： III-V族半导体器件及其制造方法
公开(公告)号：US07781241B2
公开(公告)日：2010-08-24
申请号：US11987420
申请日：2007-11-29
申请人： Masanobu Ando , Shigemi Horiuchi , Yoshinori Kinoshita , Ryohei Inazawa , Toshiya Uemura
发明人： Masanobu Ando , Shigemi Horiuchi , Yoshinori Kinoshita , Ryohei Inazawa , Toshiya Uemura
IPC分类号： H01L21/00
CPC分类号： H01L21/8252 , H01L33/0079
摘要： The method of the invention for producing a group III-V semiconductor device includes forming, on a base, a plurality of semiconductor devices isolated from one another, each semiconductor device having at least an n-layer proximal to the base, and a p-layer distal to the base, and having a p-electrode formed on the top surface of the p-layer, and a first low-melting-point metal diffusion preventing layer, the low-melting-point metal diffusion preventing layer being formed on the top surface of the p-electrode; forming, from a dielectric material, a side-surface protective film so as to cover a side surface of each semiconductor device; bonding the semiconductor device to a conductive support substrate via a low-melting-point metal layer; and removing the base through the laser lift-off process.
摘要翻译：本发明的用于制造III-V族半导体器件的方法包括在基底上形成彼此隔离的多个半导体器件，每个半导体器件至少具有靠近基极的n层，并且具有形成在p层顶表面上的p电极和第一低熔点金属扩散防止层，所述低熔点金属扩散防止层形成在所述p层上， p电极的顶表面; 从绝缘材料形成侧面保护膜以覆盖每个半导体器件的侧表面; 通过低熔点金属层将半导体器件接合到导电支撑衬底; 并通过激光剥离过程去除底座。

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