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    • 1. 发明授权
    • Mobile object detecting apparatus
    • 移动物体检测装置
    • US08830114B2
    • 2014-09-09
    • US13510638
    • 2010-09-30
    • Tomoyoshi YasueTomoyoshi Kushida
    • Tomoyoshi YasueTomoyoshi Kushida
    • G01S13/04G01S13/56G01S13/87G01S13/536G01S13/00G08B13/16
    • G01S13/56G01S13/04G01S13/87G08B13/1627
    • A mobile object detecting apparatus includes first radiation detecting means; and second radiation detecting means for radiating an electromagnetic wave having the same frequency as the electromagnetic wave radiated by the first radiation detecting means such that the radiated electromagnetic wave passes near a point in the first radiation detecting means from which the electromagnetic wave is radiated, and detecting a standing wave which is generated due to reflection of the radiated electromagnetic wave at an object; wherein a distance, over which the electromagnetic wave radiated by the first radiation detecting means travels until it reaches near the first radiation detecting means, corresponds to a distance of an integral multiple of a wave length of a half cycle of the electromagnetic waves radiated by the radiation detecting means plus a wave length of a predetermined period which is smaller than the half cycle.
    • 移动物体检测装置包括第一辐射检测装置; 以及第二辐射检测装置,用于辐射具有与由第一辐射检测装置辐射的电磁波相同频率的电磁波,使得辐射电磁波通过靠近辐射电磁波的第一辐射检测装置中的一点;以及 检测由于物体处的辐射电磁波的反射而产生的驻波; 其中由第一辐射检测装置辐射的电磁波行进直到其到达第一辐射检测装置附近的距离对应于由第一辐射检测装置辐射的电磁波的半周期的波长的整数倍的距离, 辐射检测装置加上小于半周期的预定周期的波长。
    • 2. 发明授权
    • High rated voltage semiconductor device with floating diffusion regions
    • 具有浮动扩散区域的高额定电压半导体器件
    • US5905294A
    • 1999-05-18
    • US787682
    • 1997-01-23
    • Tomoyoshi Kushida
    • Tomoyoshi Kushida
    • H01L29/06H01L21/265H01L21/336H01L29/10H01L29/423H01L29/739H01L29/78
    • H01L29/66712H01L29/1095H01L29/42324H01L29/7802H01L21/26586H01L29/0619
    • A field-effect semiconductor device has a gate pad at the outside of an area of a semiconductor element and island regions of a conductivity type opposite that of a substrate of the device at surfaces of the device under the gate pad. When voltage is applied to the semiconductor device's drain, depletion layers form and extend to the opposite side of the substrate from each of the island regions and become continuous with one another. Thus, the voltage applied to the device's insulation layers is limited and a high rated voltage of the device can be obtained. Further, this arrangement provides a wide contact area between the gate pad and the gate wiring because meshed gate wiring is formed in the area between the island regions. In this way, insulation film having no contact holes in the island regions and contact holes in the body region may be formed without replacing masks by alternating the opening with for introducing impurities in the island region and the opening width in the body region.
    • 场效应半导体器件在半导体元件的区域的外侧具有栅极焊盘,并且在栅极焊盘下方的器件的表面处具有与器件的衬底的导电类型相反的岛状区域。 当电压施加到半导体器件的漏极时,耗尽层从每个岛区域形成并延伸到衬底的相对侧并且彼此连续。 因此,施加到器件绝缘层的电压是有限的,并且可以获得器件的高额定电压。 此外,这种布置提供了栅极焊盘和栅极布线之间的宽接触面积,因为在岛状区域之间的区域中形成有栅极栅极布线。 以这种方式,可以形成在岛状区域中不具有接触孔的绝缘膜和体区域中的接触孔,而不用通过交替开口替换掩模,以在岛区域中引入杂质和体区域中的开口宽度。
    • 3. 发明申请
    • MOBILE OBJECT DETECTING APPARATUS
    • 移动对象检测设备
    • US20120235850A1
    • 2012-09-20
    • US13510638
    • 2010-09-30
    • Tomoyoshi YasueTomoyoshi Kushida
    • Tomoyoshi YasueTomoyoshi Kushida
    • G01S13/56
    • G01S13/56G01S13/04G01S13/87G08B13/1627
    • A mobile object detecting apparatus includes first radiation detecting means ; and second radiation detecting means for radiating an electromagnetic wave having the same frequency as the electromagnetic wave radiated by the first radiation detecting means such that the radiated electromagnetic wave passes near a point in the first radiation detecting means from which the electromagnetic wave is radiated, and detecting a standing wave which is generated due to reflection of the radiated electromagnetic wave at an object; wherein a distance, over which the electromagnetic wave radiated by the first radiation detecting means travels until it reaches near the first radiation detecting means, corresponds to a distance of an integral multiple of a wave length of a half cycle of the electromagnetic waves radiated by the radiation detecting means plus a wave length of a predetermined period which is smaller than the half cycle.
    • 移动物体检测装置包括第一辐射检测装置; 以及第二辐射检测装置,用于辐射具有与由第一辐射检测装置辐射的电磁波相同频率的电磁波,使得辐射电磁波通过靠近辐射电磁波的第一辐射检测装置中的一点;以及 检测由于物体处的辐射电磁波的反射而产生的驻波; 其中由第一辐射检测装置辐射的电磁波行进直到其到达第一辐射检测装置附近的距离对应于由第一辐射检测装置辐射的电磁波的半周期的波长的整数倍的距离, 辐射检测装置加上小于半周期的预定周期的波长。
    • 4. 发明授权
    • Semiconductor devices and method of manufacturing them
    • 半导体器件及其制造方法
    • US07507646B2
    • 2009-03-24
    • US11436616
    • 2006-05-19
    • Shinya YamazakiTomoyoshi KushidaTakahide Sugiyama
    • Shinya YamazakiTomoyoshi KushidaTakahide Sugiyama
    • H01L21/265
    • H01L29/868H01L29/32
    • With conventional device, the quantity of complex defects differs with each semiconductor device because the concentration of impurities intrinsically contained differs for each silicon wafer. Consequently, there is an undesirable variation in characteristics among the semiconductor devices. The invention provides a method for manufacturing PIN type diode which comprises an intermediate semiconductor region in which complex defects are formed. The method comprises introducing impurities (for example, carbon), which are the sane kind of impurities intrinsically contained in the intermediate semiconductor region, into the intermediate semiconductor region, and irradiating the intermediate semiconductor region with helium ions to form point defects.
    • 对于常规装置,由于每个硅晶片的固有杂质的浓度不同,所以复合缺陷的数量因每个半导体器件而不同。 因此,半导体器件之间的特性存在不期望的变化。 本发明提供一种制造PIN型二极管的方法,其包括形成复杂缺陷的中间半导体区域。 该方法包括将与中间半导体区域本征含有的相同种类的杂质的杂质(例如碳)引入中间半导体区域,并且用氦离子照射中间半导体区域以形成点缺陷。
    • 5. 发明授权
    • Buried-gate-type semiconductor device
    • 埋栅型半导体器件
    • US07038275B2
    • 2006-05-02
    • US10732350
    • 2003-12-11
    • Tomoyoshi Kushida
    • Tomoyoshi Kushida
    • H01L29/76
    • H01L29/7813H01L29/0696H01L29/0878H01L29/1095H01L29/4236H01L29/4238H01L29/66348H01L29/7392H01L29/7397H01L29/7722H01L29/7828
    • An object of this invention is to provide a buried gate-type semiconductor device in which its gate interval is minimized so as to improve channel concentration thereby realizing low ON-resistance, voltage-resistance depression due to convergence of electrical fields in the vicinity of the bottom of the gate is prevented and further prevention of voltage-resistance depression and OFF characteristic are achieved at the same time. A plurality of gate electrodes 106 each having a rectangular section are disposed in its plan section. The interval 106T between the long sides of the gate electrodes 106 is made shorter than the interval 106S between the short sides thereof. Further, a belt-like contact opening 108 is provided between the short sides of the gate electrode 106, so that P+ source region 100 and N+ source region 104 are in contact with a source electrode. Consequently, the interval 106T between the long sides of the gate electrode 106 can be set up regardless of the width of the contact opening 108.
    • 本发明的一个目的是提供一种掩埋栅极型半导体器件,其栅极间隔被最小化,从而提高沟道浓度,从而实现低导通电阻,由于电场附近的电场会聚而产生的低电压抑制 防止栅极的底部,同时进一步防止电压下降和OFF特性。 在其平面部分中设置有多个具有矩形截面的栅电极106。 使栅电极106的长边之间的间隔106T比其短边之间的间隔106S短。 此外,在栅电极106的短边之间设置带状接触开口108,使得源极区100和源极区104源于 与源电极接触。 因此,无论接触开口108的宽度如何,可以设定栅电极106的长边之间的间隔106T。
    • 6. 发明授权
    • Semiconductor device with a suppressed increase in turned-on resistance and an improved turn-off response
    • 具有抑制的导通电阻增加和关断响应改善的半导体器件
    • US06774407B2
    • 2004-08-10
    • US09751452
    • 2001-01-02
    • Tomoyoshi Kushida
    • Tomoyoshi Kushida
    • H01L2974
    • H01L29/66348H01L21/263H01L21/26506H01L21/26586H01L21/266H01L29/32H01L29/7397
    • The present invention provides a semiconductor device wherein the turning-off time thereof can be reduced substantially and, at the same time, the turned-on resistance thereof can also be prevented effectively from increasing as well. Lattice defects are distributed at a high concentration in a defect region an area in close proximity to the boundary surface between an n drift region and a p+ substrate. The half-value width of the distribution is set at a value which is large enough for the defect region to include a non-depletion region in the n drift region. However, the defect region is not spread to cover a diffusion layer. In this way, the turning-off time of the semiconductor device can be reduced considerably without being accompanied by an increase in turned-on resistance thereof. In addition, by employing an absorber with an uneven surface, the distribution of lattice defects can be obtained by carrying out radiation of ions at only one time.
    • 本发明提供一种半导体器件,其中其截止时间可以大大降低,并且同时也可以有效地防止其导通电阻的增加。 晶格缺陷以非常接近于n漂移区和p +衬底之间的边界面的区域在缺陷区域中以高浓度分布。 分布的半值宽度被设定为足够大的值,使得缺陷区域在n漂移区域中包括非耗尽区域。 然而,缺陷区域不扩散以覆盖扩散层。 以这种方式,可以显着降低半导体器件的关断时间,而不伴随着其导通电阻的增加。 此外,通过使用具有不平坦表面的吸收体,可以通过仅一次进行离子的辐射来获得晶格缺陷的分布。
    • 9. 发明授权
    • Static induction type semiconductor device
    • 静电感应式半导体器件
    • US4998149A
    • 1991-03-05
    • US181102
    • 1988-04-13
    • Hiroshi TadanoTomoyoshi Kushida
    • Hiroshi TadanoTomoyoshi Kushida
    • H01L29/74H01L29/739H01L29/80
    • H01L29/7392
    • Disclosed is an improvement of a static induction type semiconductor device which includes an anode region provided at one surface portion of a semiconductor substrate, a cathode region provided on the other surface portion, a gate region adjacent to the cathode region and a low impurity density region formed at an intermediate portion of the semiconductor substrate. A cathode short region is provided at a position opposite to the cathode region with the gate region therebetween so as to be conducted to the cathode region, thereby quickening the injection of charge at the time of turn-on and draw up of charge at the time of turn-off, and enabling high-speed on and off operation.
    • 公开了一种静电感应型半导体器件的改进,其包括设置在半导体衬底的一个表面部分处的阳极区域,设置在另一个表面部分上的阴极区域,与阴极区域相邻的栅极区域和低杂质浓度区域 形成在半导体衬底的中间部分。 阴极短区域设置在与阴极区域相对的位置处,栅极区域在它们之间,以便被传导到阴极区域,从而在接通时加快电荷的注入并在此时提取电荷 的关闭,并实现高速开关运行。
    • 10. 发明授权
    • Semiconductor device with multiple recombination center layers
    • 具有多个复合中心层的半导体器件
    • US4752818A
    • 1988-06-21
    • US912578
    • 1986-09-26
    • Tomoyoshi KushidaHiroshi TadanoYoshio Nakamura
    • Tomoyoshi KushidaHiroshi TadanoYoshio Nakamura
    • H01L29/32H01L29/739H01L29/744H01L29/74
    • H01L21/263H01L29/32H01L29/7391H01L29/7392H01L29/744
    • A semiconductor device comprises two main electrode regions, i.e., cathode and anode regions consisting of high impurity concentration regions of opposite conductivity types, a low impurity concentration region locally formed between the two main electrode regions, a gate region, formed near the cathode region, for controlling a main current, a first local region which has a relatively low carrier lifetime and is formed in a region of the low impurity concentration region near at least one of the gate and cathode regions, and a second local region which has a relatively low carrier lifetime and is formed in a region of the low impurity concentration region which is depleted at the end of the main current turn-off process or which is not depleted to the end, thus satisfying three conditions, i.e., high-speed switching, low forward voltage drop, and high blocking voltage between the main electrodes at the same time.
    • 半导体器件包括两个主电极区域,即由相对导电类型的高杂质浓度区域组成的阴极和阳极区域,局部形成在两个主电极区域之间的低杂质浓度区域,在阴极区域附近形成的栅极区域, 用于控制主电流的第一局部区域,具有相对低的载流子寿命并且形成在栅极和阴极区域中的至少一个附近的低杂质浓度区域的区域中,以及具有相对较低的第二局部区域 载流子寿命,形成在低电流关断过程结束时耗尽的或不耗尽的低杂质浓度区域的区域,因此满足三个条件,即高速切换,低 正向电压降,主电极之间的高阻断电压。