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1. 发明授权

US09673054B2 Array of gated devices and methods of forming an array of gated devices 有权
公开(公告)号：US09673054B2
公开(公告)日：2017-06-06
申请号：US14461751
申请日：2014-08-18
申请人： Micron Technology, Inc.
发明人： Marcello Mariani , Anna Maria Conti , Sara Vigano
IPC分类号： H01L21/8249 , H01L21/308 , H01L29/78 , H01L29/744 , H01L27/102
CPC分类号： H01L21/76224 , H01L21/308 , H01L21/8229 , H01L21/823437 , H01L21/823475 , H01L21/823487 , H01L21/8239 , H01L21/8249 , H01L27/1022 , H01L27/1027 , H01L27/1052 , H01L29/4236 , H01L29/42364 , H01L29/66333 , H01L29/66363 , H01L29/66666 , H01L29/744 , H01L29/749 , H01L29/7827
摘要： An array of gated devices includes a plurality of gated devices arranged in rows and columns and individually including an elevationally inner region, a mid region elevationally outward of the inner region, and an elevationally outer region elevationally outward of the mid region. A plurality of access lines are individually laterally proximate the mid regions along individual of the rows. A plurality of data/sense lines are individually elevationally outward of the access lines and electrically coupled to the outer regions along individual of the columns. A plurality of metal lines individually extends along and between immediately adjacent of the rows elevationally inward of the access lines. The individual metal lines are directly against and electrically coupled to sidewalls of the inner regions of each of immediately adjacent of the rows. The metal lines are electrically isolated from the data/sense lines. Other arrays of gated devices and methods of forming arrays of gated devices are disclosed.

2. 发明申请

US20170148780A1 ELECTRONIC DEVICE, IN PARTICULAR FOR PROTECTION AGAINST OVERVOLTAGES 有权
公开(公告)号：US20170148780A1
公开(公告)日：2017-05-25
申请号：US15096975
申请日：2016-04-12
申请人： STMicroelectronics SA
发明人： Johan Bourgeat , Jean Jimenez
IPC分类号： H01L27/02 , H01L29/744 , H01L29/10 , H01L29/74
CPC分类号： H01L27/0251 , H01L27/0262 , H01L29/1095 , H01L29/7436 , H01L29/744
摘要： An electronic device is formed by a sequence of at least two thyristors coupled in series in a same conduction direction. Each thyristor has a gate of a first conductivity type. The gates of the first conductivity type for the thyristors in the sequence are coupled together in order to form a single control gate.

3. 发明授权

US09620428B2 Semiconductor devices comprising getter layers and methods of making and using the same 有权
公开(公告)号：US09620428B2
公开(公告)日：2017-04-11
申请号：US15217777
申请日：2016-07-22
申请人： Monolith Semiconductor Inc.
发明人： Kevin Matocha , John Nowak , Kiran Chatty , Sujit Banerjee
IPC分类号： H01L29/45 , H01L23/26 , H01L23/00 , H01L29/16 , H01L29/78 , H01L21/283 , H01L23/31 , H01L29/10 , H01L21/04 , H01L29/66 , H01L29/08 , H01L21/8234
CPC分类号： H01L23/26 , H01L21/0445 , H01L21/0485 , H01L21/283 , H01L21/823475 , H01L23/3171 , H01L23/3192 , H01L23/564 , H01L24/05 , H01L29/0615 , H01L29/0843 , H01L29/1095 , H01L29/1608 , H01L29/45 , H01L29/66068 , H01L29/66893 , H01L29/7395 , H01L29/744 , H01L29/7811 , H01L29/7823 , H01L29/8083 , H01L29/872 , H01L2224/02166 , H01L2224/051 , H01L2224/05111 , H01L2224/05164 , H01L2224/05166 , H01L2224/05169 , H01L2224/0517 , H01L2224/05172 , H01L2224/05184 , H01L2224/0519 , H01L2224/05567 , H01L2924/00014 , H01L2924/10272 , H01L2924/12032 , H01L2924/1301 , H01L2924/1305 , H01L2924/13055 , H01L2924/13062 , H01L2924/13063 , H01L2924/13091 , H01L2924/181 , H01L2924/00 , H01L2224/05552
摘要： Semiconductor devices comprising a getter material are described. The getter material can be located in or over the active region of the device and/or in or over a termination region of the device. The getter material can be a conductive or an insulating material. The getter material can be present as a continuous or discontinuous film. The device can be a SiC semiconductor device such as a SiC vertical MOSFET. Methods of making the devices are also described. Semiconductor devices and methods of making the same comprising source ohmic contacts formed using a self-aligned process are also described. The source ohmic contacts can comprise titanium silicide and/or titanium silicide carbide and can act as a getter material.

4. 发明申请

US20160358910A1 Double-Sided Vertical Semiconductor Device With Thinned Substrate 审中-公开
标题翻译：双面垂直半导体器件与薄型衬底
公开(公告)号：US20160358910A1
公开(公告)日：2016-12-08
申请号：US15240009
申请日：2016-08-18
申请人： QUALCOMM Incorporated
发明人： Michael Andrew Stuber , Stuart Molin
IPC分类号： H01L27/082 , H01L29/739 , H01L29/78 , H01L29/10 , H01L29/744
CPC分类号： H01L27/0823 , H01L21/6835 , H01L21/823487 , H01L23/481 , H01L24/05 , H01L24/11 , H01L24/13 , H01L27/088 , H01L29/0657 , H01L29/0696 , H01L29/1095 , H01L29/41741 , H01L29/4236 , H01L29/66272 , H01L29/66333 , H01L29/66363 , H01L29/66666 , H01L29/66712 , H01L29/66734 , H01L29/73 , H01L29/7317 , H01L29/732 , H01L29/7394 , H01L29/7395 , H01L29/744 , H01L29/7802 , H01L29/781 , H01L29/7812 , H01L29/7813 , H01L29/7827 , H01L2221/68327 , H01L2221/6834 , H01L2224/0401 , H01L2224/056 , H01L2224/05638 , H01L2224/1148 , H01L2224/1302 , H01L2224/13022 , H01L2224/13023 , H01L2224/131 , H01L2224/13147 , H01L2224/48 , H01L2924/12042 , H01L2924/1301 , H01L2924/1304 , H01L2924/1305 , H01L2924/13055 , H01L2924/13091 , H01L2924/014 , H01L2924/00014 , H01L2924/00012 , H01L2924/00015 , H01L2924/01014 , H01L2924/00
摘要： A vertical semiconductor device is formed in a semiconductor layer having a first surface, a second surface and background doping. A first doped region, doped to a conductivity type opposite that of the background, is formed at the second surface of the semiconductor layer. A second doped region of the same conductivity type as the background is formed at the second surface of the semiconductor layer, inside the first doped region. A portion of the semiconductor layer is removed at the first surface, exposing a new third surface. A third doped region is formed inside the semiconductor layer at the third surface. Electrical contact is made at least to the second doped region (via the second surface) and the third doped region (via the new third surface). In this way, vertical DMOS, IGBT, bipolar transistors, thyristors, and other types of devices can be fabricated in thinned semiconductor, or SOI layers.
摘要翻译：在具有第一表面，第二表面和背景掺杂的半导体层中形成垂直半导体器件。在半导体层的第二表面形成掺杂到与背景相反的导电类型的第一掺杂区域。在第一掺杂区域的内部，在半导体层的第二表面形成与背景相同导电类型的第二掺杂区域。半导体层的一部分在第一表面被去除，暴露出新的第三表面。第三掺杂区域形成在第三表面的半导体层的内部。至少对第二掺杂区域（经由第二表面）和第三掺杂区域（经由新的第三表面）进行电接触。以这种方式，可以在减薄的半导体或SOI层中制造垂直DMOS，IGBT，双极晶体管，晶闸管和其他类型的器件。

5. 发明申请

US20160284708A1 REVERSE CONDUCTING POWER SEMICONDUCTOR DEVICE 有权
标题翻译：反向导电功率半导体器件
公开(公告)号：US20160284708A1
公开(公告)日：2016-09-29
申请号：US15078602
申请日：2016-03-23
申请人： ABB Technology AG
发明人： Neophythos Lophitis , Florin Udrea , Umamaheswara Vemulapati , lulian Nistor , Martin Arnold , Jan Vobecky , Munaf Rahimo
IPC分类号： H01L27/102 , H01L29/417 , H01L29/87
CPC分类号： H01L27/1027 , H01L29/0696 , H01L29/0839 , H01L29/41716 , H01L29/7416 , H01L29/744 , H01L29/87
摘要： A RC power semiconductor is provided which comprises a plurality of diode cells and a plurality of GCT cells. Each GCT cell comprises a first cathode layer with at least three cathode layer regions, which are separated from each other by a base layer. In orthogonal projection onto a plane parallel to the first main side each one of the cathode layer regions is strip-shaped and a width (w, w′), wherein the diode cells alternate with the GCT cells in a lateral direction in at least a mixed part, wherein in each GCT cell, the width (w′) of each one of the two outer cathode layer regions next to a diode cell neighbouring to that GCT cell is less than the width (w) of any intermediate cathode layer region between the two outer cathode layer regions in that GCT cell.
摘要翻译：提供了一种RC功率半导体，其包括多个二极管单元和多个GCT单元。每个GCT单元包括具有至少三个阴极层区域的第一阴极层，其通过基底层彼此分离。在与第一主面平行的平面上的正交投影中，每个阴极层区域是带状的和宽度（w，w'），其中二极管单元在横向方向上与至少一个混合部分，其中在每个GCT单元中，与所述GCT单元相邻的二极管单元旁边的两个外部阴极层区域中的每一个的宽度（w'）小于所述GCT单元之间的任何中间阴极层区域的宽度（w）该GCT电池中的两个外阴极层区域。

6. 发明授权

US09418850B2 Semiconductor device and method for forming a semiconductor device 有权
标题翻译：用于形成半导体器件的半导体器件和方法
公开(公告)号：US09418850B2
公开(公告)日：2016-08-16
申请号：US14868969
申请日：2015-09-29
申请人： Infineon Technologies AG
发明人： Oliver Humbel , Hans Millonig
IPC分类号： H01L29/36 , H01L21/265 , H01L29/861 , H01L29/66
CPC分类号： H01L21/26513 , H01L21/265 , H01L21/266 , H01L29/167 , H01L29/36 , H01L29/402 , H01L29/404 , H01L29/6609 , H01L29/66128 , H01L29/7395 , H01L29/744 , H01L29/861 , H01L29/8611
摘要： A method includes forming an emitter at the first side of a semiconductor substrate by doping, wherein the dopant concentration is higher in the emitter than in the edge region; growing an oxide layer on the first side by annealing, wherein the oxide layer has a first thickness in a first region covering the emitter, and a second thickness in a second region covering the edge region. The first thickness is larger than the second thickness. Heavy metal ions are implanted through the first side with a first energy, and with a second energy, wherein the first energy and the second energy are different, such that the implanted heavy metal concentration in the edge region is higher than in the emitter due to an absorption of the oxide layer covering the emitter, resulting in a lower charge carrier lifetime in the edge region than in the emitter.
摘要翻译：一种方法包括通过掺杂在半导体衬底的第一侧形成发射极，其中发射极中的掺杂剂浓度高于边缘区域; 通过退火在第一侧生长氧化物层，其中氧化物层在覆盖发射极的第一区域中具有第一厚度，在覆盖边缘区域的第二区域中具有第二厚度。第一厚度大于第二厚度。重金属离子通过第一侧以第一能量注入，并且具有第二能量，其中第一能量和第二能量不同，使得在边缘区域中注入的重金属浓度高于发射极中的重金属离子，因为覆盖发射极的氧化物层的吸收，导致边缘区域中的电荷载流子寿命比在发射极中更低。

7. 发明授权

US09343558B1 Silicon controlled rectifier 有权
标题翻译：可控硅整流器
公开(公告)号：US09343558B1
公开(公告)日：2016-05-17
申请号：US14850951
申请日：2015-09-10
申请人： GLOBAL UNICHIP CORPORATION , TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
发明人： Chun-Yu Lin , Ming-Dou Ker , Wen-Tai Wang
IPC分类号： H01L29/74 , H01L29/749 , H01L29/744 , H01L29/745 , H01L27/02
CPC分类号： H01L29/749 , H01L27/0262 , H01L29/744 , H01L29/745 , H01L29/7455 , H01L29/87 , H01L2924/13034
摘要： A silicon controlled rectifier includes a substrate, a well, a deep doped region, a first doped region, a second doped region, a third doped region, and a fourth doped region. The well is disposed on the substrate and underneath a cell region. The deep doped region is disposed in the well. The first doped region has a first conductivity type, and is disposed in the well. The second doped region and third doped region have the first conductivity type and are disposed on the deep doped region. The fourth doped region has a second conductivity type, and is disposed between the second doped region and the third doped region. The fourth doped region is disposed on the deep doped region, and is electrically isolated from the well through the deep doped region, the second doped region, and the third doped region.
摘要翻译：可控硅整流器包括衬底，阱，深掺杂区，第一掺杂区，第二掺杂区，第三掺杂区和第四掺杂区。孔被放置在基底上并在细胞区域下方。深掺杂区域设置在阱中。第一掺杂区具有第一导电类型，并且设置在阱中。第二掺杂区域和第三掺杂区域具有第一导电类型并且设置在深掺杂区域上。第四掺杂区域具有第二导电类型，并且设置在第二掺杂区域和第三掺杂区域之间。第四掺杂区域设置在深掺杂区域上，并且通过深掺杂区域，第二掺杂区域和第三掺杂区域与阱电隔离。

8. 发明申请

US20160079134A1 SEMICONDUCTOR DEVICE 有权
标题翻译：半导体器件
公开(公告)号：US20160079134A1
公开(公告)日：2016-03-17
申请号：US14645283
申请日：2015-03-11
申请人： KABUSHIKI KAISHA TOSHIBA
发明人： Eitaro MIYAKE , Hideaki KITAZAWA
IPC分类号： H01L23/08 , H01L23/13 , H01L23/32
CPC分类号： H01L23/08 , H01L23/051 , H01L23/16 , H01L23/564 , H01L24/72 , H01L29/744 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor device includes a semiconductor chip comprising a first and second terminal surfaces. An insulator surrounds an outer circumference of a side surface of the chip. A reinforcing-member is arranged between the side surface of the chip and an inner side surface of the insulator and surrounds the outer circumference of the side surface of the chip. A first and second holders hold the reinforcing-member therebetween at a top and bottom surfaces of the reinforcing-member. The first and second holders comprise protrusions facing an inner wall surface of the reinforcing-member, and the when φ1in represents an inner-diameter of parts of the reinforcing-member opposing to the protrusions, φ1out represents an outer-diameter of the reinforcing-member, φ2 represents an outer-diameter of the protrusion of either the first or the second holder, and φ3 represents an inner diameter of the insulator, the following Expression 1 is satisfied φ1in−φ2
摘要翻译：半导体器件包括包括第一和第二端子表面的半导体芯片。绝缘体围绕芯片的侧表面的外周。在芯片的侧表面和绝缘体的内侧表面之间设置加强构件，并且围绕芯片的侧表面的外周。第一和第二保持器在加强构件的顶表面和底表面之间夹持加强构件。第一和第二保持器包括面向加强构件的内壁表面的突起，并且当＆lt; 1gr表示加强构件的与突起相对的部分的内径时，1 out表示加强构件的外径加强构件2表示第一或第二保持器的突出部的外径，＆lt; 3表示绝缘体的内径，满足以下表达式1：1in＆phgr; 2 <＆phgr; 3-＆phgr。1out。

9. 发明申请

US20160049474A1 Adjusting the Charge Carrier Lifetime in a Bipolar Semiconductor Device 有权
标题翻译：调整双极半导体器件中的充电载体寿命
公开(公告)号：US20160049474A1
公开(公告)日：2016-02-18
申请号：US14825231
申请日：2015-08-13
申请人： Infineon Technologies AG
发明人： Gerhard Schmidt , Josef Georg Bauer , Mario Barusic , Oliver Humbel , Hans Millonig , Werner Schustereder
IPC分类号： H01L29/10 , H01L29/739 , H01L21/263 , H01L21/266 , H01L21/225 , H01L29/66 , H01L29/08
CPC分类号： H01L29/1095 , H01L21/225 , H01L21/2636 , H01L21/26506 , H01L21/266 , H01L21/3221 , H01L29/0804 , H01L29/0834 , H01L29/167 , H01L29/207 , H01L29/32 , H01L29/36 , H01L29/66128 , H01L29/66272 , H01L29/66325 , H01L29/66333 , H01L29/66363 , H01L29/732 , H01L29/7393 , H01L29/7395 , H01L29/744 , H01L29/8611
摘要： Disclosed are a method and a semiconductor device. The method includes implanting recombination center atoms via a first surface into a semiconductor body, and causing the implanted recombination center atoms to diffuse in the semiconductor body in a first diffusion process.
摘要翻译：公开了一种方法和半导体器件。该方法包括通过第一表面将复合中心原子注入到半导体本体中，并且使得注入的复合中心原子在第一扩散过程中在半导体本体中扩散。

10. 发明申请

US20150228446A1 Implantation Apparatus with Ion Beam Directing Unit, Semiconductor Device and Method of Manufacturing 有权
标题翻译：离子束引导单元，半导体器件和制造方法的植入装置
公开(公告)号：US20150228446A1
公开(公告)日：2015-08-13
申请号：US14177910
申请日：2014-02-11
申请人： Infineon Technologies AG
发明人： Alexander Breymesser , Stephan Voss , Hans-Joachim Schulze , Werner Schustereder
IPC分类号： H01J37/147 , H01L29/06 , H01L29/744 , H01J37/317 , H01J37/20
CPC分类号： C23C14/48 , H01J37/1477 , H01J37/20 , H01J37/3171 , H01J2237/20214 , H01J2237/30483 , H01L21/265 , H01L21/68764 , H01L29/0615 , H01L29/0623 , H01L29/0638 , H01L29/0657 , H01L29/36 , H01L29/45 , H01L29/744 , H01L29/861
摘要： An ion implantation apparatus includes an ion beam directing unit, a substrate support, and a controller. The controller is configured to effect a relative movement between an ion beam passing the ion beam directing unit and the substrate support. A beam track of the ion beam on a substrate mounted on the substrate support includes circles or a spiral.
摘要翻译：离子注入装置包括离子束引导单元，基板支撑件和控制器。控制器被配置为实现通过离子束引导单元的离子束和衬底支撑件之间的相对运动。安装在基板支架上的基板上的离子束的光束轨迹包括圆形或螺旋状。

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